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JPS5938746B2 - semiconductor strain gauge - Google Patents
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JPS5938746B2 - semiconductor strain gauge - Google Patents

semiconductor strain gauge

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Publication number
JPS5938746B2
JPS5938746B2 JP52107753A JP10775377A JPS5938746B2 JP S5938746 B2 JPS5938746 B2 JP S5938746B2 JP 52107753 A JP52107753 A JP 52107753A JP 10775377 A JP10775377 A JP 10775377A JP S5938746 B2 JPS5938746 B2 JP S5938746B2
Authority
JP
Japan
Prior art keywords
strain gauge
center
gauge element
circumferential
axis
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52107753A
Other languages
Japanese (ja)
Other versions
JPS5441684A (en
Inventor
正則 田辺
元久 西原
智 嶋田
祥隆 松岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP52107753A priority Critical patent/JPS5938746B2/en
Publication of JPS5441684A publication Critical patent/JPS5441684A/en
Publication of JPS5938746B2 publication Critical patent/JPS5938746B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は、N形シリコン単結晶ウェハの片面に凹形の穴
を形成したシリケンダイアフラムの他方の面上に複数個
のP形ピエゾ抵抗歪ゲージ素子を配置しその一部をブリ
ッジ接続してなる半導体歪ゲージに係り、特に、(11
0)面方位を有するシリコンダイアフラムの面上に径方
向歪ゲージ素子群と周方向歪ゲージ素子群の2種類のピ
エゾ抵抗歪ゲージ素子群を配置してなる半導体歪ゲージ
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention comprises a silicon diaphragm in which a concave hole is formed on one side of an N-type silicon single crystal wafer, and a plurality of P-type piezoresistive strain gauge elements arranged on the other side. Particularly, it relates to a semiconductor strain gauge formed by bridge-connecting parts (11
0) This relates to a semiconductor strain gauge in which two types of piezoresistive strain gauge element groups, a radial strain gauge element group and a circumferential strain gauge element group, are arranged on the surface of a silicon diaphragm having a plane orientation.

従来の半導体歪ゲージの配置例を第1図及び第2図に示
す。
Examples of the arrangement of conventional semiconductor strain gauges are shown in FIGS. 1 and 2.

第1図に示す従来例は、N形シリコン単結晶よりなる(
100)面方位を有するシリコンダイアフラム1の面上
の中心を通る<110>軸を対称中心にして配置した2
個一対の径方向歪ゲージ素子2、3及びこの<110>
軸と直交する軸〔(100)面上では<110>軸とな
る〕を対称中心にして配置した2個一体の周方向歪ゲー
ジ素子4、5によつて構成される。
The conventional example shown in Fig. 1 is made of N-type silicon single crystal (
100) 2 arranged with the <110> axis passing through the center on the surface of the silicon diaphragm 1 having a plane orientation as the center of symmetry.
A pair of radial strain gauge elements 2 and 3 and this <110>
It is constituted by two integral circumferential strain gauge elements 4 and 5 arranged with the center of symmetry about an axis perpendicular to the axis (<110> axis on the (100) plane).

かかる歪ゲージ素子2、3、4、5は例えばボロン等の
不純物の拡散によつて形成されるもので、そして2、3
04、5の4個でブリッジを構成することにより半導体
ゲージとしての機能を果すものである。第2図に示す従
来例は、N形シリコン単結晶よりなる(110)面方位
を有するシリコンダイアフラム6の面上の中心を通る<
111>軸を対称中心にして配置した2個一対の径方向
歪ゲージ素子□18と、シリコンダイアフラム6の面上
の中心を通る<112>軸を対称中心に配置した2個一
対の周方向歪ゲージ素子9、10によつて構成される。
かかる歪ゲージ素子□、8、9、10の形成手段及び半
導体ゲージとしての構成は第、図の場合と同様である。
上記した従来例の共通の特徴は、歪ゲージ素子を全てシ
リコンダイアフラムの中心から等距離の位置に形成し、
かつその位置がシリコンダイアフラムの端部に近いとい
う点にある。
Such strain gauge elements 2, 3, 4, 5 are formed by diffusing impurities such as boron, and 2, 3
The four gauges 04 and 5 form a bridge to function as a semiconductor gauge. In the conventional example shown in FIG. 2, <
A pair of radial strain gauge elements □18 are arranged with the center of symmetry about the 111> axis, and a pair of circumferential strain gauge elements are arranged with the center of symmetry about the <112> axis passing through the center of the surface of the silicon diaphragm 6. It is composed of gauge elements 9 and 10.
The means for forming such strain gauge elements □, 8, 9, and 10 and the structure as a semiconductor gauge are the same as those shown in FIGS.
The common feature of the conventional examples described above is that all the strain gauge elements are formed at the same distance from the center of the silicon diaphragm,
Moreover, its position is close to the end of the silicon diaphragm.

従来例において上記特徴を持つ構成とした第1の目的は
、4個の歪ゲージ素子の拡散形成時に生じる抵抗値のば
らつきを極力小さく抑えることでブリツジの零点の不均
衡を小さくすることにある。
The first purpose of the conventional structure having the above-mentioned characteristics is to reduce the imbalance of the zero points of the bridge by suppressing as much as possible the variation in resistance value that occurs when the four strain gauge elements are formed by diffusion.

また、第2の目的は、例えばシリコンダイアフラムに圧
力が加わるような場合に、シリコンダイアフラム面上に
生じる応力に対するブリツジの出力電圧感度を大きくす
ることにある。さらに、第3の目的は、上記第1の目的
を制約条件として例えば圧力に対するブリツジ出力の非
直線誤差を最小にし、高精度な半導体歪ゲージを得るに
ある。しかしながら、前記従来例は上記した第1及び第
2の目的に関してはほぼ十分に満足し得るが、第2の目
的に関しては必ずしも満足し得る構成ではなかつた。歪
ゲージ素子単体に一軸方向の応力が作用する場合、素子
を流れる電流の方向が応力の方向と直交する場合の方が
、並行する場合に比べて歪ゲージ素子の抵抗変化の応力
に対する非直線誤差が大きく、さらに非直線誤差の周囲
温度による変化も大きいことが実験により判明している
。従来例においては、これらの基礎的な検討が十分にな
されておらず、かつ第1の目的を達成するための制約条
件が障害となつて、高精度の半導体歪ゲージを得るため
の歪ゲージ素子の真に安定な最適配置を得るに至つてい
なかつた。従つて前記従来例は、常温における非直線誤
差が小さい場合でも周囲温度の変化によつて極めて大き
な変化を示し、さらに、歪ゲージ素子が形成されている
面上の中心と裏面に形成する凹形円形穴の中心とのずれ
により生じる歪ゲージ素子の相対的な位置の変化に対し
て極めて大きな変化を示す。
A second purpose is to increase the output voltage sensitivity of the bridge to stress generated on the surface of the silicon diaphragm, for example when pressure is applied to the silicon diaphragm. Furthermore, a third object is to obtain a highly accurate semiconductor strain gauge by minimizing the non-linear error of the bridge output with respect to pressure, for example, using the first object as a constraint. However, although the conventional example can almost fully satisfy the above-mentioned first and second objectives, it does not necessarily have a configuration that can satisfy the second objective. When a uniaxial stress acts on a single strain gauge element, the non-linear error due to the stress due to resistance change of the strain gauge element is greater when the direction of current flowing through the element is perpendicular to the stress direction than when it is parallel. It has been found through experiments that the non-linearity error is large and that the change in non-linearity error due to ambient temperature is also large. In the conventional example, these basic studies have not been sufficiently conducted, and the constraint conditions for achieving the first objective have been an obstacle, and strain gauge elements for obtaining high-precision semiconductor strain gauges have not been developed. However, we have not yet reached a truly stable and optimal arrangement of . Therefore, in the conventional example, even if the non-linear error is small at room temperature, it shows an extremely large change due to changes in ambient temperature, and furthermore, the concave shape formed at the center and back surface of the surface where the strain gauge element is formed. This shows an extremely large change in the relative position of the strain gauge element caused by the deviation from the center of the circular hole.

即ち、従来例は、高精度を目的とすれば許容温度範囲が
狭くなり、逆に許容温度範囲を広げれば精度は著しく低
下し、さらに製品ロッド間の特性のばらつきが極めて大
きいという問題点を持つていた。本発明の目的は、従来
技術における上記問題点を解決し、非直線誤差及びその
温度影響の小さい即ち高精度でかつ許容温度範囲の広い
、高感度のしかも製品ロッド間のばらつきが小さい半導
体歪ゲージを提供するにある。
In other words, in the conventional example, if high accuracy is aimed at, the allowable temperature range becomes narrow, and conversely, if the allowable temperature range is widened, the accuracy drops significantly, and furthermore, there are problems in that the variations in characteristics between product rods are extremely large. was. An object of the present invention is to solve the above-mentioned problems in the prior art, and to provide a semiconductor strain gauge with low non-linearity error and its temperature influence, that is, high accuracy, wide allowable temperature range, high sensitivity, and small variation between product rods. is to provide.

本発明の特徴は、N形シリコン単結晶よりなる{110
}面方位を有するダイアフラム面上の中心を通るく11
1〉軸に沿つて径方向歪ゲージ素子群を配置し、ダイア
フラム面上の申心を通るく112〉軸に沿つて周方向歪
ゲージ素子群を配置し、この周方向歪ゲージ素子群から
ダイアフラン中心までの距離を前記径方向歪ゲージ素子
群からダイアフラム中心までの距離よりも小さくする構
成を採用することにある。
The feature of the present invention is that {110
} Passing through the center on the diaphragm surface having the plane orientation 11
A group of radial strain gauge elements is arranged along the 1〉 axis, and a group of circumferential strain gauge elements is arranged along the 112〉 axis passing through the apex on the diaphragm surface. The object of the present invention is to employ a configuration in which the distance to the center of the flange is smaller than the distance from the radial strain gauge element group to the center of the diaphragm.

一般にシリコンダイアフラム面上には、第3図に示すよ
うに、径方向応力σ,と周方向応力σθが作用するもの
と考えられる。
Generally, it is considered that radial stress σ and circumferential stress σθ act on the silicon diaphragm surface, as shown in FIG.

従つて前記径方向歪ゲージ素子及び周方向ゲージ素子の
抵抗変化率をそれぞれ(ΔB/R)R,(ΔVR)Tと
すれば、これらは次式で近似できる。1啼 r
′ ▲ ぺZ7已 !ここで、πtは電
流と応力が並行する場合のピエジ抵抗係数、π,は電流
と応力が直交する場合のピエゾ抵抗係数であり、第1図
に示す従来例に用いられている{100}面方位では面
内の結晶軸方位に対して第4図のような分布を示し、ま
た、第2図に示す従来例に用いらへかつ本発明において
も用いている{110}面方位では第5図のような分布
を示す。
Therefore, if the resistance change rates of the radial strain gauge element and the circumferential gauge element are respectively (ΔB/R)R and (ΔVR)T, these can be approximated by the following equations. 1 cry
′ ▲ PeZ7已! Here, πt is the piezoresistance coefficient when the current and stress are parallel, and π is the piezoresistance coefficient when the current and stress are orthogonal. The orientation shows a distribution as shown in FIG. 4 with respect to the in-plane crystal axis orientation, and the {110} plane orientation, which is used in the conventional example shown in FIG. The distribution shown in the figure is shown.

前記4個の歪ゲージ素子をブリツジに組み、これを一定
電流E6によつて励起した場合のブリツジ出力電圧Vは
次式で近似的に与えられる。
When the four strain gauge elements are assembled into a bridge and this is excited by a constant current E6, the bridge output voltage V is approximately given by the following equation.

前記した通り、歪ゲージ素子単体の非直線誤差は電流方
向が応力方向と直父する場合の方が並行する場合よりも
大きい。これを径方向歪ゲージ素子及び周方向歪ゲージ
素子のそれぞれに適用し、各歪ゲージ素子の非直線誤差
を最小とする位置は、前者ではσθが零の位置付近(第
3図のA点)であり、後者ではσ,が零の位置付近(第
3図のB点)である。即ち、周方向歪ゲージ素子の非直
線誤差を最小とする位置は径方向歪ゲージ素子の非直線
誤差を最小とする位置に比べ、前記シリコンダイアフラ
ムの中心により近いことになる。しかるに、従来例にお
いて最適とされたダイアフラム端部付近の位置において
常温における非直線誤差が最小となるのは、歪ゲージ素
子によつて構成されるブリツジの相殺効果によるにすぎ
ず、実際は、第3図に示すようにダイアフラム端部付近
は位置に対して応力が急峻に変化する部分であり、上記
相殺効果は極めて不安定なものである〇直線NL(V)
を近似的に与えるものであり、従来例と本発明の根本的
な相違がより明らかとなるであろう。
As described above, the nonlinear error of a single strain gauge element is larger when the current direction is directly parallel to the stress direction than when it is parallel to the stress direction. Applying this to each of the radial strain gauge element and the circumferential strain gauge element, the position where the nonlinear error of each strain gauge element is minimized is near the position where σθ is zero for the former (point A in Figure 3). In the latter case, σ is near zero (point B in FIG. 3). That is, the position where the non-linear error of the circumferential strain gauge element is minimized is closer to the center of the silicon diaphragm than the position where the non-linear error of the radial strain gauge element is minimized. However, the reason why the nonlinear error at room temperature is minimized at the optimal position near the end of the diaphragm in the conventional example is only due to the canceling effect of the bridge constituted by the strain gauge element, and in fact, the third As shown in the figure, the stress near the end of the diaphragm changes sharply with respect to position, and the above-mentioned canceling effect is extremely unstable.〇Line NL (V)
is given approximately, and the fundamental difference between the conventional example and the present invention will become clearer.

ここで、NL(R)は径方向歪ゲージ素子の非直線誤差
、NL(T)は周方向歪ゲージ素子の非直線誤差を示す
Here, NL(R) indicates a nonlinear error of the radial strain gauge element, and NL(T) indicates a nonlinear error of the circumferential strain gauge element.

一方、上記のように非望線誤差を最小とする径方向歪ゲ
ージ素子及び周方向歪ゲージ素子の位置において、ブリ
ツジ出力感度を最大とするょうな各歪ゲージ素子の軸方
位は、(1)式及び(2)式より明らかなようにπtが
最大となる軸であり、第2図に示す従来例及び本発明に
おける〈111〉軸であることが第5図より判る。
On the other hand, at the position of the radial strain gauge element and circumferential strain gauge element that minimizes the non-line-of-line error as described above, the axial orientation of each strain gauge element that maximizes the bridge output sensitivity is (1) As is clear from equations and equations (2), πt is the maximum axis, and it can be seen from FIG. 5 that this is the <111> axis in the conventional example shown in FIG. 2 and the present invention.

この理由により、本発明においては、かかる結晶軸方位
に各歪ゲージ素子の電流方向を一致させる構成とする。
なお、製作時に結晶軸のずれが生じた場合でも、第5図
のπtが急峻に変化しない範囲ならば、本発明による効
果が損なわれることはない。第6図に本発明の一実施例
を示す。
For this reason, in the present invention, the current direction of each strain gauge element is made to match the crystal axis direction.
Note that even if the crystal axes are shifted during manufacturing, the effects of the present invention will not be impaired as long as πt in FIG. 5 does not change sharply. FIG. 6 shows an embodiment of the present invention.

第6図実施例は、N形シリコン単結晶よりなる{110
}面方位を有すをシリコンダイアフラム11の面上の中
心を通るく111〉軸を対称中心にして並行配置した2
個の径方向歪ゲージ素子12,13と、同じくシリコン
ダイアフラム11の面上の中心を通るく112〉軸を対
称中心にして配置した2個の周方向歪ゲージ素子14,
15とより構成される。
The embodiment shown in FIG. 6 is made of N-type silicon single crystal {110
} having a plane orientation passing through the center on the surface of the silicon diaphragm 11, and parallelly arranged with the 111〉 axis as the center of symmetry.
radial strain gauge elements 12 and 13, and two circumferential strain gauge elements 14, which are also arranged with the 112〉 axis passing through the center on the surface of the silicon diaphragm 11 as the center of symmetry,
15.

かかる歪ゲージ素子12,13,14,15は前記シリ
コンダイアフラム11の面上に、例えばボロン等の不純
物を拡散することによつて形成され、かつ、上記周方向
歪ゲージ素子14,15の中心からシリコンダイアフラ
ム11の中心までの距離を、径方向歪ゲージ素子12,
13の中心からシリコンダイアフラム11の中心までの
距離よりも小さくするように配置する。さらに、例えば
At等の導体によつてこれらの4個の歪ゲージ素子12
,13,14,15をブリツジ接続にuこれにより圧力
等の歪変換物理量を電気信号に変換するものである。以
上に示し一たように、本発明によれば、非直線誤差及び
その温度影響の小さい、即ち高精度でかつ許容温度範囲
の広い、高出力感度の半導体歪ゲージを実現することが
でき、さらに、シリコンダイアフラムの製作に伴つて生
じる諸特性のロツド間ばらつきを極めて小さくすること
ができる。
These strain gauge elements 12, 13, 14, 15 are formed by diffusing impurities such as boron on the surface of the silicon diaphragm 11, and are formed from the center of the circumferential strain gauge elements 14, 15. The distance to the center of the silicon diaphragm 11 is determined by the radial strain gauge element 12,
13 to the center of the silicon diaphragm 11. Furthermore, these four strain gauge elements 12 are connected by a conductor such as At.
, 13, 14, and 15 are connected to a bridge, thereby converting a strain conversion physical quantity such as pressure into an electrical signal. As described above, according to the present invention, it is possible to realize a semiconductor strain gauge with small nonlinear errors and their temperature effects, that is, high accuracy, a wide allowable temperature range, and high output sensitivity. , it is possible to extremely minimize variations in various properties between rods that occur during the manufacture of silicon diaphragms.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は従来例における歪ゲージ素子の配置
図、第3図、第4図及び第5図は半導体歪ゲージの特性
説明図、第6図は本発明の一実施例説明図である。 1,6,11・・・・・・シリコンダイアフラム、2,
3,7,8,12,13・・・・・・径方向歪ゲージ素
子、4,5,9,10,14,15・・・・・・周方向
歪ゲージ素子。
Figures 1 and 2 are layout diagrams of strain gauge elements in conventional examples, Figures 3, 4, and 5 are illustrations of characteristics of semiconductor strain gauges, and Figure 6 is an illustration of an embodiment of the present invention. It is. 1, 6, 11... Silicon diaphragm, 2,
3, 7, 8, 12, 13... Radial strain gauge element, 4, 5, 9, 10, 14, 15... Circumferential strain gauge element.

Claims (1)

【特許請求の範囲】[Claims] 1 N形シリコン単結晶よりなる{110}面方位を有
するダイアフラム面上に複数個のP形の歪ゲージ素子を
形成しその一部をブリッジ接続してなる半導体歪ゲージ
において、ダイアフラム面上の中心を通る<111>軸
でかつ周方向応力がほぼ零となる位置に径方向歪ゲージ
素子を配置し、ダイアフラム面上の中心を通る<112
>軸でかつ径方向応力がほぼ零となる位置に周方向歪ゲ
ージ素子を配置したことを特徴とする半導体歪ゲージ。
1 In a semiconductor strain gauge in which a plurality of P-type strain gauge elements are formed on a diaphragm surface having {110} plane orientation made of N-type silicon single crystal, and some of them are bridge-connected, the center on the diaphragm surface The radial strain gauge element is placed at a position where the <111> axis passes through the center and the circumferential stress is almost zero, and the <112> axis passes through the center of the diaphragm surface.
>A semiconductor strain gauge characterized in that a circumferential strain gauge element is arranged at a position on the axis where radial stress is approximately zero.
JP52107753A 1977-09-09 1977-09-09 semiconductor strain gauge Expired JPS5938746B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52107753A JPS5938746B2 (en) 1977-09-09 1977-09-09 semiconductor strain gauge

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52107753A JPS5938746B2 (en) 1977-09-09 1977-09-09 semiconductor strain gauge

Publications (2)

Publication Number Publication Date
JPS5441684A JPS5441684A (en) 1979-04-03
JPS5938746B2 true JPS5938746B2 (en) 1984-09-19

Family

ID=14467093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52107753A Expired JPS5938746B2 (en) 1977-09-09 1977-09-09 semiconductor strain gauge

Country Status (1)

Country Link
JP (1) JPS5938746B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CZ302108B6 (en) * 2006-11-23 2010-10-20 CVUT v Praze, Fakulta strojní Semiconductor strain gauge drilling rose

Also Published As

Publication number Publication date
JPS5441684A (en) 1979-04-03

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