JPS5939905B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of forming a bipolar transistor and a MOS field effect transistor on the same semiconductor substrate.

Generally, a bipolar transistor is formed by diffusing impurities into a collector region, a base region, and an emitter region by thermal diffusion or the like.

On the other hand, a MOS field effect transistor has an oxide film with a controlled thickness formed over regions that will become the source/drain and channel, and further includes a gate electrode. Conventionally, the method for forming these two types of transistors on the same semiconductor substrate was to form the emitter of the bipolar transistor and then form the gate oxide film of the MOS field effect transistor.

That is, in the manufacturing process of the above-mentioned semiconductor device, for example, an N-type epitaxial layer is formed on a P-type semiconductor substrate, and separation and diffusion is performed to separate each element region.

Next, a P-type impurity is introduced into the epitaxial layer to form a base region, and an N-type impurity is further introduced into the base region to form an emitter region, thereby obtaining an NPN bipolar transistor. On the other hand, in the case of a P-channel type MOS field effect transistor, the source and drain regions are formed simultaneously with the P-type base region of the bipolar transistor, and the gate oxide film is formed between the source and drain regions after the emitter region is formed. The oxide film on the surface of the substrate was removed, and a thin oxide film of 500 to 2000^ was formed again by thermal oxidation.

By the way, a bipolar transistor is called hFE after the current amplification factor.

Precise control is required, but in the above process, after emitter diffusion, heat treatment is performed to form the gate oxide film of the MOS transistor, so hFE fluctuates, making precise control difficult. Furthermore, the phosphor glass layer PSG, which is formed on the surface as an impurity source of N-type impurities when forming the emitter region, is left as is and used as a surface passivation layer. may be removed with
This measure has the disadvantage that it requires a complicated process and reduces workability. Moreover, since the HFE of a bipolar transistor strongly depends on the surface condition of the emitter-base junction, especially in the low current region, a stable surface protective film is required to prevent the surface passivation effect of the phosphor glass layer from being destroyed. The present invention provides a method for manufacturing a semiconductor device in which a bipolar transistor and a MOS field effect transistor are formed on the same semiconductor substrate in place of such conventional methods, and is capable of suppressing fluctuations in HFE of a bipolar transistor without increasing the number of steps. The object of the present invention is to provide a manufacturing method that can suppress the heat dissipation and form a good stabilization (passivation) film on the surface.

Therefore, according to the present invention, in a method for manufacturing a semiconductor device in which a bipolar transistor and a MOS field effect transistor are formed on one semiconductor substrate, the base region of the bipolar transistor and the source region and the drain region of the MOS field effect transistor are formed on the semiconductor substrate. a step of forming a gate insulating film of the MOS field effect transistor, a step of forming a gate insulating film of the MOS field effect transistor, and a step of forming a semiconductor layer on the base region of the bipolar transistor and surrounding the emitter formation region, and forming a gate insulating film of the MOS field effect transistor. A process of forming a semiconductor layer on the insulating film, a process of selectively exposing the base region of the bipolar transistor using the semiconductor layer as a mask, and then a process of diffusing impurities in an atmosphere containing oxygen to form the base region. forming an emitter region in the region, imparting conductivity to the semiconductor layer, and further forming a stabilizing film on the surface of the semiconductor layer;
Next, a semiconductor device comprising a step of forming a metal electrode in each region of a bipolar transistor and a MOS field effect transistor, including a metal electrode connecting the emitter region and a semiconductor layer existing around the emitter region. A manufacturing method is provided.

Next, an embodiment of the present invention will be described with reference to FIG. 1.

In the present invention, first, a P-type semiconductor substrate has a concentration of, for example, 2×10 15 ? -3. After forming an N-type epitaxial layer on a semiconductor substrate having a thickness of about 10 CA and forming an isolation region in the epitaxial layer, a P-type base diffusion region of a bipolar transistor and a P-type base diffusion region of a MOS field effect transistor are formed in an element region. The process up to the step of simultaneously forming the P-type source and drain diffusion regions is the same as the conventional method as described above.

Therefore, in the following description and drawings, the semiconductor substrate, isolation region, etc. will not be mentioned or illustrated. Figure 1 a-
g shows the manufacturing process of bipolar transistors, which are formed separately in an N-type epitaxial layer, on the left, and the manufacturing process of a MOS field effect transistor on the right.

In this embodiment, first, the surface of the N-type epitaxial layer 11 is coated to a thickness of several 1,000 to 1,000 by a normal thermal oxidation method.
After forming a silicon dioxide film 12 (0CX), a normal photo-etching method is applied to form a window for forming a base region and a window for forming a source/drain region. ), and the base region 13, source region 14, and drain region 15 are formed at the same time.

Then, the silicon dioxide film 12 between the source region 14 and drain region 15 is removed and reoxidized to form a gate insulating film 16 made of silicon dioxide with a thickness of 500 to 2000 mm. This state is shown in figure a. Next, the surfaces of the silicon dioxide layers 12 and 16 are
A polycrystalline silicon layer 17 having a thickness of about 30,005 mm is then formed.

This state is shown in Figure b. Next, the polysilicon layer 1
7 is selectively removed by applying a photo-etching method, and on the base region 13, surrounding the intended emitter region, (17' and 17'') and on the gate insulating film 16. (17″′). This state is shown in figure c.
Shown below. Next, photo-etching is applied again to selectively remove the silicon dioxide film 12 covering the surface of the base region 13 in the area surrounded by the semiconductor layers 17' and 17'' to form an opening (window). Then, expose the portion where the emitter region is to be formed.

This state is shown in Figure d. Next, thermal diffusion is performed in an oxidizing atmosphere such as water vapor using a gas containing polysilicon (p), which is a donor impurity, as an impurity source, such as POCl3, to form the polysilicon layers 17', 17" and 17"7. will be introduced.

As a result, the base region 13 is diffused into the base region 13 through the window, and an N-type emitter region 13 with a depth of, for example, about 1.31 mm is formed, and the polysilicon layers 17, 1
7'' and 17''5 are rendered electrically conductive, the polysilicon layers 17', 17'' can be at least part of an emitter stabilizing electrode, and the polysilicon layer 17''5 can be used as a gate electrode. Ru. Furthermore, during the diffusion process, at least the exposed surface of the emitter region 18 and the surface of the polysilicon layer are oxidized, converting the surface into an oxide layer or a glass layer 19. This state is shown in figure e. Next, by applying a normal photo-etching method, windows are formed in the silicon dioxide film 12 and the oxide layer 19 including the adjacent silicon dioxide film 12 to form a base electrode window 20, emitter electrode windows 21, 22, collector electrode window 22, and a gate electrode window. A window 23, a source electrode 24, and a drain electrode window 25 are formed.

This state is shown in figure f. After that, for example, aluminum (Al) is applied to a thickness of 1C over the entire surface including the inside of each electrode window.
1i), the aluminum is selectively etched away by photo-etching, and the base electrode 26 emitter electrode 27, collector electrode 28, gate lead electrode 29, source electrode 30, and drain electrode 31 are formed. Form.

At this time, one end of the emitter electrode 27 is located on the emitter base junction and is covered with a semiconductor layer 17' which is covered with an insulating film.
, 17''. This state is shown in FIG.

In the present invention, the emitter region of the bipolar transistor is formed after the gate insulating film of the MOS field effect transistor is formed to a desired thickness, and there is no subsequent heat treatment step. This does not cause fluctuations in the HFE of the bipolar transistor.
Further, when forming the emitter region, since the gate insulating film of the MOS field effect transistor is covered with a semiconductor layer in advance, the film thickness of the gate insulating film does not change.
This does not cause fluctuations in the threshold voltage (Vth) of the OS field effect transistor.

Furthermore, when forming the emitter region, the semiconductor layer is also given a conductive curve, and a stabilizing (passivation) film is formed at least on the surface of the semiconductor layer. This prevents an increase in the number of steps required. Moreover, the stabilizing film remains without being removed in subsequent steps, making it possible to further stabilize the semiconductor device. Furthermore, according to the present invention,
Since the same potential as that of the emitter region is applied to at least the semiconductor layer disposed on the emitter-base junction via an insulating film, the concentration of electric field at the exposed portion of the emitter-base junction is relaxed, and the semiconductor device It is possible to further stabilize the voltage and increase the voltage resistance.

[Brief explanation of drawings]

FIG. 1 is a process sectional view showing the manufacturing process of a semiconductor device according to the present invention. In the figure, 11... epitaxial layer, 1
2... Silicon dioxide layer, 13... Base region, 14... Source region, 15...
...Drain region, 16...Gate insulating film, 1
7... Semiconductor device, 18... Emitter region, 19... Stabilization (passivation) film, 20... Base electrode window, 21... ...Emitter electrode window, 22...Collector electrode window, 23
...Gate electrode extraction window, 24...
Source electrode window, 25...Drain electrode window, 26
...Base electrode, 27...Emitter electrode, 28...Collector electrode, 29...
Gate extraction electrode, 30...Source electrode, 31
...Drain electrode.

Claims (1)

[Claims] 1. In a method of manufacturing a semiconductor device in which a bipolar transistor and a MOS field effect transistor are formed on a semiconductor substrate, a step of forming a base region of a bipolar transistor and a source region and a drain region of a MOS field effect transistor on a semiconductor substrate, and then a step of forming a base region of a bipolar transistor and a source region and a drain region of a MOS field effect transistor on a semiconductor substrate; forming a gate insulating film of the effect transistor, then forming a semiconductor layer on the base region of the bipolar transistor and surrounding the emitter formation region;
A step of forming a semiconductor layer on the gate insulating film of the S field effect transistor, then a step of selectively exposing the base region of the bipolar transistor using the semiconductor layer as a mask, and then a step of diffusing impurities in an atmosphere containing oxygen. A process is performed to form an emitter region in the base region and to impart conductivity to the semiconductor layer, and to form a stabilizing film on the surface of the semiconductor layer. A method for manufacturing a semiconductor device, comprising the step of forming a metal electrode in each region of a bipolar transistor and a MOS field effect transistor, including a metal electrode connecting the semiconductor layer to the semiconductor layer.