JPS5944658B2 - Program check circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a program check circuit for a very small computer or the like configured with one chip IC element as one package.

Conventionally, regardless of the simple microcomputer configured with one chip IC device according to the present invention as one package,
When a pre-assembled program is input into a computer and processed, it is possible to make a mistake when creating the program and end up creating a program that is different from the predetermined input data to be constructed.

In order to inspect and correct this, a computer (hereinafter referred to as CP)
(abbreviated as U) is operated in conjunction to check the configuration program. However, according to the conventional program inspection methods, for example, HITAC-1 manufactured by Hitachi, Ltd.
In the 0 assembler language, as shown in Figure 1, when the program counter is 0000, the contents of address ``A'' are transferred to the accumulator (
Then write the program counter ``0000'' and write ``B'' by the memorized code ``A''.
Add the contents of the address to the accumulator.Furthermore, during program processing such as writing the contents of the accumulator to address C using the command signal store ST at the program counter ``0002'', the program counter ``0002''
When it is desired to stop the program execution at "0003" and check the contents of the memory address (program backpack control operation), a stop command (HALT) is written to the program counter "0003" by the stop command signal L. (This operation destroys the L instruction.) Therefore,
A CPU that processes this type of program will stop as a result of executing a stop command, so when the CPU stops, the program counter built into the CPU will display "0004", which is the next address on the counter function. Put it away. Therefore, if you want to check the contents of the memory using the method described above and continue processing, set the program counter to 1.
I have to reset it to the previous "0003",
Also, the program counter “00” where the stop command was written is
The contents of "03" had to be returned to the original L command, making the operation after the stop command extremely troublesome. SUMMARY OF THE INVENTION An object of the present invention is to improve work efficiency in the aforementioned program debacking operation. A feature of the present invention is that in a program inspection circuit that processes a pre-assembled program on a computer and inspects the program by interrupting the program processing at a predetermined point, the program can arbitrarily specify the program address at which the program is to be interrupted. A comparator circuit that compares the output data of the program interrupt address designation register circuit with the output data of the program counter processed by the computer and output, and outputs a match signal only when they match; It is comprised of a control circuit which accepts a coincidence signal as input and releases or sets the designated address of the program interruption address designation register circuit after a predetermined period of time has elapsed, and if there is an abnormality in the program, it is stopped and the program processing operation is stopped. The point is that it can be displayed to that effect. A specific example of its implementation will be described below with reference to FIGS. 2 and 3.

FIG. 2 is a block diagram showing the main circuit of the CPU according to the present invention. In the figure, 1 is a 16-bit program counter element to which the CPU counter output signal is input;
2 compares the output data 4 from the program counter element 1 and the output data 5 from the data setting switch 3, which will be explained later, and sets the program counter to the input data (for example, "1010") set in advance by the data setting switch 3. A comparator that outputs one signal "H" as output data 7 when the output data 5 of the element 1 matches ("1010"), and 6 is a multi-input device whose input is the output data 7 of the comparator 2. This is an AND element that outputs an [H] signal only when all the comparator outputs become an "H" signal. 8 is the output signal 9 of the AND element 6
A clock generator 10 which uses human power on one side and constantly generates a clock signal when the CPU is starting to drive.
The output signal 9 is inverted by an inverter 11 and input to the AND element.

In the circuit shown in FIG. 2, only the 4-bit (x1) output data of the program counter element 1 matches the preset output data from the data setting switch 3, and only the corresponding comparator 2 is "H". ” has become a signal,
This is a diagram showing a case where the CPU has not yet stopped.

In addition, FIG. 3 shows the program counter element 1 shown in FIG.
This is a diagram for explaining the specific operating functions of the comparator 2 and data setting switch 3 by extracting the lower 4 bits of the data and showing the corresponding comparator 2 and data setting switch 3.

In FIG. 3, the same reference numerals as in FIG. 2 indicate the same components. As shown in FIG. 3, the program counter element 1 and the data setting switch 3 are constantly operated by the clock signal from the clock generator 10, and the data setting switch 3 is connected to each input terminal 1D to 4D of the C element 3a. Switches 3-1 to 3-4 are provided which can apply a power supply of +5V ("H" signal) to the switches 3-1 to 3-4, which are normally used as "L" signals via resistors 1R to 4R.

10 is a mono-multivibrator for resetting and controlling the data setting switch 3 by the output signal of the comparator 2, and a capacitor C and a low resistance R are connected to it.
The setting data of the data setting switch 3 is reset after a delay of the time determined by , the so-called necessary time for stopping the CPU. 13 is a switch for controlling the CPU program stop inserted between the output signal line 77 connecting the comparator 2 and the mono/multivibrator 12. By leaving this switch 13 open, the CPU program execution is stopped. .

To explain the specific operation according to the circuit shown in FIG. 3, when the program is stopped at address 0003 as shown in FIG. 1, the data setting switch 3 switches 3-1 and 3-2
When the circuit is made a closed circuit and data [0011] is input to the C element 3a, an "H" signal is output to the output terminals 1Q and 2Q of the IC element 3a by a clock signal from a tally clock generator (not shown). Input terminal B of comparator 2
Let O and Bl be "H".

If you run the program with the data "0011" input to comparator 2 in advance, you will see "
0000", output terminals 1Q to 4Q of program counter element 1 all output "L" signals, and "0000" is executed.
001], output terminal 1 of program counter element 1
Only Q outputs an “H” signal.When executing at “0003”, output element 1 of program counter element 1
Q and 2Q become "H" signals, thereby setting the input terminals AO and A1 of comparator 2 to "H". That is,
Input terminals AO, Al, BO, Bl of comparator 2 are
” signal, and an “H” signal is output to the output terminals A-B of the comparator 2, and is input to the AND element 6 as output data 7. Although not shown in the figure, when the other inputs of the AND element 6 also become the "H" signal, the AND element 6 outputs the "H" signal, which is inverted by the inverter 11 until the "H" signal. ” AND element 8 which was a signal output
is set as an "L" signal output, and serves as a CPU stop clock to stop the CPU operation at "0003". Also, AN
The "H" signal output from the D element 6 is input to the mono multivibrator 12 via the normally closed switch 13, and stops the CPU's program execution for a time determined by the capacitor C and the resistor R. After delaying the time necessary to check the printed data, the data of the data setting switch 3 (1Q and 2Q are "H") is reset.

In this case, by keeping the switch 13 in the open state, the program execution of the CPU is stopped and it is possible to take an arbitrary amount of time to check the output data. As is clear from the above embodiments, in the present invention, the CPU
A register circuit is provided at which the address at which the program execution is desired to be interrupted can be arbitrarily specified, and the CPU program execution is stopped when the output of the CPU program counter matches the output of the register circuit.

Therefore, it is no longer necessary to write a stop command directly into the program in memory, and the memory can be used effectively.Furthermore, the program counter can be stopped with the interrupt address displayed, etc. It would be extremely easy to operate, and it would be a dream come true to improve the efficiency of program inspection work.

[Brief explanation of drawings]

Fig. 1 is a diagram for explaining a conventional program inspection method, Fig. 2 is a circuit diagram of a main part of a program inspection control circuit showing an embodiment of the present invention, and Fig. 3 is a part of Fig. 2. ,
FIG. 2 is a more concrete circuit diagram. 1...Program counter element, 2...
・Comparator, 3...Data setting switch,
6, 8...AND circuit, 10...Clock generator, 11...Inverter, 12
...Mono/multi vibrator, 13...
...Switch, C...Capacitor, R, Rl~
R4...Resistance, 3-1 to 3-4...Switch.

Claims (1)

[Claims] 1. In a program check circuit that processes a pre-assembled program on a computer and checks the program by interrupting the program processing at a predetermined point,
A program interrupt address designating register circuit that can arbitrarily specify a program address to be interrupted, and comparing the output data of the program interrupt address designating register circuit with the output data of a program counter processed and output by a computer,
It is characterized by comprising a comparator circuit that outputs a match signal only when there is a match, and a reset control circuit that receives the match signal of the comparator circuit as input and releases the designated address of the program interruption address designation register circuit after a predetermined period of time has elapsed. program check circuit.