JPS5944873B2 - transistor inverter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an inverter that alternately controls conduction and non-conduction of first and second transistors.

In this type of inverter, when one transistor switches over from conduction, ie, ON, to non-conduction, ie, OFF, due to the accumulation effect of the transistor that was previously ON, when the other transistor becomes ON, one of the The ON state of the transistor is maintained, and both transistors become short-circuited.

In order to avoid such short-circuit phenomena, conventionally, phase control technology is used to switch the transistor from ON to OFF.
When switching over from FF to ON, a free time is provided or a reactor is used to purify the rising waveform of the voltage. However, the above-mentioned phase control requires a complicated circuit configuration, and when using a reactor, the value of the reactor must be changed when the magnitude of the load current changes, which has the drawback of requiring a large amount of time for adjustment. 'The purpose of this invention is to have a relatively simple circuit configuration and to be independent of load current.
The object of the present invention is to provide a transistor inverter that can reliably avoid the short-circuit condition.

According to this invention, by comparing the base voltages of the first and second transistors with the reference voltage using the second and first comparators,
A conduction state due to an accumulation effect is detected, and the detection output controls a switch connected to the base side of the first and second transistors, thereby rendering the second and first transistors non-conductive.

In this way, when one transistor is conducting due to storage effects, the other transistor is prevented from conducting. Next, let's explain with reference to the drawings.

First, the accumulation effect of a transistor will be described with reference to FIG. The emitter of the transistor 11 is grounded, the collector is connected to a power supply terminal 13 through a resistor 12, and the base is connected to a drive power supply 15 through a resistor 14.
, +V1 and - from the drive power supply 15 as shown in FIG. 2A.
A square wave voltage alternating V2 is applied to the base of transistor 11. At +V1, the base ammeter BI flows through the transistor 11 as shown in FIG. 2B, and the collector voltage is the voltage Ecc at the power supply terminal 13 as shown in FIG.
, the voltage drops to the saturation voltage Vcs, and at this time the base voltage becomes the second voltage.
As shown in Figure D, the saturation voltage VBES is reached. Even if the drive signal changes from forward bias +V1 to reverse bias -2, the transistor 11 remains saturated for the accumulation time Ts as shown in FIG. . During this accumulation time Ts, the base voltage of the transistor 11 maintains the base saturation voltage VBES. The present invention utilizes the fact that the base voltage maintains the base saturation voltage VBES during the accumulation time Ts to prevent the inverter from becoming short-circuited. It is detected that the base voltage of the transistor is maintained at the base saturation voltage BES, and during that time, a drive signal that turns it ON is not sent to the other transistor.

For example, as shown in FIG.
, 22 are connected to the negative power supply terminal 23, and their collectors are connected to both ends of the primary coil of the inverter transformer 24.

The center of the primary coil of the transformer 24 is connected to the positive power supply terminal 25, and the drive signal applied between the terminals 26 and 27 is applied between the bases of the transistors 21 and 22, so that the transistors 21 and 22 are alternately turned on and off. Repeat this to configure the inverter. In this invention, first and second control switches 28 and 29 are connected to the base sides of the first and second transistors 21 and 22, respectively.

In this example, the first control switch 28 is inserted in series between the terminal 26 and the base of the transistor 21, and the second control switch 29 is inserted in series between the terminal 27 and the base of the transistor 27. The base voltages of the first and second transistors 21 and 22 are compared with the reference voltage of a reference voltage generator 33 by second and first comparators 32 and 31.
It is detected that the base voltages of the second and first transistors 22 and 21 are saturated. Comparators 31, 32
The control switches 28 and 29 are turned off at each detection output, and the driving of the first and second transistors 21 and 22 is blocked. A current-limiting impedance element 34 is inserted in series between the terminal 26 and the switch 28, and a current-limiting impedance element 35 is inserted in series between the terminal 27 and the switch 29, respectively. A drive signal as shown in FIG.
, 27 at time T.

If the terminal 26 becomes +V, and then the second transistor 22 is in the storage time until time t1, the base voltage BE2 of the transistor 22 becomes the base saturation voltage BES as shown in FIG. Voltage generator 3
The first comparator 31 compares the voltage with the reference voltage E of No. 3. The value of the reference voltage E, is selected to be between the base saturation voltage BES and the base voltage of the transistor applied when it is non-conducting. When the first comparator 31 detects that the base of the second transistor 22 is saturated, the switch 28 is cut off by its output. Therefore, the drive signal that attempts to bias the transistor 21 in the forward direction is cut off, and the first transistor 21 remains cut off during the accumulation time Ts of the second transistor 22. At time t1, the second transistor 22
When becomes non-conductive, switch 31 is closed, and a forward drive signal is applied to transistor 21, making it conductive. Similarly, the second transistor 22 remains cut off during the accumulation time Ts of the first transistor 21, for example, between time points T2 and T3. Therefore, transistors 21 and 22 are 0N.
When switching from 0FF to 0N, the inverter will not be short-circuited. In FIG. 4, B is the reference voltage E, D is the collector voltage C2 of the transistor 22, E is the detection output of the first comparator 31, F is the cutoff period of the switch 28, and G is the base voltage BEI of the first transistor 21. , H is the collector voltage of the transistor 21 0
It is 1.

FIG. 5 shows a specific example of the inverter shown in FIG. 3, with corresponding parts assigned the same reference numerals. The drive signal between the input terminals 26 and 27 is transmitted to the transistor 2 via the input transformer 37.
1 and 22, both ends of the secondary coil 37s of the transformer 37 are connected to the collectors of transistors 38 and 39 as switches 28 and 29, respectively, and the middle point is connected to the negative power supply terminal 23. be done. transistor 3
The emitters 8 and 39 are connected to the bases of transistors 21 and 22 through current-limiting resistors 34 and 35, respectively. Both ends of the secondary coil 37s of the transformer 37 are connected to one end of a capacitor 43 through diodes 41 and 42, respectively, and the other end of the capacitor 43 is connected to the negative power supply terminal 23. The anode sides of the diodes 41 and 42 are connected to a capacitor 43, and the driving signals are rectified by the diodes 41 and 42, so that a negative reference voltage Er is obtained at the capacitor 43. Transistors 44, 4 as comparators 31, 32
5 is provided, the emitters of transistors 44 and 45 are connected to the connection point of capacitor 43 and diodes 41 and 42, and the bases are connected through diodes 46 and 47, respectively.
Further, transistors 22 and 21 are connected through resistors 48 and 49.
The collectors are connected to the bases of transistors 38 and 39, respectively.

A resistor 51 is connected between the base and emitter of the transistor 38, and a diode 52 for discharging the accumulated charge of the transistor 21 is connected between the collector and emitter. The collector of the transistor 38 is connected to the midpoint of the secondary coil 37s through a capacitor 53 and a diode 54.
The connection point between the capacitor 53 and the diode 54 is the resistor 5.
5 to the base of transistor 38. A part of the drive signal is rectified by the diode 54 to provide the base voltage of the transistor 38. A resistor 56, a diode 57, a capacitor 58, and a diode 5 are connected to the transistor 39 side corresponding to the resistor 51, diode 52, capacitor 53, diode 54, and resistor 55, respectively.
9 and a resistor 61 are provided, respectively. Figure 6 is the 5th
The operating waveforms in the figure are shown, A is the drive signal, 13 is the reference voltage E
,,C is the base voltage BE of the transistor 22, ,D is the collector voltage C2 of the transistor 22, E is the collector voltage VC3 of the transistor 44, F is the collector current 1c3 of the transistor 38, G is the base current 1B1 of the transistor 21, H is the The collector current of the transistor 21 is 1C1. Time T. If the drive signal becomes positive and there is charge accumulated in transistor 22 at this time, then transistor 2
The base voltage VBE2 of 2 becomes the base saturation voltage BO8, which is compared with the comparison reference potential E by the comparison transistor 44, and the transistor 44 becomes conductive because it is forward biased, and therefore the switching transistor 38 is cut off. , a drive signal that would forward bias transistor 21 is blocked, and transistor 21 is cut off during the storage time T8 of transistor 22.
Similarly, for the transistor 22, the cut-off state is maintained during the accumulation time Ts of the transistor 21, for example, from time T2 to Ts, and the transistors 21 and 22 change from 0N to 0FF, 0.
When switching over from FF to ON, the inverter is prevented from becoming short-circuited. In the above, the first
, the second switches 28 and 29 are connected to the first and second transistors 21
, 22 are connected in series, but these may also be connected in parallel.

An example of this is shown in FIG. 7, in which parts corresponding to those in FIG. 3 are given the same reference numerals. Further, its operating waveforms are shown in FIG. 8, corresponding to FIG. 4. In this case, during the storage time of transistor 22, for example at time TO-T, the base voltage 8VBE2 of transistor 22 becomes saturated voltage 8. VBES, which is compared with the reference voltage Er for comparison, the switch 28 becomes conductive, the drive signal that attempts to bias the transistor 21 in the forward direction is bypassed to the switch 28, and the transistor 21 changes the storage time of the transistor 22. The cutoff state is maintained during Ts.
Similarly, regarding the transistor 22,
The cut-off state is maintained during the accumulation time of 1. A specific example of FIG. 7 is shown in FIG.

The emitters of switch transistors 38 and 39 are connected to the bases of transistors 21 and 22 through separate resistors, respectively, and the collectors of each transistor are connected to diodes 41 and 4.
2 and the connection point of the capacitor 43, and the other 5th
Portions corresponding to the figures are designated by the same reference numerals. Further, the operating waveforms in FIG. 9 are shown in correspondence with FIG. 6. Time T. The drive signal becomes positive at this time, and at this time, the transistor 22 is accumulating charge and the base voltage VBE2 of the transistor 22 is the saturation voltage VBES. , the transistor 44 becomes conductive because it is forward biased, and therefore the switch transistor 38 also becomes conductive, and the current that tends to forward bias the transistor 21 is transferred to the transistor 38 as shown in FIG. 10F. Bypassed, transistor 21 remains cut off during the storage time Ts of transistor 22. Also transistor 2
Similarly, the transistor 21 is kept in a cut-off state during the storage time Ts of the transistor 21. As explained above, according to the present invention, the first and second inverter transistors mutually monitor the base voltage of the other side to prevent the inverter from being short-circuited, so the base drive operation is reliable and adjustment is easy. be. In addition, since the configuration is configured to detect whether or not the other transistor is in the on state by detecting the presence or absence of the base saturation voltage, the first and second comparators 31, 32 and the first , it is not necessary to use high-voltage components as the second switches 28 and 29.

Therefore, it can be manufactured at low cost, and since no high voltage is applied, the rate of defective parts is low. Therefore, improved reliability can also be expected.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram for explaining the pulse response of a transistor, Fig. 2 is its operating waveform diagram, Fig. 3 is a circuit diagram showing an example of an inverter according to the present invention, Fig. 4 is its operating waveform diagram, and Fig. 4 is its operating waveform diagram. 5 is a connection diagram showing a specific example of FIG. 3, FIG. 6 is an operating waveform diagram thereof, FIG. 7 is a circuit diagram showing another example of the inverter according to the present invention, FIG. 8 is an operating waveform diagram thereof, and FIG. 9 is a connection diagram showing a specific example of FIG. 7, and FIG. 10 is an operation waveform diagram thereof. 21, 22... First and second inverter transistors, 28, 29... First and second control switches,
31, 32... Second, first comparator, 33...
... Reference voltage generator, 38, 39 ... Switch transistor, 44, 45 ... Comparison transistor.

Claims (1)

[Claims] 1. In an inverter in which first and second transistors are alternately controlled to be conductive and non-conductive, first and second comparators detect base saturation voltage by comparing base voltages of the second and first transistors with a reference voltage. and the first or second transistors connected to the base sides of the first and second transistors, respectively.
The first and second transistors maintain the other first or second transistor, which does not generate a base saturation voltage, in a non-conducting state in a state where the comparator detects the base saturation voltage of the second or first transistor. A transistor inverter comprising a control switch.