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JPS5946033B2 - polyphase multiplier - Google Patents
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JPS5946033B2 - polyphase multiplier - Google Patents

polyphase multiplier

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Publication number
JPS5946033B2
JPS5946033B2 JP1853278A JP1853278A JPS5946033B2 JP S5946033 B2 JPS5946033 B2 JP S5946033B2 JP 1853278 A JP1853278 A JP 1853278A JP 1853278 A JP1853278 A JP 1853278A JP S5946033 B2 JPS5946033 B2 JP S5946033B2
Authority
JP
Japan
Prior art keywords
phase
polyphase
multiplier
input
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1853278A
Other languages
Japanese (ja)
Other versions
JPS54111736A (en
Inventor
年弘 野村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1853278A priority Critical patent/JPS5946033B2/en
Publication of JPS54111736A publication Critical patent/JPS54111736A/en
Publication of JPS5946033B2 publication Critical patent/JPS5946033B2/en
Expired legal-status Critical Current

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  • Inverter Devices (AREA)

Description

【発明の詳細な説明】 この発明は、多相交流回路における2組の多相電気量の
各相それぞれの積の和を演算する時分割式の多相掛算器
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time-sharing polyphase multiplier that calculates the sum of the products of each phase of two sets of polyphase electrical quantities in a polyphase AC circuit.

近時、時分割式の掛算器が多相交流回路に限らず一般の
掛算用として実用化されつつある。
Recently, time-sharing multipliers have been put into practical use not only for multiphase AC circuits but also for general multiplication purposes.

一般の掛算用として使用される時分割掛算器の基本的な
構成は次の通りである。第1図はxxy=z(但しy=
−1〜0〜+1)を演算するよう構成したもので、電圧
xを供給する入力端子P1に抵抗および演算増幅器から
なる反転増幅器REVと抵抗R1とを直列に接続し、こ
れに抵抗R2と開閉素子Sとを直列接続したものを並列
に接続し、抵抗R2の抵抗値rvに対して抵抗R1の抵
抗値をその2倍に相当する2にに設定する。一方、電圧
yを供給する入力端子P2を比較増幅器COMの(→端
子に接続し、比較増幅器COM(1)…端子に三角波発
振器TOSの出力端子を接続して比較増幅器COMの出
力端子を開閉素子Sの操作用入力端子に接続し、比較増
幅器COMの出力が正の場合に開閉素子Sを閉路し、負
の場合に開閉素子Sを開路するよう構成する。なお、こ
の掛算器を適用する対象により、y=−1〜0〜+ 1
になるようにXの係数を定める必要があり、これは上述
の抵抗R1 、R2の抵抗値の調整により行われる。ま
た、抵抗R1と開閉素子Sとの接続点に、入力電流を合
成して電圧に変換する演算増幅器OPAと平滑コンデン
サCとを並列に接続し、この並列回路の出力側端子を掛
算器出力端子P3に接続する。このように構成された時
分割掛算器において、一方の入力端子P1に電圧Xが入
力されると、この電圧は反転増幅器REVにより符号が
反転されて−xとなり、抵抗R1に電流il■ −x/
2にが流れる。また、他方の入力端子P2には−1か
ら+1までの範囲に亘つて変化する他方の入力電圧y(
第2図a)が供給され、比較増幅器COMの←)入力端
子に入力される。また、比較増幅器℃OMの…入力端子
には三角波基準電圧(第2図a)が三角波発振器TOS
の出力端子から供給される。ここで、入力電圧yが三角
波基準電圧より小さい時点においては、比較増幅器CO
Mの出力が正となり、この正の出力信号が開閉素子Sに
供給される期間だけ開閉素子Sが閉路状態となため、抵
抗R2を流れる電流12=x/rは第2図bに示すよう
に脈動する。この場合、電流12の脈動のデユーテイサ
イクルはy−一1の時点t1においては100%,y=
oの時点T2においては50%、y=+1の時点T3に
おいてはO%となり、かつ電流12の波高値はx/rで
電流11の波高値x/2rの2倍に相当する。従つて、
電流11と電流12との合成電流11+I2は第2図c
に示す波形となり、この合成電流11+I2が演算増幅
器0PAに供給されて電圧に変換さへ仮りに平滑コンデ
ンサCが接続されていない場合には演算増幅器0PAの
出力端子に第2図dに示す波形の脈動電圧が発生する。
しかしながら、演算増幅器0PAにはこれと並列に平滑
コンデンサCが接続されているため、出力端子P3には
第2図eに示すように直線的な演算出力電圧zが発生す
る。この演算出力直線z上のそれぞれの点は、その各点
に対応するyとxとの掛算出力zを示すものである。従
来における時分割式の多相掛算器、例えば、3相掛算器
は上述のように構成された時分割掛算器を3組組合せて
第3図に示すように構成されている。
The basic configuration of a time-sharing multiplier used for general multiplication is as follows. Figure 1 shows xxy=z (where y=
-1 to 0 to +1), an inverting amplifier REV consisting of a resistor and an operational amplifier and a resistor R1 are connected in series to the input terminal P1 that supplies the voltage x, and a resistor R2 and a switching The elements S are connected in series and connected in parallel, and the resistance value of the resistor R1 is set to 2, which is twice the resistance value rv of the resistor R2. On the other hand, the input terminal P2 that supplies the voltage y is connected to the (→ terminal) of the comparator amplifier COM, and the output terminal of the triangular wave oscillator TOS is connected to the terminal of the comparator amplifier COM (1). It is connected to the operation input terminal of S, and is configured to close the switching element S when the output of the comparator amplifier COM is positive, and open the switching element S when it is negative.The target to which this multiplier is applied Therefore, y=-1~0~+1
It is necessary to determine the coefficient of X so that In addition, an operational amplifier OPA that synthesizes the input current and converts it into a voltage and a smoothing capacitor C are connected in parallel to the connection point between the resistor R1 and the switching element S, and the output terminal of this parallel circuit is connected to the multiplier output terminal. Connect to P3. In the time division multiplier configured in this way, when a voltage /
2 flows. In addition, the other input terminal P2 receives the other input voltage y(
2a) is supplied and input to the ←) input terminal of the comparator amplifier COM. In addition, the triangular wave reference voltage (Fig. 2a) is connected to the input terminal of the comparison amplifier ℃OM and the triangular wave oscillator TOS.
is supplied from the output terminal of Here, when the input voltage y is smaller than the triangular wave reference voltage, the comparator amplifier CO
Since the output of M becomes positive and the switching element S is in a closed circuit state only during the period when this positive output signal is supplied to the switching element S, the current 12 = x/r flowing through the resistor R2 is as shown in Figure 2 b. It pulsates. In this case, the duty cycle of the pulsating current 12 is 100% at time t1 of y-1, y=
At time T2 of o, it is 50%, and at time T3 of y=+1, it is O%, and the peak value of current 12 is x/r, which corresponds to twice the peak value of current 11 x/2r. Therefore,
The composite current 11+I2 of current 11 and current 12 is shown in Figure 2c.
This combined current 11+I2 is supplied to the operational amplifier 0PA and converted into a voltage.If the smoothing capacitor C is not connected, the output terminal of the operational amplifier 0PA will have the waveform shown in Figure 2d. Pulsating voltage occurs.
However, since the smoothing capacitor C is connected in parallel to the operational amplifier 0PA, a linear operational output voltage z is generated at the output terminal P3 as shown in FIG. 2e. Each point on this calculation output straight line z indicates the multiplication output z of y and x corresponding to that point. A conventional time-sharing type multiphase multiplier, for example, a three-phase multiplier, is configured as shown in FIG. 3 by combining three sets of time-sharing multipliers configured as described above.

この三相掛算器は、三相交流回路における2組の三相電
気量を各相毎にそれぞれ掛算して掛算結果の合計を演算
する場合、例えば第4図に示す交流機の各相の電流1u
,Iv,Iwと各相の起電力Eu,Ev,Ewとの各相
それぞれの積の和からなる瞬時電力P=IuEu+Iv
Ev+IwEwを第5図のプロツク線図に示すように掛
算してその合計の出力Pを演算する等の場合に使用され
る。すなわち、第3図に示す従来の三相掛算器は、掛算
を行う一方の三相電気量を供給する入力端子A,B,C
にそれぞれ反転増幅器REVと抵抗R1とを直列に接続
し、これに抵抗!と開閉素子Sとを直列接続したものを
並列に接続し、抵抗R1の抵抗値を抵抗R2の抵抗値r
の2倍に相当する2rとする。また、掛算を行う他方の
三相電気量を供給する入力端子D,E,Fを三相各相に
設けた比較増幅器COMの(ハ)入力端子にそれぞれ接
続すると共に、各比較増幅器COMの(ト)入力端子に
三相共通に設けた三角波発振器TOSの出力端子をそれ
ぞれ接続し、さらに各比較増幅器COMの出力端子を各
相の開閉素子Sのそれぞれの操作信号入力端子A,b,
cに接続する。なお、入力端子D,E,Fに供給する入
力が−1〜0〜+1の範囲となるよう掛算する対象によ
り抵抗R,,R2の抵抗値を設定する。また、三相各相
の開閉素子Sのそれぞれの出力側接点を一括して接続し
、この接続点に演算増幅器0PAと平滑コンデンサCと
を並列に接続し、これらの出力側端子を掛算出力端子P
に接続する。このように構成された従来の三相掛算器に
より、例えば第4図に示す交流機の電流1u,Iv,I
wと起電力Eu,Ev,Ewとの各相それぞれの積の和
、すなわち三相瞬時電力P=IuEu+IvEv+Iw
Ewを演算する場合は、一方の入力端子A,B,Cにそ
れぞれ電流1u,v,Wを電流・電圧変換器(図示せず
)により電圧に変換して入力すると共に、他方の入力端
子D,E,Fにそれぞれ起電力Eu,Ev,EWを入力
することにより行われる。
When this three-phase multiplier multiplies two sets of three-phase electric quantities for each phase in a three-phase AC circuit and calculates the sum of the multiplication results, for example, the current of each phase of the alternating current machine shown in Fig. 4 is used. 1u
, Iv, Iw and the electromotive force Eu, Ev, Ew of each phase. Instantaneous power P = IuEu + Iv
This is used when multiplying Ev+IwEw as shown in the block diagram of FIG. 5 to calculate the total output P. That is, the conventional three-phase multiplier shown in FIG.
An inverting amplifier REV and a resistor R1 are connected in series to each of the resistors ! and switching element S are connected in parallel, and the resistance value of resistor R1 is set to the resistance value r of resistor R2.
2r, which is twice that of . In addition, the input terminals D, E, and F that supply the other three-phase electric quantities for multiplication are connected to the (c) input terminals of the comparator amplifiers COM provided for each of the three phases, and the (c) input terminals of each comparator amplifier COM are g) Connect the output terminals of the triangular wave oscillator TOS provided in common to the three phases to the input terminals, and connect the output terminals of each comparator amplifier COM to the respective operation signal input terminals A, b,
Connect to c. Note that the resistance values of the resistors R, R2 are set depending on the object to be multiplied so that the inputs supplied to the input terminals D, E, and F are in the range of -1 to 0 to +1. In addition, the output side contacts of the switching elements S of each of the three phases are connected together, the operational amplifier 0PA and the smoothing capacitor C are connected in parallel to this connection point, and these output side terminals are connected to the multiplication output terminal. P
Connect to. For example, the currents 1u, Iv, I of the alternating current machine shown in FIG.
The sum of the products of w and the electromotive forces Eu, Ev, and Ew for each phase, that is, the three-phase instantaneous power P=IuEu+IvEv+Iw
When calculating Ew, currents 1u, v, and W are converted into voltages by a current/voltage converter (not shown) and inputted to one input terminal A, B, and C, respectively, and the other input terminal D is , E, and F by inputting electromotive forces Eu, Ev, and EW, respectively.

このように入力を供給することにより第1図に示した前
述の掛算器と全く同様に作動(第2図)して電流1u,
v,Iwと起電力Eu,Ev,Ewとがそれぞれ掛算さ
れて演算増幅器0PAにより加算され、三相瞬時電力P
−UEu+IvEv+IwEwが出力端子Pから得られ
る。しかしながら、上述のように構成された従来におけ
る時分割式の三相掛算器は回路が複雑で点検が煩雑であ
るばかりでなく、製造コストが嵩む難点があつた。
By supplying the input in this way, the multiplier operates in exactly the same way as the multiplier shown in FIG.
v, Iw and the electromotive forces Eu, Ev, Ew are respectively multiplied and added by the operational amplifier 0PA, resulting in three-phase instantaneous power P.
−UEu+IvEv+IwEw is obtained from the output terminal P. However, the conventional time-sharing type three-phase multiplier constructed as described above not only has a complicated circuit and is troublesome to inspect, but also has the drawback of increasing manufacturing costs.

そこで、発明者は鋭意研究並びに工夫を重ねた結果、第
3図に示される従来の三相掛算器において、一力の入力
端子A,B,Cに供給される三相電気量が零相分を含ま
ない三相平衡入力の場合には、抵抗R2を流れる電流1
2は開閉素子Sの開閉により断続して流れるため三相分
を加算しても零にならないが、反転増幅器REVを経て
抵抗R1を流れる電流1,は演算増幅器0PAにより3
相分が加算された場合には、そそぞれの電流が三相平衡
状態にあるため、次式11(u)+i1(v)+I,(
w)=0に示すようにその和が常に零になることを知見
し、これにより次のように回路の簡素化が図れることを
突き止めた。
Therefore, as a result of intensive research and efforts, the inventor found that in the conventional three-phase multiplier shown in Fig. 3, the three-phase electrical quantity supplied to the single-power input terminals A, B, and C is equal to the zero-phase amount. In the case of a three-phase balanced input that does not include the current 1 flowing through the resistor R2
Since the current 2 flows intermittently due to the opening and closing of the switching element S, it does not become zero even if the three phases are added, but the current 1 flowing through the resistor R1 via the inverting amplifier REV is reduced to 3 by the operational amplifier 0PA.
When the phase components are added, each current is in a three-phase equilibrium state, so the following equation 11 (u) + i1 (v) + I, (
We found that the sum is always zero as shown by w) = 0, and found that this allows the circuit to be simplified as follows.

すなわち、掛算する2組の三相電気量のうち、一力が零
相分を含まない場合においては、従来の時分割式三相掛
算器の回路から三相各相に設けられた反転増幅器および
これと直列に接続された直列抵抗を削除しても全く同じ
作用を行わせることができ、回路が簡素化されて前述の
難点が一挙に解消されるばかりでなく、さらに精度が向
上することが判つた。従つて、本発明の一般的な目的は
、少くとも一力の多相電気量が零相分を含まない2組の
多相電気量の各相それぞれの積の和を演算する時分割式
の多相掛算器において、回路の簡素化を図り低廉なコス
トで製造することができると共に高精度の出力を得るこ
とができる多相掛算器を提供するにある。
In other words, if one of the two sets of three-phase electrical quantities to be multiplied does not include a zero-phase component, an inverting amplifier and Even if the series resistor connected in series is removed, the exact same effect can be achieved, which not only simplifies the circuit and eliminates the above-mentioned difficulties at once, but also further improves accuracy. I understand. Therefore, the general object of the present invention is to provide a time-sharing method for calculating the sum of the products of each phase of two sets of polyphase electrical quantities in which at least one polyphase electrical quantity does not include a zero-phase component. It is an object of the present invention to provide a polyphase multiplier which can be manufactured at a low cost by simplifying the circuit and can obtain a highly accurate output.

この目的を達成するため、本発明においては、少なくと
も一方の多相電気量が零相分を含まない2組の多相電気
量の各相毎の積の和を演算する時分割式多相掛算器にお
いて、第1の多相入力端子の各組とフイルタ回路の入力
端子との間に夫々直列接続される開閉素子と、第2の多
相入力端子に夫々接続される比較増幅器と、これらの比
較増幅器の入力端に基準信号を供給する発振器とを設け
、各比較増幅器からの出力信号により前記各相の開閉素
子を開閉操作するよう構成すると共に、前記第1の多相
入力端子に入力する多相電気量としては零相分を含まな
い多相電気量を選ぶことを特徴とする。
In order to achieve this objective, the present invention uses a time-sharing polyphase multiplication method that calculates the sum of products for each phase of two sets of polyphase electrical quantities in which at least one of the polyphase electrical quantities does not include a zero-phase component. A switching element connected in series between each set of first polyphase input terminals and the input terminal of the filter circuit, a comparator amplifier connected respectively to the second polyphase input terminal, and An oscillator that supplies a reference signal is provided at the input end of the comparison amplifier, and the output signal from each comparison amplifier is configured to open and close the switching elements of each phase, and is input to the first polyphase input terminal. It is characterized in that a multiphase electrical quantity that does not include a zero phase component is selected as the multiphase electrical quantity.

前記の多相掛算器において、比較増幅器の入力端に接続
される発振器は三角波の基準電圧を発生する三角波発振
器で構成すれば好適である。
In the polyphase multiplier described above, it is preferable that the oscillator connected to the input terminal of the comparator amplifier be constituted by a triangular wave oscillator that generates a triangular wave reference voltage.

次に、本発明に係る多相掛算器の実施例につき添付図面
を参照しながら以下詳細に説明する。第6図は、三相掛
算器の電気回路を示すもので、一方の三相電気量を供給
する入力端子A,B,Cをそれぞれ抵抗10a,10b
,10cを介して開閉素子12a,12b,12cの一
力の接点に接続すると共に、開閉素子12a,12b,
12cの他力の接点を三相一括して接続し、この接続点
に演算増幅器14と平滑コンデンサ16とを並列に接続
し、この出力側端子を掛算器出力端子Pに接続する。抵
抗10a〜10cと演算増幅器14と平滑コンデンサ1
6は3入力加算のローパスフイルタを構成している。ま
た、他方の三相電気量を供給する入力端子D,E,Fを
三相各相の比較増幅器18a,18b,18cのそれぞ
れの(へ)入力端子に接続すると共に、三相共通に設け
た三角波発振器20の出力端子を比較増幅器18a,1
8b,18cのそれぞれの(ト)入力端子に接続し、さ
らに比較増幅器18a,18b,18cのそれぞれの出
力端子を開閉素子12a,12b,12cのそれぞれの
操作信号入力端子A,b,cに接続する。このように構
成した本発明の掛算器は、第3図に示す従来の三相掛算
器と比較した場合、反転増幅器およびその直列抵抗が削
除されているほかは全く同じである。
Next, embodiments of the polyphase multiplier according to the present invention will be described in detail below with reference to the accompanying drawings. Figure 6 shows the electric circuit of a three-phase multiplier, in which input terminals A, B, and C that supply one three-phase quantity of electricity are connected to resistors 10a and 10b, respectively.
, 10c to the single-power contacts of the switching elements 12a, 12b, 12c, and the switching elements 12a, 12b, 10c.
The external force contacts 12c are connected for three phases at once, and the operational amplifier 14 and smoothing capacitor 16 are connected in parallel to this connection point, and this output side terminal is connected to the multiplier output terminal P. Resistors 10a to 10c, operational amplifier 14, and smoothing capacitor 1
6 constitutes a three-input addition low-pass filter. In addition, the input terminals D, E, and F for supplying the other three-phase electric quantity are connected to the respective input terminals of the comparison amplifiers 18a, 18b, and 18c for each of the three phases, and are also provided in common for the three phases. The output terminal of the triangular wave oscillator 20 is connected to the comparison amplifier 18a, 1
8b, 18c, and further connected to the respective output terminals of the comparison amplifiers 18a, 18b, 18c to the respective operation signal input terminals A, b, c of the switching elements 12a, 12b, 12c. do. When compared with the conventional three-phase multiplier shown in FIG. 3, the multiplier of the present invention constructed in this manner is completely the same except that the inverting amplifier and its series resistance are omitted.

従つて、一力の入力端子A,B,Cに供給する三相電気
量が零相分を含まない平衡三相電気量である場合には、
前述の理由により、第3図に示す従来の三相掛算器と全
く同じ作用を行う。例えば、第4図に示す交流機の三相
平衡電流の検出値1u,,Iwを一方の入力端子A,B
,Cに供給し、各相の起電力検出値Eu,Ev,Ewを
他方の入力端子D,E,Fに供給した場合は、入力され
た2組の三相電気量の各相それぞれの積の和、ずなわち
P=IuEu+IvEv+IwEw により表わされる三相瞬時電力Pを出力端子Pから取り
出すことができる。
Therefore, if the three-phase quantity of electricity supplied to input terminals A, B, and C of one power is a balanced three-phase quantity of electricity that does not include the zero-phase component,
For the reasons stated above, it performs exactly the same function as the conventional three-phase multiplier shown in FIG. For example, the detected values 1u, , Iw of the three-phase balanced current of the AC machine shown in Fig. 4 are input to one input terminal A, B.
, C, and the electromotive force detection values Eu, Ev, Ew of each phase are supplied to the other input terminals D, E, F, the product of each phase of the input three-phase electric quantities A three-phase instantaneous power P expressed by the sum of P=IuEu+IvEv+IwEw can be taken out from the output terminal P.

また、上述の実施例においては、三相瞬時電力Pの演算
について説明したが、次式1112=Iu2+Iv2+
Iw2 に示す演算を行つて三相電流の絶対値111を求めるこ
ともできる。
In addition, in the above embodiment, the calculation of the three-phase instantaneous power P was explained, but the following formula 1112=Iu2+Iv2+
The absolute value 111 of the three-phase current can also be obtained by performing the calculation shown in Iw2.

さらに、第7図に示す交流機の各相間の磁束ΦUv,Φ
Vw,(1)Wuから)次式1012=ΦUv2+ΦV
w2+ΦWv2に示す演算を行つて、三相磁束の絶対値
1Φlを求めることができると共に次式TOIwOuv
+Iu(1)Vw+Iv(1)Wuに示す演算を行つて
トルクTを求めることもできる。
Furthermore, the magnetic flux ΦUv, Φ between each phase of the alternating current machine shown in Fig. 7
Vw, (1) from Wu) following formula 1012 = ΦUv2 + ΦV
By performing the calculation shown in w2+ΦWv2, the absolute value 1Φl of the three-phase magnetic flux can be obtained, and the following formula TOIwOuv
The torque T can also be determined by performing the calculation shown in +Iu(1)Vw+Iv(1)Wu.

本発明によれば、少くとも一方の多相電気量が零相分を
含まない2組の多相電気量の各相それぞれの積の和を計
算する時分割式の多相掛算器を簡単な構成により低廉な
コストで製造することができると共に精度の向上を図る
ことができる等多くの利点が得られる。
According to the present invention, a time-sharing polyphase multiplier that calculates the sum of the products of each phase of two sets of polyphase electrical quantities in which at least one of the polyphase electrical quantities does not include a zero-phase component can be simplified. The configuration provides many advantages such as being able to manufacture at low cost and improving accuracy.

以上、本発明の好適な実施例について説明したが、本発
明の精神を逸脱しない範囲内において種種の設計変更を
なし得ることは勿論である。
Although the preferred embodiments of the present invention have been described above, it goes without saying that various design changes can be made without departing from the spirit of the present invention.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は一般の時分割掛算器の基本的な構成を示す電気
回路図、第2図は第1図に示す時分割掛算器の作用を示
す波形図、第3図は従来における時分割式三相掛算器の
構成を示す電気回路図、第4図は三相掛算器により掛算
する交流機の2組の三相電気量を示す説明図、第5図は
第3図に示す三相掛算器の構成を簡略化して示すプロツ
ク線図、第6図は本発明に係る多相掛算器の一実施例を
示す電気回路図、第7図は三相掛算器により掛算する交
流機におけるその他の三相電気量を示す説明図である。 10a,10b,10c・・・・・・直列抵抗、12a
,12b,12c・・・・・・開閉素子、14・・・・
・・演算増幅器、16・・・・・・平滑コンデンサ、1
8a,18b,18c・・・・・・比較増幅器、20・
・・・・・三角波発振器。
Fig. 1 is an electric circuit diagram showing the basic configuration of a general time-sharing multiplier, Fig. 2 is a waveform diagram showing the action of the time-sharing multiplier shown in Fig. 1, and Fig. 3 is a conventional time-sharing multiplier. An electric circuit diagram showing the configuration of a three-phase multiplier, Fig. 4 is an explanatory diagram showing two sets of three-phase electric quantities of an AC machine multiplied by a three-phase multiplier, and Fig. 5 shows the three-phase multiplication shown in Fig. 3. FIG. 6 is an electric circuit diagram showing an embodiment of the multiphase multiplier according to the present invention, and FIG. It is an explanatory view showing three-phase electric quantity. 10a, 10b, 10c...Series resistance, 12a
, 12b, 12c...Switching element, 14...
...Operation amplifier, 16...Smoothing capacitor, 1
8a, 18b, 18c... Comparison amplifier, 20.
...Triangle wave oscillator.

Claims (1)

【特許請求の範囲】 1 少なくとも一方の多相電気量が零相分を含まない2
組の多相電気量の各相電気量の各相毎の積の和を演算す
る時分割式多相掛算器において、第1の多相入力端子の
各相とフィルタ回路の入力端子との間に夫々直列接続さ
れる開閉素子と、第2の多相入力端子に夫々接続される
比較増幅器と、これらの比較増幅器の入力端に基準信号
を供給する発振器とを設け、各比較増幅器からの出力信
号により前記各相の開閉素子を開閉操作するよう構成す
ると共に、前記第1の多相入力端子に入力する多相電気
量としては零相分を含まない多相電気量を選ぶことを特
徴とする多相掛算器。 2 特許請求の範囲第1項記載の多相掛算器において、
比較増幅器の入力端に接続される発振器は三角波の基準
電圧を発生する三角波発振器からなる多相掛算器。
[Claims] 1. At least one multiphase electrical quantity does not include a zero phase component. 2.
In a time-sharing polyphase multiplier that calculates the sum of the products of each phase of each phase of a set of polyphase electrical quantities, between each phase of the first polyphase input terminal and the input terminal of the filter circuit. A switching element connected in series to each of the second polyphase input terminals, a comparison amplifier connected to each of the second polyphase input terminals, and an oscillator that supplies a reference signal to the input terminals of these comparison amplifiers are provided, and an output from each comparison amplifier is provided. The switching element of each phase is configured to be opened and closed by a signal, and the multiphase electrical quantity that does not include a zero phase component is selected as the multiphase electrical quantity input to the first multiphase input terminal. A polyphase multiplier. 2. In the polyphase multiplier according to claim 1,
The oscillator connected to the input terminal of the comparison amplifier is a polyphase multiplier consisting of a triangular wave oscillator that generates a triangular wave reference voltage.
JP1853278A 1978-02-22 1978-02-22 polyphase multiplier Expired JPS5946033B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1853278A JPS5946033B2 (en) 1978-02-22 1978-02-22 polyphase multiplier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1853278A JPS5946033B2 (en) 1978-02-22 1978-02-22 polyphase multiplier

Publications (2)

Publication Number Publication Date
JPS54111736A JPS54111736A (en) 1979-09-01
JPS5946033B2 true JPS5946033B2 (en) 1984-11-09

Family

ID=11974229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1853278A Expired JPS5946033B2 (en) 1978-02-22 1978-02-22 polyphase multiplier

Country Status (1)

Country Link
JP (1) JPS5946033B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6423607A (en) * 1987-07-17 1989-01-26 Otis Elevator Japan Multiphase multiplier circuit

Also Published As

Publication number Publication date
JPS54111736A (en) 1979-09-01

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