JPS5946106B2 - ultra high speed transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ultrahigh-speed transistor that operates in a high frequency region.

In recent years, one of the attempts to speed up semiconductor transistors is
Metal-based transistors have been proposed.

Figure 1 is an energy band diagram of a metal-based transistor under zero bias conditions, with an nf semiconductor emitter 1
, a metal thin film base 2 and an n-semiconductor collector 3, and as shown in the figure, under zero bias conditions, a Schottky junction 4, 5, a depletion layer is generated. FIG. 2 is a diagram showing the energy band structure in the operating state of a metal-based transistor. 5 is forward and reverse biased. Electrons in the nf semiconductor emitter 1 are injected into the metal thin film base 2 in response to a forward bias applied between the nf semiconductor emitter 1 and the metal thin film base 2. If the metal thin film base 2 is sufficiently thin, the majority of electrons can pass through the metal thin film base 2 and reach the n-semiconductor collector depletion layer 3. In other words, the current flowing from the emitter to the collector can be controlled using a minute charge required to set the potential of the metal thin film base 2. This transistor structure has two advantages compared to conventional bipolar transistors: 1. Since the base region is made of metal, there is no reduction in switching speed due to minority carrier accumulation. 2. Since the base region is as thin as about 100λ, the travel time of carriers in the base region is not a problem.

3. Since the base region is made of metal, the base resistance is low and the switching delay due to the base resistance is small.

6 However, it was difficult to put the F-type device into practical use because it was necessary to further form a semiconductor on top of the metal that forms the Schottky barrier.

The present invention was made for the purpose of eliminating the above-mentioned drawbacks, and the heterojunction formed between the El-V group semiconductor mixed crystals has good interface characteristics, and single crystals with different mixed crystal ratios can be freely formed. Focusing on the fact that superimposed growth can be performed, the Schottky barrier in the metal-based transistor is made of a wide-gap semiconductor thin film, and the highly conductive layer made of metal is grown under appropriate bias conditions. By replacing it with a highly conductive inversion layer generated at the interface, existing technology provides an ultrahigh-speed transistor with gain in a frequency band of several THz or higher.

The present invention will be explained below.

The ultrahigh-speed transistor according to the present invention is made of GaAs-GaAl.
A cross-sectional view a and a plan view b of an example made of an As-based compound semiconductor are shown, respectively. In the figure, 11 is an emitter electrode;
12 is n+GaAs emitter region, 13 is non-doped G
aAlAs thin film layer, 14 is a base electrode, 15 is an n+ diffusion layer for base contact, 16 is a low resistance inversion layer generated at the heterojunction interface, 17 is a p-GaAs collector region, 1
8 is an n+GaAs substrate, and 19 is a collector electrode. The standard thickness of the non-doped GaAlAs thin film 13 is 200 mm.
The typical thickness of the P-GaAs collector region 17 is 8-2000 μm. 4th, 5th
, 6 shows the zero bias conditions (as shown in the 4th diagram), 0FF (as shown in the 5th diagram), and 0N (as shown in the 6th diagram) of the transistor according to the present invention.
FIG. 7 shows energy band diagrams during operation. Now, as shown in FIG. 4, a non-doped GaAlAs thin film layer 13 is sandwiched between the n+ GaAs emitter region 12 and the p-GaAs collector region 17.
This non-doped GaAlAs layer 13 serves as a diffusion barrier of approximately 0.3 eV for electrons in the n+GaAs emitter region 12.

The interface between the non-doped GaAlAs layer 13 and the p-GaAs collector region 17 is depleted, and no inversion layer is formed. FIG. 5 shows the distance between the n+ GaAs emitter region 12 and the base contact n+ diffusion layer 15 (FIG. 3).
Moderately weak forward bias, n+ diffusion layer 1 for base contact
5 (FIG. 3) is an energy band diagram when a reverse bias of 1 to 2 is applied to the n+GaAs substrate 18. n+G
By applying a forward bias between the aAs emitter region 12 and the base contact n+ diffusion layer 15 (FIG. 3), the non-doped GaAlAs thin film layer 13 and the p-GaAs collector region 1 are
A high mobility inversion layer is formed between the base layer 16 and the low resistance base layer 16.
is formed. In addition, the p-GaAs collector region 17
By lowering the conduction band level at p-
The electric field generated in the GaAs collector region 17 acts in a direction to accelerate electrons toward the n+GaAs substrate 18 side.
In FIG. 5, electrons in the n+ GaAs emitter region 12 are blocked by the non-doped GaAlAs thin film layer 13 and are not injected into the p-GaAs collector region 17.

That is, this figure shows the 0FF state of the transistor. FIG. 6 shows that by further biasing the n+ GaAs emitter region 2 and the n+ diffusion layer 15 for base contact (FIG. 3), electrons in the n+ GaAs emitter region 12 are generated by the non-doped GaAlAs thin film 13 to about 0. 3
The case where the eV diffusion wall is exceeded is shown. Most of the electrons emitted from the n+GaAs emitter region 12 beyond the non-doped GaAlAs thin film layer 13 pass through the low resistance inversion layer 16 and are directed toward the n+GaAs substrate 18 by the electric field in the p-GaAs collector region 17. be accelerated. That is,
This figure shows the ON state of the transistor. The technical advantages of the ultra-high speed transistor according to the present invention are listed below: 1. The non-doped GaAlAs layer 13 (Fig. 4) and the low resistance inversion layer 16 (Fig. 4) correspond to the base region of a conventional bipolar transistor, and the total thickness of both is designed to be several hundred λ or less. This becomes possible.

Therefore, it is possible to shorten the base area travel distance of the carrier by about one hundredth. 2. Non-doped GaAlAs layer 13 corresponding to the base region of a conventional transistor
(FIG. 4) and the low resistance inversion layer 16 (FIG. 4), an electric field exists in the direction of accelerating the carrier, and the base running speed of the carrier is high.

3. Low resistance inversion layer 16 generated at the hetero interface (Figure 4)
Because it is filled with high-mobility two-dimensional electrons, it can maintain a low base resistance.

Therefore, signal delay due to parasitic capacitance can be reduced. It turns out that.

As explained above, the present invention reduces the carrier transit time to about 1/100 compared to conventional bipolar transistors without increasing the base resistance by utilizing the high mobility layer generated at the hetero interface. This realizes an ultra-high speed transistor that can be shortened and operates in a high frequency region of several TH2 or more.

[Brief explanation of drawings]

FIGS. 1 and 2 are energy band diagrams of a metal-based transistor at zero bias and operating conditions, respectively. FIG. The plan view of the example, Figures 4, 5, and 6 are respectively under zero bias condition and 0F.
FIG. 3 is an energy band diagram during F and ON operation. In the figure, 1 is an n+ semiconductor emitter, 2 is a metal thin film base,
3 is the n-semiconductor collector, 4 is the shot barrier generated at the interface between the n+ semiconductor emitter and the metal thin film base, 5 is the shot barrier generated at the interface between the n-semiconductor collector and the metal thin film base, 11 is the emitter electrode, 12 is n+G
aAs emitter region, 13 a non-doped GaAlAs thin film layer, 14 a base electrode, 15 a base contact n
16 is a low anti-inversion layer, 17 is a p-GaAs collector region, 18 is an n+ GaAa substrate, and 19 is a collector electrode.

Claims (1)

[Claims] 1. An emitter made of a semiconductor material with a relatively high carrier density, a base region having a thickness sufficient to prevent tunneling of carriers from the emitter and having a forbidden band width wider than the emitter region, and a base region made of a semiconductor material with a relatively low concentration of carriers. An ultrahigh-speed transistor characterized by comprising a collector region formed by a depletion layer with an impurity concentration of