JPS5947399B2 - Peak voltage holding circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a peak voltage holding circuit that is composed of a comparator, an analog switch, an FET transistor, and a capacitor, has a quick response, has a long holding time, and is inexpensive.

An object of the present invention is to provide a peak voltage holding circuit that maintains analog voltage with a quick response and to dramatically extend the holding time.

Still another object of the present invention is to provide an inexpensive peak voltage holding circuit.

An example of a conventional peak voltage holding circuit will be explained with reference to FIG.

The conventional peak voltage holding circuit includes an operational amplifier type 101, a low leakage diode 102, and a low leakage diode 102. capacitor 103
, reset switch 104, high input impedance F
ET105, is composed of resistor 106, and when an input larger than the output is input, the output of the operational amplifier 101 becomes (1).
After reaching saturation, the low leak capacitor 103 is charged, and the output of the capacitor 105 is increased. When the output reaches a magnitude equal to the input, the output of 101 is inverted and saturated according to the law of 9, and charging is terminated. Here, the response is approximately determined by the saturation output voltage of 101 and the equivalent resistance of 102, except for the capacitance of 103.

However, the saturation output voltage of 101 is usually -1.5V lower than that of the first power supply, and the forward voltage of 102 is about 0.7V. From the above, if you operate at a low power supply voltage, for example ±3V, the response will be slow, and it will not follow a large input voltage (for example, 2.5V), and the output of the above 105 will become saturated at a low voltage. Put it away.

Further, the retention time is determined by the sum of 7-7 of 102 above, 103 above, and 105 above. 103 above, 10 above
If a styrene capacitor and MOS type FET are used for 5, low leakage characteristics can be achieved at a relatively low cost.
The above 103 is difficult, and there are some products that claim to have low leakage and are on the order of 100 PA, but even this is large in terms of the target leakage and is expensive.

The present invention eliminates such drawbacks, and one embodiment will be described with reference to FIG.

One of the embodiments according to the present invention is composed of a comparator 201, an analog switch 202, a capacitor 203, a reset switch 204, a FET transistor 205, and a resistor 206. When the input changes in one direction, the output of the above 201 saturates to 1. Then, the above 202 is turned on, and the above 203 is charged. Therefore, when the output of the above 205 increases and reaches the same level as the input, the output of the above 201 is inverted and becomes the same level as the input.
02 is turned off and the output is held. Therefore, to charge the capacitor 203, simply turn on one power supply voltage to the capacitor 202.
Since it charges through a resistor, it follows the input level to almost the same as the power supply voltage, and the response is relatively fast.

Further, the leakage when the analog switch 202 is OFF can be relatively easily reduced to the order of 10 PA in the case of an 0M0S transmission gate, and the cost is also lower than that of a low leakage diode. As described above, according to the present invention, it is possible to follow a wide input voltage range even with a low power supply voltage, and to achieve a quick response.

Furthermore, it is possible to create a peak voltage holding circuit that is relatively inexpensive and has a long holding time.

[Brief explanation of the drawing]

FIG. 1 shows an example of a conventional peak voltage holding circuit, and FIG. 2 shows an example of an embodiment of the peak voltage holding circuit according to the present invention. 101... operational amplifier, 102... diode, 103... capacitor, 105...
...FET transistor, 106...Low resistance, 201...Comparator, 202...
・Analog switch, 204... Capacitor,
205...FET transistor, 206...
...Low resistance.

Claims (1)

[Claims] 1. A power source for supplying charge to the capacitor, a switch means for switching the current flowing into the capacitor, a buffer amplifier means for detecting the potential of the capacitor without missing the charge stored in the capacitor, and the output and input of the buffer amplifier. a peak voltage holding circuit comprising a comparator for comparing voltages and controlling the switching means by the output of the comparator;