JPS5947510B2 - Calling signal sending method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a calling signal sending system for terminals such as telephones.

A conventional circuit for sending out a calling signal has, for example, the configuration shown in FIG. 1, in which RC is a relay control terminal, I
R is the terminal for the IR calling signal sound source, SIYU is the terminal for the SIR calling signal sound source, VIR is the terminal for the VIR calling signal sound source, 5
is an IR signal sending relay, T is a SIR or VIR signal sending relay, s is a contact of the s relay, is a contact of a T relay, F is an AC static relay, R is a resistor for DC current control, g
, and g2 are contacts of a relay for sending out a calling signal, V is a power supply, LINEI and LINE2 are lines, and TEL is a telephone set.

First, a conventional calling signal sending system will be explained using FIG. In the case of calling a general terminal, it is necessary to supply an IR signal to the terminal, and the control section drives the relay S to the ON state through the terminal RC. As a result, contact s of relay S
is closed and the IR signal is IR-s-F-gl-LINEI-
It flows in a loop of TEL-LINE2-g2-R-V, and a telephone equipment VCIR signal as a terminal is sent out. Further, it is necessary to send an SIR signal in the case of mutual extension calling, and a VIR signal in the case of videophone calling, and the control section drives relay T to the ON state through terminal RC.

This closes the contact t of the relay T, and the SIR signal or V
The IR signal is SlR(VIR)-t-F-g1-LIN
Flows in the loop of ElTEL-LINE2-G2-R-,
Is there a SIR signal or V on the terminal? A signal is sent out. In the conventional system, the relays themselves are large, relays are required for the number of call signal sound sources, two trunks are required if both are used because it is determined whether to supply SIR or VIR signals depending on the application, and CR signal transmission is required. The disadvantage was that a separate trunk was required, making it impossible to achieve a smaller size or economy. Electronic subscriber circuits with integrated functions have also been reported (for example, "IEICE Technical Research Report, Vol. 79,
Black 34, SE79-19P. 51, Chapter 3, Figure 2), having various signal and sound sources individually increases the number of switches and interface lines, which is undesirable. In order to solve these drawbacks, the present invention integrates various sound sources classified according to intermittent patterns into a single pattern (for example, continuous signal) IIC, and provides a circuit for setting the transmission pattern, so that the sound sources can be Generates arbitrary intermittent patterns
The purpose of this invention is to make it possible to send out various kinds of ringing signal tones, and to also be able to use it as a current self-holding type switch.Examples will be described in detail below.

FIG. 2 is a block diagram of the main parts of the first embodiment of the present invention, where BF is a talking current supply circuit, DET is a ring trigger detection circuit, CRG is a CR signal sound source SWl, SW2 is an opening/closing circuit, and SEL is a pattern selection circuit. circuit, MEM is a memory for pattern selection, CRCTR is a counter for generating CR signal patterns, IRCTR is a mounter for generating IR signal patterns,
SIRCTR is the SIR signal pattern generation counter νV
IRCTR is a VIR signal pattern generation counter AND
l~AND4 are AND circuits, NOTl and NOT2 are NOT circuits, XOR is an exclusive OR circuit, DH is a delay circuit, T
1 is the CR signal pattern, T2 is the IR signal pattern, T3
is the SIR signal pattern, T4 is the VIR signal pattern, P
is a control information input terminal from a control section (not shown).

Note that the same symbols as in FIG. 1 indicate the same parts. Figure 3 a-g
2 shows an example of the waveform of signals A to G at each part in FIG. 2, where τ is the delay time of the delay circuit DH, and tl is the switching circuit SWl.
T2 indicates the time when the switching circuit SW2 closes.

When the telephone equipment is in an on-hook state and an incoming connection call occurs, a control section (not shown) applies ringing signal transmission request information to terminal PVc.

In the memory MEMVC, call signal types and switch drive information are written in accordance with requests from the control unit.
The counter CRCTRIRCTR99SIRCTR, VI is set in the pattern selection circuit SEL according to the contents continuously output from EM.
Select one of the signal patterns T1 to T4 generated by the RCTR.

Note that since the CR signal pattern T indicates a signal pattern in which the signal is sent out without interruption, it can also be set to the constant logic 611. If the output A selected by the pattern selection circuit SEL has the waveform shown in FIG. 3a, the output B of the delay circuit DH is delayed by a delay time τ as shown in FIG. 3BVC.

The output C of the exclusive OR circuit XOR is as shown in FIG. 3c, and the output D of the NOT circuit NOT2 is the inversion of the output C, so it is as shown in FIG. 3d. Also, since the output E of the NOT circuit NOTl is the inversion of the output A of the pattern selection circuit SEL, it is as shown in FIG. 3e, and the output F of the AND circuit AND2 is as shown in FIG. The results are shown in Figure 3g. According to the switch drive information written in the memory MEN, the output H becomes 61'', so the output F of the AND circuit AND2 is sent to the switching circuit SWl via the AND circuit AND4.
Further, the output G of the AND circuit ANDl is applied as a control signal to the switching circuit SW2 via the AND circuit AND3, whereby the switching circuit SWl is closed for a time t1, and the switching circuit SW2 is closed for a time T2. The signal from the CR signal sound source CRG is transmitted to the telephone device intermittently.

At this time, the switching circuits SW1 and SW2 are both open for the delay time τ, so that the operation delay time from ON to OFF can be guaranteed when a current self-holding type switch is used. Also, various calling signals can be sent from the CR signal sound source CRG according to the signal pattern selected by the pattern selection circuit SEL.

When stopping the sending of the calling signal, the control section applies calling signal stop request information to the terminal P, and switch release information is written in the memory MEM in accordance with the request.

As a result, the output of the memory MEM becomes H06, and the AND circuits AND3 and AND4 are closed, so the switching circuits SWl and SW2 are turned off, and the CR signal sound source CRG
And the Earth's Qi will be separated. Although Fig. 2 shows the case where there is only one type of ringing signal sound source, there are different signal sound sources (one type).
If signals other than 6H2 are used in combination, this can be realized using the same concept as in FIG.

FIG. 4 is a block diagram of the main part of the second embodiment of the present invention,
This is for the case where paging signals are sent to multiple subscribers in a time-division manner, where SC is a subscriber circuit and CMC is a common control circuit.

REG is a register installed corresponding to each subscriber circuit and stores control information, CTR is a counter, DEC is a decoder for decoding the count contents of counter CTR and specifying a subscriber circuit, and RAM is a register for each subscriber circuit. RPTN is a writable memory that stores the call state of the memory RA.
M is an area for storing the type of calling signal, ON is an area for storing whether or not the calling signal is being sent, P'' is an input terminal from the control unit, and DF is a delay circuit. The same reference numerals as in the figure indicate the same parts.The operation thereof will be explained next.

The memory RAM stores the calling states of all subscribers, which can be controlled in a time-division manner, and a counter CTR sequentially specifies the address of the area of the memory RAM allocated to each subscriber. This addressed memory area becomes readable or writable. In the case of sending a paging signal, when a call for an incoming connection occurs, the address of the memory corresponding to the desired subscriber circuit is sent as a paging signal from among the information applied from the control unit to the terminal P'' when specified by the counter CTR. Transfer pattern information to the RPTN area with switch drive information (logic ``1''
1) are respectively written in the 0N area. In this example, RP
By allocating 2 pits per subscriber in the TN area, 4
By setting the different ring signal types and allocating one pit per subscriber to the ON area, the drive state of the ring signal switch (logic ``1'' causes the ring signal to be sent; logic ``0'' causes the ring signal to be sent;
”, the calling signal is stopped).The counter CTR specifies a memory address in the memory RAM and at the same time sends the subscriber circuit number corresponding to the memory address to the decoder DEC, and the decoder DEC selects the desired number. Select a subscriber circuit and drive the register REC of the subscriber circuit.Read the call signal type in the RPTN area of the specified memory address and select the desired call signal pattern from the pattern selection circuit SELilC. The series of operations from the output to the output of the AND circuits ANDl and AND2 is the same as that described in the first embodiment.The register REG contains information of the memory RAM (7) 0N area and output information of the AND circuit ANDl or AND2. The result of the logical product is input, but in this case, since the ON area information is 1, the AND circuit AND1 or AND2 sampled at the read cycle of the corresponding memory address is input.
The output information is written to the register REGilC via AND circuits AND3 and AND4.

The switching circuits SWl and SW2 are alternately opened and closed according to the accumulation result of the register REG, and the CR signal and the earth signal are alternately sent to the terminal, making it possible to send out the desired calling signal.

Also, the operation of temporarily opening both switches when switching the switch is performed using the delay means and the exclusive OR circuit X, as in the first embodiment.
This is realized by a combination function of OR, but in order to realize a time-divided delay means, the delay time needs to be an integral multiple of the read cycle of the memory address, and for example, a shift register may be used as the delay circuit DF. Next, the case of stopping the transmission of the calling signal will be explained. The calling signal sending stop information is stored in the memory RAMf)0N area by the same operation as when sending out the calling signal. Write "0". The read result of this 0N area is input to AND circuits AND3 and AND4, and regardless of the output of pattern selection circuit SEL, AND circuit AND3
, AND4 output becomes "0", and "0" is written in register REG. By the output of this register REG, both switching circuits SWl and SW2 are opened, and it can be completely separated from the CR signal sound source and the earth. The above operations are performed on a time-division basis for multiple subscribers, making it possible to send desired paging signals to multiple subscriber circuits using one signal sound source and one common control circuit CMC. .

Although FIG. 4 shows a case where only one type of calling signal sound source is used, a case where different signal sound sources (signals other than 16 Hz) are used together can also be realized using the same concept as in FIG. 4. FIG. 5 is a main part block diagram of the third embodiment of the present invention, showing only the common control circuit part, DEL is a delay memory area, and the other parts of FIG. 1, FIG. The same symbols as in FIG. 4 indicate the same parts.

The selection of the calling signal pattern is the same as in the case of FIG.
The selected call signal information is written in the DEL area of the memory RAM, and a similar operation is performed while being sequentially moved to the next address by the counter CTR.

When the operation completes one cycle, a similar write operation is performed, but if the contents of the address are read just before the write operation, information delayed by the one cycle time of the write operation is obtained, and a delay function is realized. Therefore, by performing the logical product of the delay result and the output information of the pattern selection circuit SEL subjected to a logical operation such as an exclusive OR circuit, the pattern selection circuit is operated in the same manner as in the first embodiment. From the point of change in the SEL output, all switches are opened for the time required to go around the DEL area, and the calling signal pattern information is sent to the subscriber circuit. When stopping the sending of the calling signal, the calling signal sending stop information ``0'' is written in the memory RAM f)0N area in the same manner as described in FIG. Although FIG. 5 shows the case where one type of calling signal sound source is used, a case where different signal sound sources are used together can also be realized using the same concept as shown in FIG. FIG. 6 is a block diagram of an embodiment of the present invention when the memory access timing is divided into three in the call signal sending circuit shown in FIG. REG2 is a soft write data register, REG3 is a soft write address register, SEL is a soft address/hard address selector, SEL2 is a soft data/hard data selector, 0DRDEC distributes orders from the control unit. decoder, WECNT is a soft write enable timing generation circuit, SSL is a subscriber circuit specification circuit, DECI is a package selection decoder, BUF is a circuit selection buffer circuit, PSL is a package selection terminal, CSL is a circuit selection terminal, CLK is a clock signal, THS is hardware/software selection information, THR is a hard read clock, THW
' is the hard write clock, in FIG. 6A, TA is the memory accessible time allocated to one subscriber, and H is
R is hard read time, SW is soft write time, HW
is the hard write time.

In addition, in Fig. 6, Fig. 1, Fig. 2, Fig. 4, and Fig. 5 are
The same reference numerals as in the figure indicate the same parts, and FIG. 6A shows an example of the waveforms of the signals 'RHS, THR, TSW, and THW in FIG. In this embodiment, the time TA during which the memory can be accessed allocated to each subscriber is divided into three, and each of the three divided times is allocated to read out the contents written in the memory RAM. RAM
The operation of adding a certain logical operation to the read content during the time SW and HR time allotted for writing to change the content written in, and then writing the information after adding the operation to the same address again. Time to do HWII
I have C assignment X. When a call signal sending request is issued from the control unit, a memory change command for the memory RAM and a drive command for the registers REG2 and REG3 are sent to the decoder 0DRDEC.

At the same time as this operation, switch drive information and call signal type information are written into the register REG2, and address information of the memory area where the specified subscriber circuit data is stored is written into the register REG3. THS is information for distinguishing between hard time and soft time, and is separated by selectors SEL1 and SEL2 by reversing the polarity. The memory change operation is performed by sending out a write enable signal at the timing of σw generated by the write enable timing generation circuit WECNT at the time of SW, specifying a memory address from the register REG3 through the selector SEL1,
Switch drive information and call signal type are written from register REG2 through selector SEL2. This information is HR of the time TA allocated to the same subscriber in the next cycle.
By sending out a σ-fast timing signal at the time , the signal is written into the register REGl, and a desired calling signal pattern is selected by the pattern selection circuit SEL in the same manner as in FIG. The selected output is written into the memory RAM f)DEL area through the selector SEL2 by sending out a σD timing signal at the time HW within the time TA in order to perform the same delay operation as in FIG. At this time, the contents of the register REG1 read at the same time TAf)HR are written again to the same address in the ON area and the RPTN area. The information written in the DEL area is read out at a timing σ at a time HR in the time TA allocated to the same subscriber in the next cycle. AND circuits ANDl, AND2, AND3, AND4,
NOT circuit NOTl, NOT2, exclusive OR circuit XOR
This logic circuit is operated to create a delay time, but one input of the AND circuit AND3 is taken out from the memory RAM (r) DEL area, and this logic operation part may be the same circuit as the embodiment shown in FIG. . The above operation opens and closes the ringing signal switch, and the subscriber circuit designation circuit SSL
When the subscriber circuit is specified, opening/closing information is written in the register of the subscriber circuit, and a calling signal can be sent. Note that if the number of subscribers that can be stored in the memory RAMlfC is M, the time during which both switches are open is MXTA. Next, when you want to stop sending out the calling signal, use the same operation as sending out the calling signal, and use the memory RA at the time of TA(:r)Sw.
Mf) Just write "01" in the 0N area.Although Fig. 6 shows the case where one type of ringing signal sound source is used, Fig. 6 can be realized using the same concept even when different signal sound sources are used together. .

In FIGS. 2, 4, 5, and 6, by assigning a specific pattern in the RPTN area of the memory RAM as the switching circuit off, the readout output of the memory RAM is detected, and the output of the detection result is It is also possible to omit the memory RAMf)0N area for controlling the calling signal sending opening/closing circuit. As explained above, the present invention provides switching circuits SWl, SW for opening and closing signal sound sources such as CR signal sound source CRG.
2, means such as a counter for generating various call signal patterns such as CR signal pattern, IR signal pattern, SIR signal pattern, IR signal pattern, etc., and pattern selection circuit S
A selection means for selecting a call signal pattern such as EL, a storage means for storing the call state in a memory MEM, RAM, etc.;
It is equipped with delay means such as delay circuits DH and DF and a delay memory area DEL of memory RAM, selects a ringing signal pattern according to the stored ringing state, and controls the opening/closing circuit according to the selected ringing signal pattern. The signal from the signal sound source can be sent as a ringing signal, and various ringing signals can be easily created. When a new ringing signal is needed, the ringing signal pattern can be easily changed or added. can be dealt with.

Furthermore, when driving the switching circuit in the closing direction, all switching circuits are driven to a disconnected state during the period from the change point of the output of the selection means to the change point of the delayed output of the delay means. It is possible to guarantee the turn-off time when the switch is configured with a current self-holding type switch, and it is possible to reliably prevent the output of the signal sound source from being short-circuited.

Also, if multiple subscriber circuits are controlled in a time-sharing manner,
The more common parts there are, the more economical the structure becomes.

In addition, the present invention is not limited only to the above-mentioned embodiments, and various additions and changes can be made.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a conventional calling signal sending system, FIGS. 2, 4, 5, and 6 are main part block diagrams of respective embodiments of the present invention, and FIG. 3 is a diagram similar to that shown in FIG. Operation explanatory diagram, 6th A
The figure is a timing explanatory diagram of FIG. 6. Place...telephone, LINE1, LINE2...railway,
BF...Talking current supply circuit, DET...Ring trip circuit, CRG...CR signal sound source, SWl, SW2
...Opening/closing circuit, SEL...Pattern selection circuit, DH
, DF...delay circuit, CRCTR...counter for CR signal pattern generation, IRCTR...counter for IR signal pattern generation, SIRCTR...counter for SIR signal pattern generation, VIRCTR...for VIR signal pattern generation Counter, MEM...memory for pattern selection, RAM...memory, RPTN...memory area for call signal type, ON...memory area for call state, DEL
...Delay memory area, SC...Subscriber circuit, CM
C...Common control circuit, CTR...Counter, REG
, REGl~REG3...Register, DEC, DEC
l, ODRDEC...decoder, SELl, SEL2
···selector.

Claims (1)

[Claims] 1. An opening/closing circuit that opens and closes a signal sound source, means for generating various ringing signal patterns, selection means for selecting the various ringing signal patterns, storage means for storing the ringing state, and an output selected by the selection means. delay means for delaying the signal, the selection means selects the ringing signal pattern according to the ringing state stored in the storage means, and controls the switching circuit according to the selected ringing signal pattern to delay the signal. When the signal from the sound source is sent out as a calling signal and the switching circuit is driven in the closing direction, the switching circuit is completely operated during the period from the change point of the output of the selection means to the change point of the delayed output of the delay means. A calling signal sending method characterized by driving the device into a disconnected state.