JPS5950105B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved wiring structure of a highly reliable semiconductor device having a wiring layer mainly made of gold, which is called a beam lead element or a trimetal element.

BACKGROUND ART Conventionally, a method called beam lead or tri-metal is widely known as a highly reliable semiconductor device having a wiring layer mainly made of gold instead of aluminum wiring which is easily corroded.

In this method, first, in order to make contact with the silicon substrate surface, platinum is deposited by sputtering after a contact hole is made, and platinum silicide is formed on the substrate silicon surface by heat treatment. Metals are deposited in this order to form a wiring layer. The purpose of using titanium is to improve adhesion in the parts of the insulating base other than the contact holes. However, this method is difficult to apply to, for example, MOS devices because the process is complicated and electrical damage occurs due to platinum sputtering. The present invention has been made to eliminate the above-mentioned drawbacks, and provides a semiconductor device device that simplifies the process, can be applied to MOS devices, and does not sacrifice high reliability.

In order to achieve the above object, the semiconductor device of the present invention does not perform any of the conventional steps of platinum vapor deposition, formation of platinum silicide (PtSi) by silittering, platinum removal, and titanium vapor deposition, but instead uses chemical vapor deposition (chemical vapor deposition). Silicon is deposited using a CVD method, followed by platinum and then gold.

In the conventional process, jittering was performed to form platinum silicide to improve electrical contact, but in the present invention, the silicon underlying the platinum is used not only in the contact openings but also in the insulating layer. The effective area of the platinum layer silicon contact has increased, and since there is no platinum removal process, P is insoluble in the platinum etchant.
This is not a particularly necessary step in the present invention because there is no need to form a tSi layer. In conventional processes, titanium was used in place of platinum, which is a noble metal that has poor adhesion to silicon dioxide films, but as is known, titanium is used in place of platinum, which is a noble metal that has poor adhesion to silicon dioxide films. It has good adhesive properties and is a chemically more stable substance than titanium. Furthermore, even if platinum is deposited on a silicon film by sputtering, there will be no discharge damage because the silicon film is a conductive material. Although silicon is inferior to metal materials such as titanium as a conductive material, gold is originally the main conductive material in beam lead or trimetal technology, and the conductivity of silicon is not a particular obstacle. Also, doping silicon with impurities such as phosphorus and boron that gives it conductivity,
Measures such as partially removing silicon from only the contact openings can be used as necessary. The present invention will be explained in detail below with reference to Examples.

FIG. 1 shows an example in which the metal wiring of the present invention is applied to a silicon gate MOS device. A source 2 and a drain region 3 are formed on a surface portion of a semiconductor substrate 1, and an insulating layer 4 and polycrystalline silicon layers 5 and 6 are formed on the surface. After the contact openings for the source-drain and polysilicon layers have been formed, a 500-2000 phosphorus or boron doped polysilicon layer 7 and a 2000-layer platinum layer 8 are deposited by CVD, respectively. It is deposited by sputtering method. Heated aqua regia was used as the etchant for platinum and silicon. After processing using a fluoro-nitric acid solution, 1.2 μm of gold is deposited and processed. Changes in processing methods and procedures are also possible.
The following structure can also be considered as a modification.

That is, after forming a contact hole, silicon not doped with impurities is deposited, and this silicon layer is removed from only a portion of the contact portion to expose the underlying electrode. After this, platinum deposition, platinum processing, gold deposition, and gold processing are performed. In this structure, the silicon layer covers virtually the entire surface of the chip;
Works effectively as a protective film. A reader current of 1,000 yen flows through the silicon film, but the specific resistance of silicon is 106
Since it is approximately 108 ΩCm, when the thickness is around 1000 people, the resistance between two adjacent wirings easily becomes 1010 Ω or more, which is not a substantial problem in many cases. In this structure, silicon covers not only the top of the insulating film but also the side surfaces of the insulating film through the contact openings, so it is very effective against intrusion of dirt from the outside during and after the metal film is deposited.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention.

Claims (1)

[Claims] 1 The lower layer, middle layer and upper layer are each a silicon layer,
A semiconductor device in which a wiring layer consisting of a three-layer film consisting of a platinum layer and a gold layer is connected to the surface of a semiconductor substrate through a contact hole.