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JPS5952559B2 - Printed wiring board manufacturing method - Google Patents
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JPS5952559B2 - Printed wiring board manufacturing method - Google Patents

Printed wiring board manufacturing method

Info

Publication number
JPS5952559B2
JPS5952559B2 JP11745781A JP11745781A JPS5952559B2 JP S5952559 B2 JPS5952559 B2 JP S5952559B2 JP 11745781 A JP11745781 A JP 11745781A JP 11745781 A JP11745781 A JP 11745781A JP S5952559 B2 JPS5952559 B2 JP S5952559B2
Authority
JP
Japan
Prior art keywords
oil
printed wiring
solder resist
wiring board
paint
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11745781A
Other languages
Japanese (ja)
Other versions
JPS5818995A (en
Inventor
勝利 松本
博己 田部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dainippon Screen Manufacturing Co Ltd
Original Assignee
Dainippon Screen Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dainippon Screen Manufacturing Co Ltd filed Critical Dainippon Screen Manufacturing Co Ltd
Priority to JP11745781A priority Critical patent/JPS5952559B2/en
Publication of JPS5818995A publication Critical patent/JPS5818995A/en
Publication of JPS5952559B2 publication Critical patent/JPS5952559B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Description

【発明の詳細な説明】 本発明は、半田付け不良や回路間の短絡事故等のない完
全なプリント配線回路板を作成しうるプリント配線基板
(以下単に基板という)の製造方法、特にソルダーレジ
ストを用いる方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a printed wiring board (hereinafter simply referred to as a board) that can create a complete printed wiring circuit board without soldering defects or short-circuit accidents between circuits, and in particular, a method for manufacturing a printed wiring board (hereinafter simply referred to as a board) using a solder resist. It relates to the method used.

第1図は、従来の基板1を示すもので、絶縁板2の表面
には、所定のパターンにエッチングした銅箔3が貼着さ
れている。
FIG. 1 shows a conventional board 1, in which a copper foil 3 etched in a predetermined pattern is adhered to the surface of an insulating plate 2.

この所定パターンは、電子部品および回路の相互接続の
ために設けられた導体部と部品端子を接続するための部
分、すなわちランド4で形成されている。
This predetermined pattern is formed of lands 4, which are portions for connecting conductor portions and component terminals provided for interconnection of electronic components and circuits.

このランド4の中央部には、電子部品の端子や電気接続
用のリード線等を通すための孔5があけられている。こ
の基板1の孔5には、リード線や電子部品の脚6等を差
込み、基板1のランド4に溶融半田で固着して、電気的
に接続する。
A hole 5 is provided in the center of the land 4 for passing terminals of electronic components, lead wires for electrical connection, and the like. A lead wire, a leg 6 of an electronic component, etc. is inserted into the hole 5 of the substrate 1, and is fixed to the land 4 of the substrate 1 with molten solder for electrical connection.

しかし、パターンの密集した、しかも同一平面での半田
付作業では、まれに、近接する導体間に、局部的に半田
ブリッジ8がかかつて、回路間が短絡することがある。
However, when soldering is performed with dense patterns on the same plane, solder bridges 8 may occasionally form locally between adjacent conductors, resulting in a short circuit between circuits.

また、上述の事故を防止するためと、さらに、ほこりや
湿気の付着による回路間の絶縁低下や、銅箔3の腐食を
防止するため、第3図に示すように、上記基板1と同様
の基板11の、半田付けすべきランド12のみ残して、
全面をソルダーレジスト膜13をもつて被覆した後、溶
融半田に浸漬する方法が採用されている。
In addition, in order to prevent the above-mentioned accident, as well as to prevent the insulation between the circuits from deteriorating due to the adhesion of dust and moisture, and the corrosion of the copper foil 3, as shown in FIG. Leaving only the land 12 of the board 11 to be soldered,
A method is adopted in which the entire surface is covered with a solder resist film 13 and then immersed in molten solder.

このソルダーレジスト膜13は、その目的上、厚膜が要
求されるので、従来は、シルクスクリーン印刷により形
成されている。
Since this solder resist film 13 is required to be thick for its purpose, it has conventionally been formed by silk screen printing.

しかし、シルクスクリーン印刷法は、使用する、紗の伸
縮により、画像に歪が生じて印刷位置精度が悪く、第3
図に示すように、ソルダーレジスト膜13におけるラン
ド12を露出させるべき窓孔14が、ランド12よりず
れて、部品の半田付けが不良になつたり、紗の目詰まり
により、基板1θ1の被覆すべき部分が露出したり、第
4図に示すように、ソルダーレジスト塗料の性質上、導
体の角部に途料が完全に入らない欠落部15が生じたり
、また、気泡が生じて、半田付時の熱によつてソルダー
レジストが破れたりして、半田付けの跡!5が甚だ見苦
しくなつたりした。
However, with the silk screen printing method, the image is distorted due to the expansion and contraction of the gauze used, and the printing position accuracy is poor.
As shown in the figure, the window hole 14 that should expose the land 12 in the solder resist film 13 is shifted from the land 12, resulting in defective soldering of components, or the gauze is clogged, causing the window hole 14 that should expose the land 12 to be removed from the board 1θ1. As shown in Figure 4, due to the nature of the solder resist paint, missing parts 15 may occur at the corners of the conductor where the filler cannot be completely filled, or air bubbles may occur during soldering. The solder resist may be torn due to the heat, leaving soldering marks! 5 became extremely unsightly.

本発明は、上述の欠点を解消した基板の製造方法に関す
るもので、以下、第5図〜第8図に基いて具体的に説明
する。
The present invention relates to a method of manufacturing a substrate that eliminates the above-mentioned drawbacks, and will be specifically described below with reference to FIGS. 5 to 8.

第5図は、上記基板1と同様のパターンにエッチングし
た基板21を示すもので、22は絶縁板、23は銅箔、
24はランドである。
FIG. 5 shows a substrate 21 etched in the same pattern as the substrate 1, in which 22 is an insulating plate, 23 is a copper foil,
24 is a land.

このランド24の中央部に、塗膜としてソルダーレジス
ト塗料を撥き、かつこの塗膜の溶剤がソルダーレジスト
塗料の溶剤と異なる塗料(以下撥油性塗料という)を塗
布し乾燥させて、撥油性塗膜25を形成する。
At the center of this land 24, a paint that repels the solder resist paint as a coating film and whose solvent is different from that of the solder resist paint (hereinafter referred to as an oil-repellent paint) is applied and dried to form an oil-repellent coating. A film 25 is formed.

撥油性塗料としては、たとえば、あまに油系塗,料85
%にシリコンオイル15%を混合したもの等を使用する
ことができる。
As the oil-repellent paint, for example, linseed oil-based paint 85
% and 15% silicone oil can be used.

塗布後、100℃で約10分間乾燥させることにより、
撥油性塗膜25が形成される。このものは、従来のソル
ダーレジスト膜を形成するスクリーン印刷とは異なる一
般的なオフセット印刷方法等、好ましくは本出願人によ
る特願昭54−157315号(特開昭56一
号)の1凹版印刷版及び印刷方法」により、ランド
24に、容易に位置精度よく印刷することができる。
After application, by drying at 100°C for about 10 minutes,
An oil-repellent coating film 25 is formed. This method is preferably applied to a general offset printing method, which is different from the conventional screen printing for forming a solder resist film, and is preferably applied in Japanese Patent Application No. 54-157315 (Japanese Unexamined Patent Application Publication No. 56-119) filed by the present applicant.
No. 1 Intaglio printing plate and printing method", it is possible to easily print on the land 24 with good positional accuracy.

ついで、ソルダーレジスト塗料を、たとえばロールコー
タ等で、基板21の全面に塗布して乾燥すると、第6図
に示すように、基板21は、ソルダーレジスト膜26を
もつて被覆されるが、撥油性塗膜25の部分のみが撥か
れて、窓孔27が形成される。しかる後、ソルダーレジ
スト膜26を溶解せず、撥油性塗膜25を溶解する、た
とえば無鉛ガソリンのような溶剤中に暫時浸漬し、ブラ
シ等で撥油性塗膜25を除去して、取付部24の中央に
取付孔28を穿設すれば、第7図と第8図に示すように
、正しく窓孔27がランド24上に位置して、ソルダー
レジスト膜26に被覆された基板21が得られる。
Next, when a solder resist paint is applied to the entire surface of the substrate 21 using a roll coater or the like and dried, the substrate 21 is coated with a solder resist film 26 as shown in FIG. 6, but it is not oil repellent. Only a portion of the coating film 25 is repelled to form a window hole 27. Thereafter, the mounting portion 24 is temporarily immersed in a solvent such as unleaded gasoline that does not dissolve the solder resist film 26 but dissolves the oil-repellent coating 25, and removes the oil-repellent coating 25 with a brush or the like. By drilling the mounting hole 28 in the center of the board, the window hole 27 is correctly positioned on the land 24 and the board 21 covered with the solder resist film 26 is obtained, as shown in FIGS. 7 and 8. .

本発明の方法は、上述のように、印刷容易な撥油性塗膜
25をもつて、一たんランド24の中央部を覆つて、窓
孔27を形成するので、印刷位置精度がよく、従来のシ
ルクスクリーン印刷法により形成した上記窓孔14のよ
うに、ランド12よりずれることはない。
As described above, in the method of the present invention, the easy-to-print oil-repellent coating film 25 is used to once cover the central part of the land 24 to form the window hole 27, so the printing position accuracy is good and the conventional Unlike the window hole 14 formed by silk screen printing, it does not shift from the land 12.

また、ソルダーレジスト塗料は、ロール塗装あるいは浸
漬塗装しうるので、第4図に示すような欠落部15が生
じたり、塗装むらが生じたりすることはない。
Furthermore, since the solder resist paint can be applied by roll coating or dip coating, no missing portions 15 or uneven coating as shown in FIG. 4 will occur.

従つて、本発明方法によつて製造された基板21を使用
すれば、常に半田付け不良や回路間の短絡等の事故のな
い、品質の良好なプリント配線回路板を作成することが
できる。
Therefore, by using the board 21 manufactured by the method of the present invention, it is possible to create a high-quality printed wiring circuit board that is always free from accidents such as poor soldering and short circuits between circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来のプリント配線基板の要部拡大平面図、
第2図は、同じく半田付後における第j図A−A線断面
図、第3図は、従来の方法によりソルダーレジスト膜を
形成したプリント配線基板の要部拡大平面図、第4図は
、第3図B−B線断面図、第5図〜第8図は、本発明方
法を説明するためのもので、第5図は、取付部に撥油性
塗料を塗布したプリント配線基板の要部拡大平面図、第
6図は、ソルダーレジスト塗料を塗布したプリント配線
基板の第5図C−C線に相当する断面図、第7図は、撥
油性塗膜を除去し、取付孔を穿設した第6図に相当する
図、第8図は、同じく平面図である。 1・・・・・・プリント配線基板、2・・・・・・絶縁
板、3・・・・・・銅箔、4・・・・・・ランド、5・
・・・・・孔、6・・・・・・脚、7・・・・・・半田
、8・・・・・・半田ブリッジ、11・・・・・・基板
、]2・・・・・・ランド、13・・・・・・ソルダー
レジスト膜、14・・・・・・窓孔、15・・・・・・
欠落部、21・・・・・・基板、22・・・・・・絶縁
板、23・・・・・・銅箔、24・・・・・・ランド、
25・・・・・・撥油性塗膜、26・・・・・・ソルダ
ーレジスト膜、27・・・・・・窓孔、28・・・・・
・孔。
Figure 1 is an enlarged plan view of the main parts of a conventional printed wiring board.
FIG. 2 is a sectional view taken along the line A-A in FIG. Figure 3 is a sectional view taken along the line B-B, and Figures 5 to 8 are for explaining the method of the present invention. An enlarged plan view, Fig. 6 is a sectional view corresponding to the line C-C in Fig. 5 of the printed wiring board coated with solder resist paint, and Fig. 7 shows the oleophobic coating removed and mounting holes drilled. FIG. 8, which corresponds to FIG. 6, is also a plan view. 1... Printed wiring board, 2... Insulating board, 3... Copper foil, 4... Land, 5...
...hole, 6 ... leg, 7 ... solder, 8 ... solder bridge, 11 ... board, ]2 ... ... Land, 13 ... Solder resist film, 14 ... Window hole, 15 ...
Missing part, 21... Board, 22... Insulating plate, 23... Copper foil, 24... Land,
25...Oil repellent coating film, 26...Solder resist film, 27...Window hole, 28...
- Hole.

Claims (1)

【特許請求の範囲】 1 プリント配線基板のランドに、塗膜がソルダーレジ
スト塗料を撥き、かつ塗膜の溶剤がソルダーレジスト塗
料の溶剤と異なる撥油性塗料を塗布し乾燥させて塗膜を
形成し、ついでその全面に、ソルダーレジスト塗料を塗
布して乾燥させ、前記撥油性塗膜の部分に、該塗膜に撥
かれた窓孔を形成した後、撥油性塗膜のみを溶解する溶
剤をもつて、該塗膜を除去することを特徴とするプリン
ト配線基板の製造方法。 2 撥油性塗料が、あまに油系油性インキとシリコンオ
イルとで成る特許請求の範囲第1項記載のプリント配線
基板の製造方法。
[Scope of Claims] 1. A coating film is formed by applying an oil-repellent coating film that repels the solder resist paint and in which the solvent of the coating film is different from the solvent of the solder resist paint to the land of a printed wiring board and drying it. Then, a solder resist paint is applied to the entire surface and dried, and after forming a window hole in the oil-repellent paint film, a solvent that dissolves only the oil-repellent paint film is applied. A method for manufacturing a printed wiring board, comprising the step of removing the coating film. 2. The method for manufacturing a printed wiring board according to claim 1, wherein the oil-repellent paint comprises linseed oil-based oil-based ink and silicone oil.
JP11745781A 1981-07-27 1981-07-27 Printed wiring board manufacturing method Expired JPS5952559B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11745781A JPS5952559B2 (en) 1981-07-27 1981-07-27 Printed wiring board manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11745781A JPS5952559B2 (en) 1981-07-27 1981-07-27 Printed wiring board manufacturing method

Publications (2)

Publication Number Publication Date
JPS5818995A JPS5818995A (en) 1983-02-03
JPS5952559B2 true JPS5952559B2 (en) 1984-12-20

Family

ID=14712136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11745781A Expired JPS5952559B2 (en) 1981-07-27 1981-07-27 Printed wiring board manufacturing method

Country Status (1)

Country Link
JP (1) JPS5952559B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59121895A (en) * 1982-12-27 1984-07-14 イビデン株式会社 Method of producing printed circuit board
JPS60137096A (en) * 1983-12-26 1985-07-20 藤森工業株式会社 Method of producing printed circuit unit
JP4563939B2 (en) * 2003-09-11 2010-10-20 太陽インキ製造株式会社 Insulation pattern forming method
JP5768574B2 (en) * 2011-08-05 2015-08-26 三菱電機株式会社 Method for manufacturing printed wiring board

Also Published As

Publication number Publication date
JPS5818995A (en) 1983-02-03

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