JPS5953708B2 - Flip chip face bonding method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a face bonding method for connecting a flip chip to a wiring conductor by a solder reflow method (solder remelting method).

In hybrid ICs, transistors, monolithic ICs, or other electronic elements are bonded to wiring conductors on a wiring board as flip chips by reflow bonding (
(Face bonding using solder reflow method) to form a highly reliable electronic circuit.

Reflow bonding is superior to face bonding using ultrasonic methods or thermocompression methods in terms of mass productivity and reliability, and is a method that can fully demonstrate the advantages of face bonding. FIGS. 1 and 2 are for explaining a conventional method of rib collar bonding a flip chip.

In FIG. 1, 1 is a flip chip, 2 is a bump electrode of the flip chip, 3 is a wiring board, and 4 is a wiring conductor. The bump electrode 2 is a substantially hemispherical protruding electrode, and has a structure in which a solder layer 6 is coated on a support portion 5 made of a Cu plating layer or a Cu ball. The material of the solder layer 6 is Pb-
It is Sn eutectic solder. The wiring conductor 4 is coated with a solder layer 7 in advance. Fig. 1 shows the state in which the flip chip 1 is temporarily fixed on the wiring conductor 4. When heat treatment is performed in this state, the solder layers 6 and 7 melt and become integrated, as shown in Fig. 2. Reflow bonding is performed as follows. This method also provides highly reliable bonding, but there is still room for further improvement.

In particular, as shown in FIG. 3, bonding failures are likely to occur due to the uneven thickness of the solder layer 7 covering the wiring conductor 4. As shown on the left side of the drawing, if the solder layer 7 is too thick, excess solder will adhere to the surface of the flip chip 1, causing poor voltage resistance and short circuits between the electrodes.As shown on the right side of the drawing, if the solder layer 7 is too thick, If the solder layer 7 is too thin, sufficient bonding strength cannot be obtained and open defects are likely to occur.Also, if the solder layer 7 is thin, the solder layer 7 loses its metallic luster and becomes cloudy during the heat treatment for reflow bonding, and the solder layer 7 becomes cloudy due to the heat treatment for reflow bonding. The adhesion properties may be significantly reduced.If the thickness of the solder layer 7 is uneven, some of the bump electrodes 2 will not come into contact with the solder layer 7 in the temporarily fastened state shown in FIG. 1, resulting in poor bonding. In a flip chip having a large number of bump electrodes, this problem of non-contact during temporary fixing is likely to occur.Solder layer 7 is formed by immersion in a solder bath, a so-called solder dip. Often.

Although solder dips are very good in terms of workability and economy, it is difficult to control the thickness of the solder layer 7 uniformly. Although it is possible to control the thickness of the solder layer 7 with considerable precision by using a method such as screen printing a solder paste, it has the disadvantage that it requires expensive equipment and materials and has poor workability. In order to avoid defective bonding due to non-uniform thickness of the solder layer 7, the flip chip 1 is directly reflow bonded to the wiring conductor 4 without providing the solder layer 7, as shown in FIG. 4.

That is, since the amount of solder in the solder layer 6 serving as a brazing material is small, the bonding strength is low and good bonding cannot be performed. Open defects are also likely to occur. In order to increase the amount of solder in the solder layer 6, reflow bonding is performed directly on the wiring conductor 4 using a flip chip 1 in which the bump electrode 2 is made up of only the solder layer 6, as shown in FIG.

That is, since the bump electrode 2 is not provided with the support portion 5, the bump electrode 2 is crushed, and solder adheres to the surface of the flip chip 1, causing a breakdown voltage failure and a short circuit between the electrodes. Conventionally, eutectic solder is often used as the material for the solder layer 6 constituting part or all of the bump electrode 2, and even when non-eutectic solder is used, there is a temperature range in which the solid phase and liquid phase coexist. It is close to eutectic solder at 10°C or less. By the way, the heat treatment temperature of solder in face bonding of flip chips is set to a temperature exceeding the upper limit of the temperature range in which solid phase and liquid phase coexist even in the case of non-eutectic solder. Therefore,
Since the solder layer 6 becomes completely molten during the heat treatment, reflow bonding as shown in FIG. 5 is inevitable, although there are differences in degree. As a method to prevent the bump electrode 2 from being crushed, as shown in FIG. 6, a glass film 8 that does not get wet with solder is formed by screen printing to partition the tip 9 of the wiring conductor 4, and reflow bonding is performed. There is a way.

Even if the solder layer 6 constituting the bump electrode 2 melts, it only wets the small area of the tip 9, so the bump electrode 2 will not be crushed even without the support portion 5 due to the surface tension of the solder. . However, if the position of the glass film 8 is shifted, the area of the tip portion 9 changes and the height of the bump electrode 2 differs, resulting in bonding defects such as open defects. Therefore, this method has the drawback that it requires an extra step of printing the glass film 8 and also requires a highly accurate printing technique. The present invention is intended to solve the above-mentioned conventional drawbacks, and the temperature range in which the solid phase and liquid phase coexist is 30°C.
This is a flip chip face bonding method characterized by directly reflow bonding a flip chip whose bump electrode solder layer is made of non-eutectic solder at a temperature of 0.degree. C. or higher to a wiring conductor. The present invention will be specifically explained below based on the drawings.

7 to 10 are for explaining one embodiment of the present invention.

FIG. 7 is a plan view showing a state in which the flip chip 1 is temporarily fixed on the wiring conductor 4, and FIG. 8 is a sectional view taken along the line A--A in FIG. 7. The flip chip 1 is a silicon transistor, and two of the four bump electrodes 2 are collector electrodes C,
The other two are an emitter electrode E and a base electrode B, respectively. The wiring board 3 is an alumina thin plate. Wiring conductor 4 is A
A g-Pd thick film conductor material is screen printed and fired. The flip chip 1 is temporarily fixed using the adhesive force of a rosin flux 10 applied onto the wiring conductor 4. The bump electrode 2 is a substantially hemispherical protruding electrode with a radius of 100 μm, and is composed of a solder layer 6 made of a non-eutectic solder of Pb:Sn:Ag=57:38:5. Incidentally, the flip chip 1 shown in FIG. 8 is shown in detail in an explanatory sectional view as shown in FIG. 9.

In FIG. 9, 11 is an N+ type collector layer, 12 is an N type collector high resistance layer, 13 is a P type base layer, ]4 is an N type emitter layer, 15 is an Al wiring layer, 16 is a Cr layer, 17 is a C
In the u layer, 18 is a SiO2 film, and 19 is a glass film. The solder layer 6 consists of solder balls having the above-mentioned composition and a Cu layer 17.
It is heat fused to. The total thickness of the Cr layer 16 and the Cu layer 17 is about 10 to 20 μm, and they do not play the role of the pillar portion 5 of the bump electrode 2. In order to fulfill the role of the support column 5, the combined thickness of the Cr layer 16 and the Cu layer 17 is usually required to be 40 μm or more. When heat treatment is performed for 10 to 15 seconds in an electric furnace at 240° C. from the state shown in FIG. 7 or 8, reflow bonding is performed as shown in FIG. 10.

Eutectic solder rapidly transitions to a molten state when the temperature exceeds a certain temperature, whereas non-eutectic solder often transitions to a completely molten state after a period of time in a semi-molten state where solid and liquid phases coexist. In this example, the non-eutectic solder of Pb:Sn:Ag=57:38:5 used as the material of the solder layer 6 is in a solid phase up to 178.7°C.
．． In the temperature range of about 58°C (8°C), the solid phase and the liquid phase coexist in a semi-molten state, and in the temperature range of 236.8°C or higher, the material becomes completely liquid and becomes a molten state. In the heat treatment here, the solder layer 6 is actually heated at 22°C, which is slightly lower than the electric furnace temperature of 240°C.
Since the temperature remains between 0° C. and 230° C., it becomes a semi-molten state in which a solid phase and a liquid phase coexist. Since the solder layer 6 in a semi-molten state is hard enough to support the weight of the flip chip 1, the bump electrode 2 will not be crushed. The solder layer 6 in a semi-molten state has a molten portion, and the portion in contact with the wiring conductor 4 has a particularly large number of molten portions due to the action of the rosin flux 10, so that it is bonded to the wiring conductor 4. A non-eutectic solder with Pb:Sn:Ag=57:38:5 in which the temperature range in which the solid phase and liquid phase coexist is 50° C. or more is suitable for mass production because it is easy to set heat treatment conditions.
Since the bump electrode 2 is substantially composed of only the solder layer 6, there is no shortage of solder that serves as a brazing material for bonding. Therefore, bonding yield, strength,
Good results can be obtained in terms of reliability and other aspects. The face bonding method of the present invention described above is as follows. It has the following advantages: First, since reflow bonding is performed directly on the wiring conductor 4, there is no need to cover the wiring conductor 4 with the solder layer 7 in advance. Therefore, the solder layer 7
Bonding failures due to non-uniform thickness of the solder layer 7 do not occur, and a process for covering the solder layer 7 is not necessary. The pattern design of the wiring conductor 4 also becomes easier with a greater degree of freedom. That is, when forming the solder layer 7 using a solder dip, in order to make the thickness of the solder layer 7 as uniform as possible, the wiring conductors 4 may be aligned in one direction or the wiring conductors 4 may be formed into a special shape. Although such efforts have been made, this is no longer necessary. Also,
Since the bump electrode 2 is not crushed by the heat treatment for reflow bonding, there is no need to provide the support portion 5 on the bump electrode 2, and there is no need to partition the tip 9 of the wiring conductor 4 with the glass film 8. do not have.

As described above, the face bonding method of the present invention has many effects such as being able to shorten the series of steps related to face bonding, including manufacturing the flip chip 1 and forming the wiring conductor 4, as well as reducing the occurrence of bonding defects. It has high industrial value.

Note that the present invention is not limited to the embodiments and can be modified in various ways.

For example, the solder constituting the solder layer 6 of the bump electrode 2 is limited to non-eutectic solder of Pb:Sn:Ag=57:38:5 if the temperature range where the solid phase and liquid phase coexist is 30°C or higher. do not have. However, the temperature range in which solid and liquid phases coexist is 30°C.
With a non-eutectic solder of less than 100%, it is difficult to control the temperature in the heat treatment for reflow bonding so that the solder layer 6 is in a semi-molten state suitable for reflow bonding, and bonding defects are likely to occur. The flip chip 1 is not limited to a transistor, but may be a semiconductor element such as a monolithic IC or a diode, or other electronic element such as a resistor or a capacitor. The wiring conductor 4 is not limited to a thick film conductor, but may be a thin film conductor or a printed wiring conductor, or may be a lead wire-shaped metal plate that also serves as the wiring board 3.

[Brief explanation of drawings]

1 to 6 are cross-sectional views for explaining the conventional face bonding method. FIGS. 7 to 10 are for explaining the face bonding method of the present invention. FIG.
9 is an explanatory sectional view of the flip chip, and FIG. 10 is a sectional view showing the state of bonding. 1... flip chip, 2...
Bump electrode, 3... Wiring board, 4...
Wiring conductor, 5... Support section, 6, 7...
Solder layer, 8...Glass film, 9...Tip of wiring conductor, 10...Rosin-based flux.

Claims (1)

[Claims] 1 The solder layer of the bump electrode is composed of a non-eutectic solder in which the temperature range in which the solid phase and liquid phase coexist is 30°C or higher, and there is substantially no part that can serve as a support other than the solder layer. After temporarily fixing the flip chip on which the bump electrode is formed on a wiring conductor that is not covered with solder, the solder layer of the bump electrode is heated to a temperature within the temperature range where the solid phase and liquid phase of the solder coexist. 1. A face bonding method for a flip chip, characterized in that the flip chip is connected to the wiring conductor by soldering through the solder layer of the bump electrode by heating the flip chip to the wiring conductor.