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JPS596584B2 - Single stone converter - Google Patents
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JPS596584B2 - Single stone converter - Google Patents

Single stone converter

Info

Publication number
JPS596584B2
JPS596584B2 JP54116210A JP11621079A JPS596584B2 JP S596584 B2 JPS596584 B2 JP S596584B2 JP 54116210 A JP54116210 A JP 54116210A JP 11621079 A JP11621079 A JP 11621079A JP S596584 B2 JPS596584 B2 JP S596584B2
Authority
JP
Japan
Prior art keywords
transformer
magnetic flux
circuit
capacitor
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54116210A
Other languages
Japanese (ja)
Other versions
JPS5641769A (en
Inventor
靖生 大橋
恒夫 村橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
NTT Inc
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd, Nippon Telegraph and Telephone Corp filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP54116210A priority Critical patent/JPS596584B2/en
Publication of JPS5641769A publication Critical patent/JPS5641769A/en
Publication of JPS596584B2 publication Critical patent/JPS596584B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/22Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33538Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Inverter Devices (AREA)

Description

【発明の詳細な説明】 本発明は一石式コンバータに関するもので、特に出力変
換用トランスの磁束リセット回路の改良に係る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single-stone converter, and particularly to an improvement in a magnetic flux reset circuit of an output conversion transformer.

第1図は従来の一石式コンバータの回路例を示すもので
、図において1は出力変換用トランス(以下単にトラン
スと云う)、Ia及びIbはその入力及び出力巻線、2
は半導体スイッチ(以下トランジスタと云う)、3は該
トランジスタ2の駆動回路、4は出力整流用のダイオー
ド、5は負荷を含む2端子回路網で、この2端子回路網
5は平滑用チョークコイル51、コンデンサ52、負荷
53及びフリーホィールダイオード54等により構成さ
れている。
Figure 1 shows an example of the circuit of a conventional single-stone converter.
is a semiconductor switch (hereinafter referred to as a transistor); 3 is a drive circuit for the transistor 2; 4 is a diode for output rectification; 5 is a two-terminal circuit network including a load; this two-terminal network 5 is a smoothing choke coil 51; , a capacitor 52, a load 53, a freewheel diode 54, and the like.

6はトランス1の磁束リセット回路でダイオード61、
抵抗62及びコンディサ63等により構成されている。
6 is a magnetic flux reset circuit for transformer 1, which includes a diode 61;
It is composed of a resistor 62, a condenser 63, and the like.

しかして、この回路の動作は駆動回路3の動作によりト
ランジスタ2がON(導通)すると直流電源E1よりト
ランス1の入力巻線1aに電流が流れる。これに伴い出
力巻線Ibに発生した電圧を整流用ダイオード4を介し
て整流して2端子回路網5に直流を給電する。一方、該
トランジスタ2がOFF(非導通)すると該トランス1
の入力(1次)巻線側に逆起電力が生じるが、これをリ
セット回路6のダイオード61で整流し抵抗62及びコ
ンデンサ63で充放電することによつて該トランス1の
磁束リセットを行う。
The operation of this circuit is such that when the transistor 2 is turned on (conducted) by the operation of the drive circuit 3, a current flows from the DC power supply E1 to the input winding 1a of the transformer 1. Along with this, the voltage generated in the output winding Ib is rectified via the rectifying diode 4 to supply direct current to the two-terminal circuit network 5. On the other hand, when the transistor 2 is OFF (non-conducting), the transformer 1
A back electromotive force is generated on the input (primary) winding side of the transformer 1, which is rectified by the diode 61 of the reset circuit 6 and charged and discharged by the resistor 62 and capacitor 63, thereby resetting the magnetic flux of the transformer 1.

しかしながら、このような従来回路は磁束リセット時(
トランジスタOFF時)にコンデンサ63に蓄積された
エネルギーを抵抗62を介して放電しこれを消費せしめ
ているために損失(ロス)が発生して効率低下を来たし
、又損失による装置全体の温度上昇を来たし他の部品等
に悪影響を及ぼすのみならず、装置の小型化阻害の原因
となつていた。更にトランス(鉄心)の磁束密度の使用
領域をB−H特性曲線上保磁力Hの片側(+側)のみし
か使用できず、又残留磁束密度Bの高い鉄心ではギャッ
プを設けて該残留磁束密度を低下せしめて使用するため
に効率低下の原因となる等の欠点があつた。本発明は叙
上の点を鑑み、トランスの磁束リセットを無効電流にて
行い、該トランスの磁束エネルギーは次のサイクルにお
いてトランジスタON時に2端子回路網(負荷側)に放
出するようにして従来回路の欠点を一挙に解決し、効率
向上,部品点数の消減及び温度上昇が少く小型化された
一石式コンバータを提供することを目的としたもので、
以下図面を用いて本発明を詳細に説明する。
However, such conventional circuits do not perform well when resetting the magnetic flux (
Since the energy stored in the capacitor 63 is discharged and consumed through the resistor 62 when the transistor is off (when the transistor is OFF), a loss occurs and the efficiency decreases, and the temperature of the entire device increases due to the loss. This not only adversely affects other parts, but also hinders miniaturization of the device. Furthermore, the magnetic flux density of the transformer (iron core) can only be used on one side (+ side) of the coercive force H on the B-H characteristic curve, and in the case of an iron core with a high residual magnetic flux density B, a gap is provided to reduce the residual magnetic flux density. It has disadvantages such as a decrease in efficiency because it is used at a reduced rate. In view of the above points, the present invention resets the magnetic flux of the transformer using a reactive current, and the magnetic flux energy of the transformer is released to the two-terminal circuit network (load side) when the transistor is turned on in the next cycle. The aim is to solve the shortcomings of the converter all at once, and to provide a compact single-stone converter that improves efficiency, reduces the number of parts, and reduces temperature rise.
The present invention will be explained in detail below using the drawings.

第2図は本発明の一実施例を示す回路図で従来例と同一
符号は同等部分を示す。すなわち、本発明は従来回路の
りセツト回洛6を除去し、これに代えて整流用ダイオー
ド4の両端にコZbサ71を設けると共に、該コンデン
サ71の容量をトランス1の磁束りセツト時(トランジ
スタ2の0FF時)終期に放電が完了するように選定し
た磁束りセツト回路7を設けたことを特徴とするもので
あるO次に本発明の回路動作について第3図,第4図及
び第5図を参照しつつ説明する。
FIG. 2 is a circuit diagram showing an embodiment of the present invention, and the same reference numerals as in the conventional example indicate equivalent parts. That is, the present invention eliminates the conventional circuit resetting circuit 6, and instead provides a capacitor 71 at both ends of the rectifying diode 4, and also increases the capacitance of the capacitor 71 when the magnetic flux of the transformer 1 is reset (transistor The present invention is characterized by the provision of a magnetic flux set circuit 7 selected so that the discharge is completed at the final stage (0FF time of 2). This will be explained with reference to the figures.

第3図は本発明回路の動作モード及びタイミング説明図
、第4図は各部動作波形図、第5図はトランスのB−H
の特性図である。しかして、いまモードO(トランジス
タ0N)タイミングT。
Fig. 3 is an explanatory diagram of the operating mode and timing of the circuit of the present invention, Fig. 4 is an operation waveform diagram of each part, and Fig. 5 is a B-H diagram of the transformer.
FIG. However, now mode O (transistor 0N) timing T.

に卦いてトランジスタ2が0Nするとトランス1の出力
巻線16の両端66間に第4図イの如く電圧が発生し、
これを整流用ダイオード4で整流して2端子回路網5に
給電する。モード1(りセツトその1)タイミングt1
においてトランジスタ2が0FFするとトランス1の磁
気エネルギー(逆起電力)による電流は先ずトランス出
力巻線端子5→2端子回路網5→[有]点→コンデンサ
71→端子Gの経路で流れてコンデンサ71を充電する
However, when the transistor 2 turns ON, a voltage is generated between both ends 66 of the output winding 16 of the transformer 1 as shown in FIG.
This is rectified by a rectifier diode 4 and fed to a two-terminal circuit network 5. Mode 1 (reset part 1) timing t1
When the transistor 2 turns 0FF, the current due to the magnetic energy (back electromotive force) of the transformer 1 first flows through the path of the transformer output winding terminal 5 → the two-terminal circuit network 5 → point [with] → the capacitor 71 → the terminal G, and the current flows to the capacitor 71. to charge.

(但しこの電流はトランス1の入力巻線1aのインダク
タンスLとコンデンサ71のキヤパシタンスC<7)L
Cによる自由振動で流れる。)モード2(りセツトその
2) タイミングT2においてコンデンサ71は放電しモード
1と同様に自由振動により該モード1と反対経路で放電
々流が流れる。
(However, this current is determined by the inductance L of the input winding 1a of the transformer 1 and the capacitance C<7 of the capacitor 71)L
Flows due to free vibration due to C. ) Mode 2 (Reset Part 2) At timing T2, the capacitor 71 is discharged, and as in mode 1, a discharge current flows in the opposite path to mode 1 due to free vibration.

(第4図口,ハ参照)。モード3(トランス電位反転)
前記モード2に訃いてコンデンサ71の放電が完了して
タイミングT3に卦いて該コンデンサ71の電位が反転
し(コンデンサ71の左側が(4)電位となる)、その
電圧が整流用ダイオード4のスレシヨルドレベルに達す
ると該整流用ダイオード4は導通してトランス1の磁気
エネルギーを2端子回路網5に流しつづける。
(See figure 4, opening and c). Mode 3 (transformer potential inversion)
In mode 2, the discharge of the capacitor 71 is completed, and at timing T3, the potential of the capacitor 71 is reversed (the left side of the capacitor 71 becomes potential (4)), and the voltage is applied to the thread of the rectifier diode 4. When the shold level is reached, the rectifier diode 4 becomes conductive and continues to flow the magnetic energy of the transformer 1 to the two-terminal network 5.

(な卦、モード3はトランス(鉄心)に対し磁束セツト
状態であるがその電圧時間積は小さく磁束の変化は小さ
い。)モード4(トランジスタ0N) タイミングT4においてトランジスタ2が0Nするとモ
ードOと同様に電源E,の電力を2端子回路網5に給電
する。
(Note that in mode 3, the magnetic flux is set for the transformer (iron core), but the voltage-time product is small and the change in magnetic flux is small.) Mode 4 (transistor 0N) If transistor 2 is 0N at timing T4, it is the same as mode O. The power from the power source E is then fed to the two-terminal network 5.

この時トランス1の出力巻線1bの電圧は電源E1の入
出力巻数比に対応した電圧となり上記モード3に}いて
トランス1に蓄積された磁気エネルギーは負荷側に放出
される。そしてこのエネルギー放出はトランス1の保磁
力Hが零T5になるまで継続する。第5図Bは上記モー
ドO乃至モード4におけるトランス1のB−H特性を示
し、図中T。
At this time, the voltage of the output winding 1b of the transformer 1 becomes a voltage corresponding to the input/output turns ratio of the power source E1, and the magnetic energy stored in the transformer 1 is released to the load side in mode 3 described above. This energy release continues until the coercive force H of the transformer 1 becomes zero T5. FIG. 5B shows the B-H characteristics of the transformer 1 in modes O to 4, and T in the figure.

−T4は夫々モードのタイミングを示すものであり、又
T5は保持力Hが零となる時期を示すものである。即ち
本発明によればトランス1の磁束セツト時(モードO又
は4及びモード3)の電圧時間積と磁束りセツト時(モ
ード1及び2)の電圧時間積は等しく動作するのでトラ
ンスの磁束をりセツトすることができ、この間保磁力H
は(4)側及び←准1領賊で利用できる。な訃、第5図
Aは従来回路のトランス1のB一H特性図で、図面から
明らかなように第1図に示した従来回路に卦いてはトラ
ンス1は保磁力Hは(4)側のみしか利用できない。
-T4 indicates the timing of each mode, and T5 indicates the time when the holding force H becomes zero. That is, according to the present invention, the voltage-time product when the magnetic flux of the transformer 1 is set (mode O or 4 and mode 3) and the voltage-time product when the magnetic flux is set (modes 1 and 2) operate equally, so that the magnetic flux of the transformer is During this time, the coercive force H
Can be used on the (4) side and ←1st territory. Figure 5A is a B-H characteristic diagram of transformer 1 in the conventional circuit, and as is clear from the drawing, in the conventional circuit shown in Figure 1, the coercive force H of transformer 1 is on the (4) side. Only available.

以上の通り本発明によれば、整流用ダイオードの両端に
、容量を半導体スイツチの0FF時に放電が完了するよ
うに選定したコンデンサからなる磁束りセツト回路を接
続し、半導体スイツチの0FF時に2端子回路網を介し
トランスの磁束りセツト電流せしめるよう構成されてお
り、(1)磁束りセツト回路に抵抗器を使用しないので
ロスの発生が零に近く効率の高いコンバータが提供でき
る。
As described above, according to the present invention, a magnetic flux setting circuit consisting of a capacitor whose capacitance is selected such that discharge is completed when the semiconductor switch is OFF is connected to both ends of the rectifier diode, and a two-terminal circuit is established when the semiconductor switch is OFF. The present invention is constructed so that the magnetic flux setting current of the transformer is applied through the network, and (1) a resistor is not used in the magnetic flux setting circuit, so a highly efficient converter with nearly zero loss can be provided.

(2)部品数が減少し、しかもロスが減少するために温
度上昇が少なくなり装置(ユニツト)の小型化及び経済
化が達成できる。
(2) Since the number of parts is reduced and loss is reduced, temperature rise is reduced, and the device (unit) can be made smaller and more economical.

(3)トランス(鉄心)の磁束密度の領域は(ト)側及
び(ニ)側の両領域で使用されるので、1飽和磁束密度
までの余裕が大きくなり、又磁束密度を高く設計できる
のでトランスが小型化できる。
(3) Since the magnetic flux density region of the transformer (iron core) is used in both the (G) side and (D) side, there is a large margin up to 1 saturation magnetic flux density, and the magnetic flux density can be designed to be high. The transformer can be made smaller.

@ 従来回路に比べ保磁力Hが(ト),(ハ)にシフト
するのでトランジスタのスイツチ0N,0FF時の電流
がシフトした分に対応して減少するために効率が向上す
る。
@Compared to the conventional circuit, the coercive force H is shifted to (g) and (c), so the current when the transistor is switched 0N and 0FF decreases correspondingly to the shift, improving efficiency.

◎ 従来回路に卦いて残留磁束密度の高い鉄心を使用す
る場合にはコアギヤツプを設けて鉄心励磁電流を増加さ
せて使用した為に磁束りセツト回路の損失を大きくして
いたが本発明によればこの必要はなく、又損失もなくな
る。
◎ In conventional circuits, when an iron core with high residual magnetic flux density is used, a core gap is provided to increase the core excitation current, which increases the loss of the magnetic flux setting circuit, but according to the present invention, the loss in the magnetic flux setting circuit increases. This is not necessary and there is no loss.

O従来回路と同一磁束密度の使い方ではトランス(鉄心
)のヒステリシス損失が少くなる。(4)特性的に整流
用ダイオードにサージ抑制用のコンデンサ及び抵抗器が
必要な場合にコンデンサ71によつてこの機能を兼用せ
しめることがきる等の効果を有する。因みに入力(直流
)48V,直流出力25V,3A(75W)のコンバー
タにおいて、サイズEI4O,材質HC7cl(TDK
)磁束密度2300ガウスのトランスを使用し駆動周波
数44.8KH,で実験した結果、従来回路の効率(.
?〒宥ぃ)は85.42%,損失は12.8Wであつた
が本発明回路においては効率及び損失は夫々87,41
%及び10,8Wとな縦来回路を比較して効率に訃いて
約2%上昇し又損失は2W(15.6%)減少すること
が確認された。
O If the same magnetic flux density is used as in the conventional circuit, the hysteresis loss of the transformer (iron core) will be reduced. (4) When a rectifying diode requires a surge suppressing capacitor and a resistor, the capacitor 71 can serve these functions. By the way, in a converter with input (DC) 48V, DC output 25V, 3A (75W), size EI4O, material HC7cl (TDK
) As a result of an experiment using a transformer with a magnetic flux density of 2300 Gauss and a driving frequency of 44.8 KH, the efficiency of the conventional circuit (.
? The efficiency and loss were 85.42% and the loss was 12.8W, but in the circuit of the present invention, the efficiency and loss were 87.41%, respectively.
% and 10.8 W, it was confirmed that the efficiency increased by about 2% and the loss decreased by 2 W (15.6%).

な}、従来回路に訃いてりセツト回路6の抵抗器62の
抵抗値を3。83,8KΩに設定してこの抵抗による損
失を測定レ所約1.2Wであつた。
In contrast to the conventional circuit, the resistance value of the resistor 62 of the set circuit 6 was set to 3.83.8KΩ, and the loss due to this resistance was measured to be about 1.2W.

従つて上記の減少した損失(2W)のうち0.8W分は
トランスの損失減少分域はトランジスタのスイツチング
時の損失減少分と考えられる。以上の説明から明らかな
ように本発明によれば高効率、小型、かつ経済的なコン
バータが提供できるので実用上の効果は極めて大きいO
Therefore, 0.8 W of the above-mentioned reduced loss (2 W) can be considered to be the reduced loss region of the transformer during switching of the transistor. As is clear from the above description, the present invention can provide a highly efficient, compact, and economical converter, which has extremely large practical effects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来回路、第2図は本発明の一実施例を示す回
路、第3図及び第4図は本発明回路の動作(モード,タ
イミング)説明図及び各部動作波形図、第5図A及びB
は夫々従来回路及び本発明回路に卦けるトランスのB−
H特性図である。 1・・・出力変換用トランス、1a,1b・・・入力巻
線及び出力巻線、2・・・半導体スイツチ(トランジス
タ入3・・・駆動回路、4・・・整流用ダイオード、5
・・・2端子回路網、53・・・負荷、7・・・磁束り
セツト回路、71・・・コンデンサ、B・・・磁束密度
、H・・・保磁力。
Figure 1 is a conventional circuit, Figure 2 is a circuit showing an embodiment of the present invention, Figures 3 and 4 are diagrams explaining the operation (mode, timing) of the circuit of the present invention and operation waveform diagrams of each part, Figure 5. A and B
are B- of the transformer in the conventional circuit and the circuit of the present invention, respectively.
It is an H characteristic diagram. DESCRIPTION OF SYMBOLS 1... Output conversion transformer, 1a, 1b... Input winding and output winding, 2... Semiconductor switch (transistor included) 3... Drive circuit, 4... Rectifier diode, 5
...2-terminal circuit network, 53...Load, 7...Magnetic flux set circuit, 71...Capacitor, B...Magnetic flux density, H...Coercive force.

Claims (1)

【特許請求の範囲】[Claims] 1 トランスの入力巻線側に接続された半導体スイッチ
のON.OFF動作によつて該トランスの出力巻線側に
接続された整流用ダイオードを介して負荷を含む2端子
回路網に直流出力を給電するように構成された一石式コ
ンバータにおいて、該整流用ダイオードの両端に接続し
たコンデンサを備え、半導体スイッチのOFF時に該2
端子回路網を介して該トランスの磁束リセット電流を還
流せしめると共に該コンデンサの容量を該半導体スイッ
チのOFF時に放電が完了するように選定したことを特
徴とする一石式コンバータ。
1 ON of the semiconductor switch connected to the input winding side of the transformer. In a single-stone converter configured to supply DC output to a two-terminal circuit network including a load via a rectifying diode connected to the output winding side of the transformer by OFF operation, when the rectifying diode Equipped with a capacitor connected to both ends, when the semiconductor switch is turned off, the 2
A single-stone converter, characterized in that a magnetic flux reset current of the transformer is circulated through a terminal circuit network, and the capacitance of the capacitor is selected so that discharging is completed when the semiconductor switch is turned off.
JP54116210A 1979-09-12 1979-09-12 Single stone converter Expired JPS596584B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54116210A JPS596584B2 (en) 1979-09-12 1979-09-12 Single stone converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54116210A JPS596584B2 (en) 1979-09-12 1979-09-12 Single stone converter

Publications (2)

Publication Number Publication Date
JPS5641769A JPS5641769A (en) 1981-04-18
JPS596584B2 true JPS596584B2 (en) 1984-02-13

Family

ID=14681558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54116210A Expired JPS596584B2 (en) 1979-09-12 1979-09-12 Single stone converter

Country Status (1)

Country Link
JP (1) JPS596584B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4561046A (en) * 1983-12-22 1985-12-24 Gte Automatic Electric Incorporated Single transistor forward converter with lossless magnetic core reset and snubber network
DE3619352A1 (en) * 1986-06-09 1987-12-10 Philips Patentverwaltung SINGLE FLOW CONVERTER
JPH0455093Y2 (en) * 1986-12-12 1992-12-24
CN111682775B (en) * 2020-06-02 2022-12-09 西安科技大学 A Forward Converter Realizing Excitation Energy Transfer on the Secondary Side in Series with LCD
CN111682777B (en) * 2020-06-02 2022-12-09 西安科技大学 A Secondary Parallel LCD Forward Converter Can Avoid Reverse Charging of Energy Storage Capacitor
CN111682750B (en) * 2020-06-02 2022-12-30 西安摩达芯电子科技有限公司 Forward converter for realizing forward and backward excitation energy transmission by parallel LCD (liquid crystal display) on secondary side

Also Published As

Publication number Publication date
JPS5641769A (en) 1981-04-18

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