JPS598084B2 - Bias circuit for active elements for electronic tuners - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic tuner, and particularly to a variable bias circuit for active elements used in this type of tuner.

2. Description of the Related Art Conventionally, electronic tuners have been widely used in which a variable capacitance diode is used as a tuning element to which a tuning voltage is applied in accordance with the selected channel.

For example, a television tuner needs to be tuned over a relatively wide band, but there is a problem in that gain differences occur depending on the tuning frequency.

It is known that in general high-frequency circuits, the higher the operating frequency, the lower the characteristics of the active elements used therein, such as the gain.

Therefore, the problem of the gain difference described above becomes more serious as the receiving band becomes wider.

On the other hand, attempts have been made to make the characteristics of active elements uniform by using a variable bias in the bias circuit.
Automatic gain control methods in RF amplification stages using AGC signals are known.

However, unlike automatic gain control according to the signal strength of external radio waves, it has not been known to perform continuous gain control within a predetermined frequency band.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention has been proposed in view of the above, and it is an object of the present invention to provide a novel bias circuit that variably biases an electronic tuner active element using a tuning voltage for tuning.

According to the present invention, in an electronic tuner that uses a variable capacitance diode as a tuning element, a tuning voltage that drives the diode for tuning is used as a variable bias source for active elements such as an amplifier stage.

Since the tuning voltage is set to increase as the tuning frequency increases, this power supply is generally used as a bias power supply for active elements in order to compensate for the gain that decreases as the frequency increases.

Therefore, the bias of the active element is varied depending on the reception channel, and stable characteristics are always obtained.

Another feature of the present invention is that it is proposed that the variable bias circuit according to the present invention be used at the downstream side of a two-stage RF amplification circuit, which is implemented as a measure for improving NF in an electronic tuner for television.

This is extremely effective in eliminating the gain difference between the high and low tuning bands that occurs due to the conventional fixed bias of the rear-stage amplifying element.

Specifically, the RF stage of the UHF tuner uses AGC in the front stage amplifier.
The circuit is constructed using a variable bias based on a tuning voltage in the rear stage amplifier, and as a result, the gain difference of 10 dB between high and low channels caused by the conventional fixed bias on the rear stage side is completely eliminated.

The present invention is particularly effective as a gain difference correction circuit when the RF stage is configured with a fixed bias, for example when diode AGC is employed.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

Figure 1 shows a conventional dual-gate MO using a fixed bias.
This is a bias circuit for an RF amplifying element using an SFET, and the gate G2 of the active element FET1 is biased by dividing the operating voltage from the terminal 4 using leader resistors 2 and 3.

In other words, although it operates as a fixed bias, this FET
As shown by the dotted line in FIG. 5, the gain G decreases as the tuning frequency increases.

For example, about 10 d between the high and low channels of a UHF tuner.
This results in a gain difference of B.

FIG. 2 shows a specific circuit of the present invention for reducing the gain difference shown in FIG. 1, in which a resistor 7 is added to the circuit shown in FIG.

Components in FIG. 2 that correspond to those shown in FIG. 1 are indicated by the same symbols, and 5 and 6 are gate G1 and source resistor, respectively.

Here, a tuning voltage vT to be applied to a variable capacitance diode (not shown) constituting a tuning circuit of the tuner is supplied to the terminal 8, and as shown in FIG. 5, the voltage vT increases according to the tuning wave number f. Applied to G2 of FET1.

That is, the gate G2 is variable biased by the tuning voltage vT, and from the characteristics of the bias voltage VG2 versus the gain G as shown in FIG. 3, the frequency is approximately constant over the entire region as shown by the solid line in FIG. Obtain the characteristic gain G.

What should be noted here is that the gain G of FET1 exhibits a mountain-shaped characteristic centered on the maximum gain point depending on the bias voltage VG2 between the gate G2 and source S of the FET.
As long as VG2 is used below the bias voltage value that obtains the maximum gain, when the high channel tuning voltage with a high tuning frequency is superimposed on the divided voltage, the gain is increased compared to when the low channel tuning voltage is superimposed, As a result, the gain difference can be reduced as shown by the solid line in FIG.

FIG. 6 shows the case where bipolar transistors are used, and shows a bias circuit for the PNP transistor 10.

Here, using bias bleeder resistors 11 and 12, the transistor base is fixedly biased with an operating power supply from a terminal 13, and a tuning voltage is supplied from a terminal 15 via a resistor 14 to vary the bias depending on the channel selection.

Therefore, similar to the FET element shown in FIG. 2, substantially uniform gain is obtained over the entire receiving frequency band.

Although the embodiment has described the amplification characteristic, even when the oscillation/modulation characteristic exhibits a frequency characteristic, the characteristic can be improved by a bias method using a tuning voltage.

[Brief explanation of the drawing]

FIG. 1 is a conventional bias circuit, FIG. 2 is a bias circuit according to the present invention, FIGS. 3 to 5 are characteristic diagrams explaining the operation of FIG. 2, and FIG. FIG. 3 is a bias circuit diagram showing a specific example. 1, 10...active element, 2, 3, 11, 12
...Bleeder resistor, 4,13...Operating power supply terminal, 1,14...Resistor, 8,15...
... Tuning voltage terminal.

Claims (1)

[Claims] 1. In an electronic tuner equipped with a tuning circuit that selects a desired channel by applying a tuning voltage to a variable capacitance diode, and an active element driven by a variable bias,
The active element for an electronic tuner is characterized in that the active element is variably biased by a different tuning voltage for each channel by superimposing a tuning voltage applied to the variable capacitance diode, and equalizes the gain of each channel within a predetermined reception band. bias circuit.