JPS6017171B2 - differential amplifier circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention has a configuration in which it is possible to separately amplify signals input from two signal input terminals, and further combine the two signals to extract two amplified signals from one output terminal. To provide a differential amplifier circuit that is simple and low in cost.

An embodiment of the present invention will be described below in comparison with a subsidiary example.

FIGS. 1a and 1b show the conventional differential amplifier circuits, and in FIG. Selectively input the two signals 〆, and 〆2 from , is amplified and outputted to the output terminal 1 provided outside the collector of the transistor 2.

Here, 4 to 6 are bias resistors, 7 is an emitter resistor, 8 is a collector load resistor, 9 is a bypass capacitor, and Vcc is a power supply. This circuit has a simple configuration, but because it uses a mechanical switch to switch the input signal, the signal line is long and unstable, so it is unsatisfactory in terms of cost, operability, and performance. It's not something you can float around on. In FIG. 1b, the switch 3 in FIG. 1a is omitted, and the two signals 〆 and 〆2 are inputted to two buffer circuits each composed of transistors 10 and 11, and the transistor 1
The emitters 0 and 11 are connected in series, input to the transistor 1 of the differential amplifier, and amplified in the same manner as in FIG. 1a to obtain an amplified signal at the output terminal c.

12 is a bias resistor, and 13 is an emitter resistor of the buffer circuit.

In this case, the disadvantages of FIG. 1a in terms of operability and performance are overcome, but the number of components increases, resulting in a disadvantage in terms of cost. FIG. 2 shows a differential amplifier circuit according to the invention, in which two input signals . , 2 are input to both positive and negative phase bases of the differential amplifier, and both transistors 1 and 2
Suitable impedance elements 1 for base and collector
4, 17, 15, and 18 are connected and a signal is output to output terminal c. Therefore, the switch 3 and buffer circuit of the conventional input circuit can be eliminated. here,
Impedance elements 17 and 18 connected to the base as an input circuit and the collector as an output circuit of the transistor 2 are connected to the signal na., which is input to the input terminal a. It exhibits a low impedance value for the frequency of
There is a high impedance for the frequency of signal Na 2 input to
Designed to exhibit dance value.

Further, the impedance elements 14 and 15 connected from the base to the outside of the transistor 1 are designed to exhibit a high impedance value and a low impedance value, respectively, with respect to the frequencies of the signals Na and Teru 2. By designing in this way, the amplification degree Gna, . is the frequency of the signal 〆, is the frequency of transistors 1 and 2
If it does not exceed the amplification capacity of , it can be expressed by the following equation. Gna, Ken 10 Mori Rusa.・・・． ...'11
Here, re is the emitter resistance that transistors 1 and 2 have, and Rc is the collector resistance of transistor 2.

Further, the amplification degree G〆,2 for the signal 〆2 is the same as in the first equation above, where Rc2 is the collector resistance 16 of the transistor 1.

Signals .

The impedance element 17 also functions as a trap for the signal 〆2, and the impedance element 14 also functions as a trap for the signal 〆, so that the input signals 〆, , , and 2 can be stably amplified without interfering with input terminals a and b. It is something.

FIG. 3 shows a specific circuit in the case where the frequency relationship is higher for the signal 〆 than for the signal Na 2, and shows the impedance element 14,
Specific components 15, 17, and 18 are shown, and C is a capacitor for cutting off DC voltage.

In the above embodiments, the differential amplifier is configured by a transistor, but the present invention is not limited to this, and the same applies if it is configured by a field effect transistor.

In addition, in FIGS. 2 and 3, the impedance element 14 is connected in parallel with the resistor 5 as a bias element, but
The impedance element 14 can also be used as a bias element. As explained above, according to the differential amplifier of the present invention, impedance elements are provided in the input circuit and output circuit of two transistors constituting the differential amplifier, respectively, so that a signal input to the input circuit of one transistor is connected to the same transistor. Since it is configured to block the output from the output circuit, it is possible to eliminate the input code switching means, which was a drawback of the conventional system.In addition, it not only eliminates interference between two signals, but also has a simple configuration, so the cost is low. The effect is huge.

[Brief explanation of the drawing]

1A and 1B are diagrams of a conventional differential amplifier circuit, FIG. 2 is a diagram of a differential amplifier circuit according to an embodiment of the present invention, and FIG. 3 is a diagram of a specific differential amplifier circuit of FIG. 2. 1, 2...transistor, 14, 15, 17, 18...
... Impedance element, a, b... input terminal, c... output terminal. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1 The first and second amplification elements constitute a differential amplification circuit, and the first and second amplification elements are connected to the input circuits of the first and second amplification elements, respectively.
First and second input terminals are provided for inputting the signals separately, and a resistor is inserted between the first and second input terminals, and the second input terminal is connected to the input circuit and output circuit of the first amplification element, respectively. A first impedance element that attenuates the frequency signal of the signal and a second impedance element that attenuates the frequency signal of the first signal are provided, and the input circuit and the output circuit of the second amplification element are provided with the impedance element that attenuates the frequency signal of the signal. a third impedance element that attenuates the frequency signal of the first signal and a fourth impedance element that attenuates the frequency signal of the second signal;
A differential amplifier circuit characterized in that output terminals of the second and fourth impedance elements are connected to each other and connected to amplification output terminals of the first and second signals.