JPS6017200B2 - color killer circuit - Google Patents
color killer circuitInfo
- Publication number
- JPS6017200B2 JPS6017200B2 JP11533477A JP11533477A JPS6017200B2 JP S6017200 B2 JPS6017200 B2 JP S6017200B2 JP 11533477 A JP11533477 A JP 11533477A JP 11533477 A JP11533477 A JP 11533477A JP S6017200 B2 JPS6017200 B2 JP S6017200B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- color
- output
- killer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Processing Of Color Television Signals (AREA)
Description
【発明の詳細な説明】
カラーテレビ受像機においては、白黒放送の受信時に、
色信号系を遮断して色雑音等の発生を防止している。[Detailed Description of the Invention] In a color television receiver, when receiving a black and white broadcast,
The color signal system is blocked to prevent color noise from occurring.
このようなカラーキラーを行う場合に、従来はカラーバ
ースト信号を分離し、このバースト信号を第1図に示す
ように端子1から比較回路2に供給し、一方電圧源3か
らの基準電圧Vtを比較回路2に供給して、これらをレ
ベル比較し、バースト信号のレベルが基準電圧Vt以下
になったとき、色信号系を遮断するスイッチ回路4に信
号を供給してカラーキラーを行うようにしていた。When performing such a color killer, conventionally, the color burst signal is separated and this burst signal is supplied from the terminal 1 to the comparison circuit 2 as shown in FIG. 1, while the reference voltage Vt from the voltage source 3 is The burst signal is supplied to a comparison circuit 2 to compare the levels thereof, and when the level of the burst signal becomes lower than the reference voltage Vt, a signal is supplied to a switch circuit 4 that cuts off the color signal system to perform color killer. Ta.
なおこの場合に、電圧源3にヒステリシス回路5を設け
、カラーキラーが掛かっているときの基準電圧Vtを高
くし、掛かっていないときの基準電圧Vtを低くして、
境界地帯等での不安定動作を防止するようにしている。
ところで、上述のようなカラーキラーの検出回路でバ−
スト信号のレベル検出を行う場合には同期検波にて行う
ようにしている。In this case, a hysteresis circuit 5 is provided in the voltage source 3 to increase the reference voltage Vt when the color killer is applied and to lower the reference voltage Vt when it is not applied.
This is to prevent unstable operation in border areas, etc.
By the way, the color killer detection circuit described above can be used to
When detecting the level of the strike signal, synchronous detection is used.
これに対して色飽和度の調整を行ういわゆるACC回路
においては、色信号をピーク値検波し、そのピーク値が
所定のレベルとなるようにレベル制御が行われる。On the other hand, in a so-called ACC circuit that adjusts color saturation, a peak value of a color signal is detected, and level control is performed so that the peak value becomes a predetermined level.
このため、強電界時に電波伝搬の変動やアンテナのミス
マッチング等によって色信号のレベルが低下した場合に
は、第2図に示すようにACC回路の入出力特性が実線
から破線に変化し、出力レベルがVtになった時点すな
わち入力レベルがE2の時点点でカラーキラ−が掛かる
。Therefore, when the color signal level decreases due to fluctuations in radio wave propagation or antenna mismatching during a strong electric field, the input/output characteristics of the ACC circuit change from a solid line to a broken line as shown in Figure 2, and the output Color killer is applied when the level reaches Vt, that is, when the input level is E2.
これは、弱電界でノイズが多い場合には、このノイズの
ピーク値でACCが掛けられるので、入出力特性は本来
の色信号のレベルに対して破線のようになってしまい、
入力レベルが充分大きいE2の時点でカラーキラーが掛
ってしまう。従って、弱電界の地域では、まだ色復調が
可能な色信号のレベルがあるにもかかわらず、カラーキ
ラーが掛ってしまい、カラー受像ができなくなってしま
う。This is because when there is a lot of noise in a weak electric field, ACC is multiplied by the peak value of this noise, so the input/output characteristics become like a broken line with respect to the original color signal level.
Color killer is applied when the input level is sufficiently high at E2. Therefore, in areas with a weak electric field, color killer occurs and color image reception becomes impossible even though there is still a color signal level that allows color demodulation.
本発明はこのような点にかんがみ、弱電界の地域におい
ても、正常なカラー受像が行えると共に、適確なカラー
キラーが行えるようにしたものである。In view of these points, the present invention is designed to enable normal color image reception and accurate color killer even in areas with weak electric fields.
以下、図面を参照しながら、本発明の一実施例について
説明しよう。Hereinafter, one embodiment of the present invention will be described with reference to the drawings.
第3図において、チューナ11からの映像信号が、映像
中間周波回路12、映像復調回路13を通じて復調され
る。In FIG. 3, a video signal from a tuner 11 is demodulated through a video intermediate frequency circuit 12 and a video demodulation circuit 13.
この復調信号が平均値検波回路1 4に供給され、この
検波信号(AGC信号)がチューナ11及び中間周波回
路12に供給されてRF信号系の平均値AGCが掛けら
れる。また復調回路13からの信号が輝度信号(Y)系
のアンプ15を通じてマトリックス回路16に供聯合さ
れる。また復調回路13からの信号が色信号系のバンド
パスアンプ17,18を通じて色復調回路19に供給さ
れると共に、バンドパスアンプ17からの信号がバース
トゲート回路201こ供V給されてカラーバースト信号
が分離され、このバースト信号がCW発振器21に供給
されて同一周波数、同一位相の連続波とされる。そして
この連続波が色復調回路19に供給されて、B一Y及び
R‐Yの色差信号が復調され、これらの色差信号がマト
リックス回路16に供V給されてR、G、Bの三原色信
号が形成される。また、バーストゲ−ト回路20からの
バースト信号がピーク値検波回路22に供給されてピー
ク値検波され、この検波信号が比較器23に供給される
と共に、基準電圧源24からの基準電圧Vrが比較回路
23に供給され、この比較出力がバンドパスアンプ17
の利得制御端子に供給されて、バースト信号のピーク値
が一定のレベルとなるようにACCが行われる。This demodulated signal is supplied to the average value detection circuit 14, and this detected signal (AGC signal) is supplied to the tuner 11 and intermediate frequency circuit 12, where it is multiplied by the average value AGC of the RF signal system. Further, a signal from the demodulation circuit 13 is coupled to a matrix circuit 16 through a luminance signal (Y) system amplifier 15. Further, the signal from the demodulation circuit 13 is supplied to the color demodulation circuit 19 through color signal system bandpass amplifiers 17 and 18, and the signal from the bandpass amplifier 17 is supplied to the burst gate circuit 201 to generate a color burst signal. is separated, and this burst signal is supplied to the CW oscillator 21 to generate a continuous wave with the same frequency and the same phase. This continuous wave is then supplied to the color demodulation circuit 19 to demodulate the B-Y and RY color difference signals, and these color difference signals are supplied to the matrix circuit 16 to generate the three primary color signals of R, G, and B. is formed. Further, the burst signal from the burst gate circuit 20 is supplied to the peak value detection circuit 22 for peak value detection, and this detection signal is supplied to the comparator 23, and the reference voltage Vr from the reference voltage source 24 is compared. The comparison output is supplied to the circuit 23 and the bandpass amplifier 17
is supplied to the gain control terminal of the burst signal, and ACC is performed so that the peak value of the burst signal becomes a constant level.
また、バーストゲート回路20からのバースト信号が同
期検波回路25に供給されると共に、発振器21からの
連続波が同期検波回路25に供給されてバースト信号が
同期検波され、この検波信号が比較回路26に供給され
ると共に、電圧源27からの基準電圧ytが比較回路2
6に供給されて、バースト信号のレベルが基準電圧Vt
以下のときにカラーキラー信号が形成される。Further, the burst signal from the burst gate circuit 20 is supplied to the synchronous detection circuit 25, and the continuous wave from the oscillator 21 is supplied to the synchronous detection circuit 25, where the burst signal is synchronously detected, and this detected signal is sent to the comparison circuit 26. At the same time, the reference voltage yt from the voltage source 27 is supplied to the comparator circuit 2.
6, the level of the burst signal is set to the reference voltage Vt
A color killer signal is formed when:
そしてこのカラーキラー信号がバンドパスアンプ18に
供給され、カラーキラー信号が得られている期間、利得
が裏にされて色信号が遮断される。また、電圧源27は
ヒステリシス回路28にてその出力電圧Vtが制御され
る。This color killer signal is then supplied to the bandpass amplifier 18, and while the color killer signal is being obtained, the gain is reversed and the color signal is cut off. Further, the output voltage Vt of the voltage source 27 is controlled by a hysteresis circuit 28.
そしてこのヒステリシス回路28に比較回路26からの
カラーキラー信号が供鎌倉され、この信号が得られてい
る期間、電圧源27からの基準電圧Vtの値が大きくさ
れる。さらに、ヒステリシス回路28に検波回路14か
らのAGC信号が供給され、AGC信号のレベルが小さ
いとき、すなわち受信信号が弱電界のとき、基準電圧V
tの値が小さくされる。A color killer signal from the comparator circuit 26 is supplied to the hysteresis circuit 28, and the value of the reference voltage Vt from the voltage source 27 is increased during the period when this signal is obtained. Further, the AGC signal from the detection circuit 14 is supplied to the hysteresis circuit 28, and when the level of the AGC signal is small, that is, when the received signal is in a weak electric field, the reference voltage V
The value of t is reduced.
従ってこの回路において、検波回路14からのAGC信
号は受信信号の電界強度に応じて変化し、この変化に応
じて弱電界時には基準電圧Vtの値が小さくされ、例え
ば第2図にVt′で示す電圧とされ、この電圧Vt′で
カラーキラー信号の検出が行われる。Therefore, in this circuit, the AGC signal from the detection circuit 14 changes according to the electric field strength of the received signal, and in response to this change, the value of the reference voltage Vt is reduced in the case of a weak electric field, for example, as shown by Vt' in FIG. The color killer signal is detected at this voltage Vt'.
こうして、カラーキラー信号が検出され、カラーキラー
が行われるわけであるが、本発明によれば、弱電界時に
基準電圧Vtを下げ、カラーキラーの検出レベルを下げ
たことにより、弱電界地域でも正常なカラー受像が行え
ると共に、適確なカラーキラーを行うことができる。In this way, a color killer signal is detected and color killer is performed.According to the present invention, by lowering the reference voltage Vt during a weak electric field and lowering the color killer detection level, normality can be achieved even in weak electric field areas. Not only can color image reception be performed, but also accurate color killer can be performed.
なお、本発明はテレビ受像機に限らずVTRにも適用で
きる。Note that the present invention is applicable not only to television receivers but also to VTRs.
第1図は従来の回路の系統図、第2図は本発明の説明の
ための特性図、第3図は本発明の一例の系統図である。
14は平均値検波回路、22はピ−ク値検波回路、25
は同期検波回路、26は比較回路、27は電圧源、28
はヒステリシス回路である。第1図第2図
第3図FIG. 1 is a system diagram of a conventional circuit, FIG. 2 is a characteristic diagram for explaining the present invention, and FIG. 3 is a system diagram of an example of the present invention. 14 is an average value detection circuit, 22 is a peak value detection circuit, 25
is a synchronous detection circuit, 26 is a comparison circuit, 27 is a voltage source, 28
is a hysteresis circuit. Figure 1 Figure 2 Figure 3
Claims (1)
回路と、バーストゲートしたバースト信号のピーク値を
ピーク検波し、このピーク値をほぼ一定に保つような閉
ループACC回路を有するテレビジヨンのカラーキラー
回路に於て、上記バースト信号を検波する検波回路と、
上記検波回路の出力を基準レベルと比較する比較器と、
この出力によつて色差信号の出力を制御するスイツチ回
路と、上記基準レベルを制御するヒステリシス回路と、
上記比較器の出力で上記ヒステリシス回路を制御する閉
ループ制御回路の夫々を設けるとともに上記AGC回路
の出力で上記ヒステリシス回路を制御し、入力電界が弱
い時は上記スイツチ回路の動作点を制御して上記検波回
路の出力がより低下する迄はキラー動作しないようにし
たカラーキラー回路。1 AGC that controls the gain of the tuner and intermediate frequency circuit
In a television color killer circuit having a closed-loop ACC circuit that peak-detects the peak value of a burst-gated burst signal and keeps this peak value approximately constant, a detection circuit that detects the burst signal; ,
a comparator that compares the output of the detection circuit with a reference level;
a switch circuit that controls the output of the color difference signal based on this output; a hysteresis circuit that controls the reference level;
Each of the closed loop control circuits is provided to control the hysteresis circuit with the output of the comparator, and the hysteresis circuit is controlled with the output of the AGC circuit, and when the input electric field is weak, the operating point of the switch circuit is controlled. A color killer circuit that does not operate as a killer until the output of the detection circuit drops further.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11533477A JPS6017200B2 (en) | 1977-09-26 | 1977-09-26 | color killer circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11533477A JPS6017200B2 (en) | 1977-09-26 | 1977-09-26 | color killer circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5448435A JPS5448435A (en) | 1979-04-17 |
| JPS6017200B2 true JPS6017200B2 (en) | 1985-05-01 |
Family
ID=14659974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11533477A Expired JPS6017200B2 (en) | 1977-09-26 | 1977-09-26 | color killer circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6017200B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59131284A (en) * | 1983-01-17 | 1984-07-28 | Matsushita Electric Ind Co Ltd | Image recording and playback device |
| JP2004112165A (en) | 2002-09-17 | 2004-04-08 | Sanyo Electric Co Ltd | Color killer adjuster |
-
1977
- 1977-09-26 JP JP11533477A patent/JPS6017200B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5448435A (en) | 1979-04-17 |
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