JPS6019863B2 - PSK demodulator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a demodulator for a PSK (phase shift keying) system that transmits and receives burst data and performs synchronization using a unique key N.

FIG. 1 is a block diagram showing an example of a conventional 4-phase PSK demodulator. In the figure, 1 is an input terminal for a received signal;
2 is a 4-phase carrier wave regeneration circuit that regenerates a carrier wave from this received signal, 3 is a symbol timing regeneration circuit that regenerates a timing signal from the above-mentioned received signal, and 4 is a 4-phase carrier wave regeneration circuit that detects a carrier wave that is also regenerated by the 4-phase carrier wave regeneration circuit 2. A first detector; 5 is a first identification and regeneration circuit that identifies and regenerates the detected output of the first detector using a timing signal from the symbol timing regeneration circuit 3 and outputs it to an output terminal 6; 7 is the four-phase carrier regeneration circuit; 9 is a second identification and regeneration circuit for identifying and reproducing the output of this second detector and outputting it to an output terminal 101; 11 is a second detector for detecting the output of No. This unique word detector detects a unique word from the outputs of the first and second identification and reproducing circuits 5 and 9 and outputs it to the output terminal 12.

Note that whether the phase of the carrier wave is advanced or delayed by 90 degrees by the 900 phase shifter 8 may be made the same between the modulator and the demodulator, but here the description will be made assuming that the phase is delayed by 90 degrees. The conventional 4-phase PSK demodulator is configured as described above, and the -4 phase tower K signal is sent to the first detector 4 and the second detector 7.
After being detected, the signal is discriminated and reproduced by the first discrimination and reproduction circuit 5 and the second discrimination and reproduction circuit 9, and is output to the t output terminals 6 and 10. Here, detection is performed by two detection axes orthogonal to each other due to the 900 phase shifter 8. 〇 However, in the above-mentioned 4-phase whistle K demodulator, the 4-phase P
SK demodulation is applied, and as a result, there is a drawback in that unique word detection errors occur frequently under conditions of low C/N.

This invention was made to eliminate these drawbacks, and only the unique word part of the data burst is converted into two-phase PS.
The present invention adopts a system in which K modulation is performed and the other portions are modulated in four phases, and the purpose of the present invention is to obtain a PSK demodulator that is compatible with this system.

FIG. 2 is a block diagram showing one embodiment of the present invention, and numerals 1 to 12 are completely the same as the conventional device shown in FIG. 1 above.

Reference numeral 13 denotes a third detector which detects the carrier wave recovered by the four-phase carrier wave recovery circuit 2 and phase-shifted by the 450 phase shifter 14, and reference numeral 15 converts the output of this third detector to the timing from the symbol timing recovery circuit 3. A third identification and regeneration circuit that identifies and reproduces signals; 16, a fourth detector that detects the output of the 450 phase shifter 14 using a carrier wave whose phase is further shifted by a second 90° phase shifter 17; 18, this fourth detector; 19 is a detection axis discrimination circuit.

Note that whether the phase of the carrier wave is advanced or delayed by the 450 phase shifter 14 and the second 900 phase shifter 17 can be determined as long as the detection axes of the third detector 13 and the fourth detector 16 are orthogonal. , is a phase shifter independent of the modulator on the transmitting side, so it can be determined freely by the demodulator alone, but here, the explanation will be given assuming that the phase is delayed by 450 degrees and 90 degrees, respectively. Note that the phase of the two-phase PSK modulated signal is -45o, -225o with respect to the output phase of the four-phase carrier recovery circuit 2.
0 (1135o). In the Kamo-K demodulator constructed as described above, the signals appearing at the output terminals 6 and 1 are reproduced signals obtained by the fourth PSK demodulation.

On the other hand, a signal detected by a carrier wave phase-shifted by the 45o phase shifter 14 and then identified and reproduced is input to the unique word detector 11 . That is, one of the two signals input to the unique word detector 11 is a two-phase PSK demodulated signal, and the other signal is a signal derived from noise components contained in the received signal. It's a meaningful signal. In other words, the two-phase thrust K modulation signal representing the unique word has "45
Since there is no component that has a phase difference of 9 P with respect to the output phase of the 0 phase shifter 14, if the C/N is good, the output of the fourth detector 16 should always be 0, which is a noise component. A signal originating from is output. However, the phase of the two-phase PSK modulated signal with respect to the output phase of the four-phase carrier recovery circuit 2 was assumed to be -45o, -225o, but -135o (12
25o), -315o (145o),
At this time, the output of the fourth detector 16 becomes a unique word signal output, and the output of the third detector 13 becomes a meaningless signal due to noise. Here, the detection axis discrimination circuit 19 discriminates which of these two signals is a meaningful signal. FIG. 3 is a block wiring diagram showing an embodiment of the detection axis discrimination circuit 19, and in the figure, 31 and 3
2 is an input terminal connected to the output terminals 6 and 101 of the PSK modulator shown in FIG. 2; 33 is an exclusive OR gate; 34
is a multi-stage shift register, 35 is a majority logic gate,
36 is an output terminal connected to the unique word detector 11 of the PSK demodulator shown in FIG. 2 above. In the detection axis discrimination circuit configured as described above, the input terminals 31,
The reproduced signal input to 32 is transmitted to exclusive OR gate 33
The exclusive OR is calculated by

Knowing the output of this exclusive OR gate 33, it is possible to determine which of the two signals input to the unique word detector 11 of the PSK demodulator shown in FIG. 2 is a meaningful signal. can be determined. However, input terminals 31, 3
Since the input signal from No. 2 is a reproduced signal subjected to four-phase PSK demodulation as described above, there is a possibility that the exclusive OR gate 33 will also make an incorrect determination by an amount corresponding to the bit error rate. In order to eliminate this drawback, the output of the exclusive OR gate 33 is sequentially stored in a multi-stage shift register 34. From the stored contents of the multi-stage shift register 34,
The majority logic gate 35 makes a majority decision and outputs the decision result with a low error rate to the output terminal 36. By increasing the number of stages of the multi-stage shift register 34, it is possible to obtain determination results with as low an error rate as possible, so the probability of a unique word detection error due to a detection axis discrimination error is:
You can make it as small as you like. In response to the output of the detection axis discrimination circuit 19, the unique word detector 11 of the PSK demodulator shown in FIG. do.

In this way, in the PSK demodulator of FIG. 2, unique word detection is performed by two-phase PSK demodulation, so the unique word detection probability is significantly improved. In the above embodiment, the case of the K system has been described, but it goes without saying that the present invention can be applied to similar communication systems using other modulation methods. As described above, according to the present invention, a detection axis discrimination circuit is provided in the four-phase tower K demodulator to detect a unique word demodulated by two-phase PSK, so that unique word detection with a low error rate is performed. There is an effect that can be done.

[Brief explanation of drawings]

Fig. 1 is a block wiring diagram showing an example of a conventional 4-phase K demodulator, Fig. 2 is a block wiring diagram showing an embodiment of the present invention, and Fig. 3 is an embodiment of the detection axis discrimination circuit of the present invention. FIG. In the figure, 4 is a first detector, 5 is a first identification and regeneration circuit,
7 is a second detector, 9 is a second identification and regeneration circuit, 11 is a unique word detector, 13 is a third detector, 15 is a third identification and regeneration circuit, 16 is a fourth detector, and 18 is a fourth identification and regeneration circuit. circuit,
19 is a detection axis discrimination circuit, 33 is a multi-purpose OR gate, 3
4 is a multi-stage shift register, and 35 is a majority logic gate. Note that the same reference numerals in each figure indicate the same or corresponding parts. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. A PSK demodulator that demodulates a signal to be transmitted by performing two-phase PSK modulation on a carrier wave in a unique word portion of a data burst and four-phase PSK modulation in another portion, which a carrier wave regeneration circuit that regenerates a carrier wave, a symbol timing regeneration circuit that regenerates a timing signal from the received signal, and a first and second circuit that detects the received signal using the carrier wave output from the carrier wave regeneration circuit and a carrier wave that is phase-shifted by 90 degrees. A second wave detector identifies and reproduces the detection outputs of the first and second wave detectors using the timing signal.
first and second identification and regeneration circuits that output the phase PSK demodulated signal; a detection axis discrimination circuit that discriminates the detection axis from the four-phase PSK demodulation signal; third and fourth detectors that detect the received signal with detection axes that are related to each other and have a phase difference of 90 degrees; and the detection outputs of the third and fourth detectors are identified and reproduced, respectively, based on the timing signal. Which of the output signals of the third and fourth discrimination reproducing circuits and the eighth and fourth discrimination reproducing circuits is a two-phase PSK signal is selected by the output signal from the detection axis discriminating circuit to generate a unique word. A PSK demodulator comprising a unique word detector for detecting. 2. The detection axis discrimination circuit includes an exclusive OR gate that inputs a 4-phase PSK demodulated signal, a shift register that sequentially stores the output signals of this exclusive OR gate, and a majority logic that makes a majority decision on the output signal of this shift register. A PS according to claim 1, characterized in that it consists of a gate.
K demodulator.