JPS6020904B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device in which a contact hole is formed after passivating an oxide film in order to improve the reliability of the semiconductor device.

FIG. 1a is a partial cross-sectional view of a conventional semiconductor device.

An oxide film 3 is formed on an N-type silicon substrate 1, and a P-type base diffusion region 2 in which impurities of a conductivity type opposite to that of the N-type silicon substrate 1 are diffused is formed using selective diffusion of this oxide film 3. At the same time, an oxide film 4 is also formed.

In this case, a low-temperature oxide film such as ethyl silicate may be deposited. Next, selective diffusion of the oxide film 4 is used to form an N-type emitter diffusion region 5 in which impurities of a conductivity type opposite to that of the P-type base diffusion region 2 are diffused, and at the same time, an oxide film 6 is also formed. In this case as well, a low-temperature oxide film such as ethyl silicate may be deposited. The oxide film 6 is lc8 for a highly reliable semiconductor device such as a highly reliable transistor.
In order to reduce leakage current such as creep, a passivation layer 7 (usually a phosphoric oxide film) is formed on the oxide film 6, and a low-temperature oxide film 6' such as ethyl silicate is formed on top of it. do. Next, the P-type base diffusion region 2 and the N-type emitter diffusion region 5 are exposed, respectively, to form a base contact hole 8 and an emitter contact hole 9. As is well known, the passivation layer 7 made of a phosphoric oxide film is The etching speed is significantly faster than that of the oxide films 4, 6, and 6', and the photoetching process used in the photolithography process to form the base contact hole 8 and the emitter contact hole 9 can sufficiently remove the oxide film. It is common to photoetch to a slightly longer dimension to remove it. FIG. 1b is a partially enlarged sectional view of FIG. 1a.

In this figure, 10 is a state in which photoetching progresses only to the passivation layer 7 made of phosphoric oxide film and the etching progresses to the deep part in a pocket shape because the etching speed of passivation layer 7 made of phosphoric oxide film is faster than that of oxide films 6 and 6'. This is an etched portion showing the depth of the phosphor oxide film, and a comb depth showing how deep the passivation layer 7 made of the phosphoric oxide film has been etched compared to the oxide films 6 and 6'. For this comb, the larger the combing amount L, the more
The oxide film 6' is cut off at the deep portion 10' of the phosphoric oxide film passivation layer 7 by photoetching, and this is floating on the wafer, causing a decrease in reliability and slowness. Figure 1c shows the comb, and the oxide film 6' has a small amount
FIG. 3 is a cross-sectional view showing a state when the film is not peeled off. After forming the base contact hole 8, an L electrode metal layer (usually made of aluminum) 11 is formed by vapor deposition, but as is well known, the oxide film steps are formed into pocket-like etched portions 10.
However, if the oxide film is formed in a deep manner, the evaporation will not be sufficient and only the step portion of the oxide film will be very thinly evaporated, making it difficult to obtain sufficient current capacity and easily leading to disconnection of the electrode metal. Furthermore, the passivation layer 7 made of phosphorylated pus J is hygroscopic and has the property of adsorbing water, and the adsorbed water chemically reacts with phosphorus in the phosphorylated pus to become phosphoric acid, which causes corrosion of the electrode metal layer 11. Become. In this case, since the passivation layer 7 made of phosphorylated pus is in direct contact with the electrode metal layer 11, the passivation layer 7 made of phosphorylated pus adsorbs moisture.
When it turns into phosphoric acid, it easily corrodes the electrode metal layer 11, which becomes a major cause of lower reliability, lower yield, and lower electrical characteristics. This invention eliminates the above drawbacks.
2. In other words, the oxide film on the base contact hole is not sufficiently removed, the etching is stopped when the oxide film on the emitter contact hole is removed, the photoresist used for this etching is removed, and a low-temperature oxidizer such as ethyl silicate is removed. A film is formed, and then the silicon of the base contact hole and emitter contact hole is precisely aligned using a contact mask that is slightly smaller than the first emitter contact hole and the base contact hole using the photolithography 3 technique. Perform etching until completely exposed.

Compared to the contact holes of conventional semiconductor devices, the base contact hole and emitter contact hole created in step 3 do not directly expose the passivation layer of the phosphoric oxide film, so the phosphoric oxide film is The etching speed is significantly faster than that of the oxide film, which causes peeling of the oxide film, and disconnection of the electrode metal due to pocket-like combs and encroachments in the oxide film caused by the phosphoric oxide film at the stepped portions of the oxide film, as well as direct phosphorescence. The present invention provides a semiconductor device that prevents corrosion of electrode metal caused by contact between oxidized pus and electrode metal. This invention will be explained in detail below. Figure 2a
-d are main part sectional views showing one embodiment of the manufacturing process of the semiconductor device of the present invention. In FIG. 2, an oxide film 3 is first formed on an N-type silicon substrate 1, and P-type base diffusion is performed in which impurities of the conductivity type opposite to that of the N-type silicon substrate 1 are diffused using selective diffusion of the oxide film 3. At the same time as forming region 2, oxide film 4 is also formed.

In this case, a low-temperature oxide film such as ethyl 0 silicate may be deposited. Next, by utilizing selective diffusion of the oxide film 4, an N-type emitter diffusion region 5 in which impurities of a conductivity type opposite to that of the P-type base diffusion region 2 are diffused is formed, and at the same time, an oxide film 6 is also formed. In this case as well, a low-temperature oxide film such as ethyl silicate may be deposited. This oxide film 6
is lcB for reliable semiconductor devices such as high reliability transistors. In order to reduce leakage currents such as creep, a passivation layer (usually a phosphoric oxide layer) 7 is formed on the oxide film 6, and a low-temperature oxide film such as ethyl silicate is formed on top of it. 6' is formed. Next, the P-type base diffusion region 2 and the N-type emitter diffusion region 5 are exposed, respectively, and a base contact hole 8 and an emitter contact hole 9 are formed by photoetching. Since the etching speed is significantly lower than that of a film, there are many drawbacks as mentioned above.

Therefore, in this invention, as shown in FIG. 2a, photoetching is stopped after the oxide films 6, 6' on the emitter contact hole 9 have been removed, leaving the oxide film 4 on the base contact hole 8. Remove the photoresist while still in condition.

Next, as shown in FIG. 2b, a low-temperature oxide film 12 such as ethyl silicate is formed again.

Next, as shown in FIG. 2c, a photoresist film 13 is coated on the low-temperature oxide film 12, and a glass mask 014 having a pattern slightly smaller than the base contact hole 8 and emitter contact hole 9 formed at the beginning is formed. Using a mask, align the mask accurately with the first base contact hole 8 and emitter contact hole 9, and apply ultraviolet rays 15 through the glass mask 14.
After forming desired base contact holes 8 and emitter contact holes 9 in the low-temperature oxide film 12 by photolithography as shown in FIG. 2d, the photoresist film 13 is removed.

In this way, the desired semiconductor device shown in FIG. 2d is obtained.

FIG. 3 is a partially enlarged view of FIG. 2 d, in which the base contact hole 8 and emitter contact hole 9 shown in FIG. Because of this, there is no pocket-like digging caused by the passivation layer 7 made of phosphoric oxide film, which prevents peeling of the oxide film, disconnection of the electrode metal that occurs at the step of the oxide film, and passivation layer 7 made of the phosphoric oxide film directly contacting the electrode metal. Since there is no contact, there is no need to worry about corrosion of the electrode metal, and reliability, stability, electrical characteristics, etc. can be improved. It should be noted that, although the above description has focused on things other than transistors, the present invention is not limited to this and can be applied to all semiconductor devices such as integrated circuits.

As explained in detail above, the present invention does not completely remove the oxide film in the base contact hole after passivation treatment, but stops etching when the oxide film in the emitter contact hole is removed, and performs subsequent steps. This minimizes the side etching of the passivation layer, where the etching rate is faster than that of the oxide film, thereby reducing reliability and yield due to etching of the passivation layer when making contact holes. There will be no deterioration in electrical characteristics. Moreover, there is an advantage that the conventional process can be carried out without any particular change. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1a is a sectional view showing an example of a contact portion of a conventional semiconductor device, FIGS. Figures a to d are cross-sectional views showing one embodiment of the manufacturing process of the semiconductor device of the present invention, and Figure 3 is Figure 2 d.
FIG.

In the figure, 1 is an N-type silicon substrate, 2 is a P-type base diffusion region, 3, 4, 6, and 6' are oxide films, 7 is a passivation layer, 8 is a base contact hole, 9 is an emitter contact hole, and 12 is a A low-temperature oxide film, 13 a photoresist film, 14 a glass mask, and 15 an ultraviolet ray.

Note that the same reference numerals in the figures indicate the same or corresponding parts. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1 After the passivation process, the oxide film in the base contact hole is not completely removed, and the etching is stopped when the oxide film in the emitter contact hole is removed, and then the photoresist film used for the etching is removed. After that, a thin oxide film is formed on the entire surface, and then a contact hole smaller than the base contact hole and the emitter contact hole is accurately aligned with each contact hole using the photoresist film to form a contact hole. 1. A method of manufacturing a semiconductor device, characterized by forming a semiconductor device.