JPS6022495B2 - Alignment key pattern protection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for protecting an alignment key pattern suitable for use in a semiconductor pattern printing apparatus incorporating an auto-alignment device, and to a wafer that can be protected.

During the semiconductor microcircuit manufacturing process, a plurality of different photomask patterns are often sequentially transferred onto a semiconductor wafer coated with photoresist.

Since pattern alignment between the mask and the wafer is a complicated task, it has been proposed that this task be performed by an auto-alignment device that combines an optical system, a photoelectric conversion system, and a servo system. Various types of devices are currently in use. In order to carry out automatic alignment, it is necessary to provide a detection pattern in addition to the pattern constituting the electronic circuit in either method, and this detection pattern is usually called a key pattern. Among these, wafer key patterns are formed by etching an insulating layer on a substrate such as a silicon wafer.

However, when the photoresist layer is exposed through a photomask, the mask key pattern on the mask is transferred onto the wafer key pattern, so developing and etching may destroy or deform the wafer key pattern. ``In the next alignment process, this wafer key pattern cannot be used for alignment, and a new key pattern must be embedded in another location.''To deal with this difficulty, photoresist It is already known that negative resists can be cured by preliminary exposure, and positive resists can be shielded from light during exposure.

First, the effect of shielding light when using a positive resist will be explained with reference to FIGS. 1a, b, and c.

In the figure, 1 is a substrate such as silicon, 2 is an insulating layer such as silicon dioxide, 3 is a key pattern portion formed by etching the insulating layer 2, and 4 is a positive resist layer. Further, S is a region where the exposure light is blocked by a light blocking object (not shown). FIG. 1a shows the state of exposure after the first alignment, in which the area S except for the area S is exposed by the light beam 5.

Note that the key pattern of the photomask is not recorded on the photoresist layer 4 of the wafer because the illumination light for alignment uses light outside the wavelength to which the photoresist is sensitive. Therefore, the exposure after alignment will be explained below.
Since the area S is not exposed, the photoresist in this area remains even after the development process, and the photosensitive layer in the exposed area is removed.

Next, the wafer is subjected to an insulating layer etching process. This etching removes the exposed areas of the insulating layer 2. The photoresist in the unexposed areas is then removed. This situation is shown in FIG. 1b. Next, an insulating layer is formed again and a positive resist layer is applied, resulting in a structure as shown in FIG. 1c, which can be used for alignment. At this time, Figure 1c
If you look carefully, you will see that key pattern 3 is different from Figure 1a.
You will notice that there is an insulating layer formed on top. This is because during etching, a photoresist layer is left behind to protect the key pattern formed of the insulating layer, and after the photoresist layer is removed, the insulating layer is formed again. Therefore, in this key pattern protection method, an insulating layer is laminated on the millet that exposes the photomask, which has the disadvantage that the edges of the key pattern gradually sag and the alignment accuracy gradually deteriorates. Ta. On the other hand, in the case of a negative resist, exposure light is applied to the region S. This is because, as in the case of positive resist, this resist layer protects the key pattern formed of the insulating layer during the etching process. Therefore, in this case as well, an insulating layer is deposited each time the photomask is exposed, and the edges of the key pattern gradually become sagging. SUMMARY OF THE INVENTION An object of the present invention is to provide a key pattern protection method that eliminates the above-mentioned drawbacks.

For this reason, the method of the present invention etches a key pattern on the substrate rather than the insulating layer of the wafer, and after photomask exposure, removes the photoresist photosensitive layer and removes the insulating layer by etching, and then forms the insulating layer again. For,
Insulating layers are not deposited sequentially with each photomask exposure, so the edges of the key pattern do not sag. FIGS. 2a, 2b, and 2c show working steps using a wafer according to the present invention.

In the figure, 11 is a semiconductor substrate such as silicon (Si), and 12 is an insulating layer such as silicon dioxide (Si02). Further, 13 is a key pattern groove, which is etched to the substrate 11 together with the insulating layer 12. 14 is a negative resist layer, and S is a light-shielding region.

Note that although FIG. 2a shows a case where Si02 is deposited on Si and then etched down to the Si, Si02 is etched on Sj.
In this case, the cross-sectional shape of the key pattern will be as shown in FIG. 2c. FIG. 2a shows the cross-sectional shape when the first alignment is performed, and the key pattern book 13 is used to adjust the position between the mask and the wafer.

Next, the area S is shielded from light and the negative resist is exposed to light, followed by development and etching. FIG. 2b shows the cross-sectional shape after etching, and the insulating layer in the light-shielding region has been removed. FIG. 2c shows the cross-sectional shape when performing the second alignment, in which an insulating layer is formed on the wafer after the etching process, and a negative resist layer is further thinned. In this case, the wafer key pattern can be detected and used for alignment. Hereinafter, the state during alignment and discontinuation will be explained according to FIGS. 3a and 3b.

In the figure, 20 is the objective lens of a well-known alignment scope (key pattern matching confirmation flash device), 21 is the wafer of the present invention, 22 is the electronic circuit pattern already attached, and 23 is the wafer key pattern. It's a pattern. 24 again
25 is a photomask, 25 is an electronic circuit pattern, 26 is a mask key pattern, 27 is a rigid flat plate transparent to exposure light and alignment illumination light, and 28 is a light shield. Here, the light shielding object 28 is provided on the mask side of the flat plate 27, the mask 25 and the flat plate 27 are arranged extremely close to each other, and the flat plate 27 is movable within the same plane. FIG. 3a shows the state during alignment, in which the objective lens 20 of the alignment scope is placed directly above the key pattern 26 of the mask 24, and the light shielding object 28 is retracted from the optical axis of the objective lens 20.

Next, the alignment scope is operated and the wafer 21 is translated and rotated within a plane by a servo mechanism (not shown) to match the key patterns of the mask and the wafer. Figure 3b shows the situation at dawn,
The objective lens 20 of the alignment scope is moved out of the optical path, and the flat plate 27 is moved so that the light shield 28 is directly above the key pattern 26 of the mask.

Then, the competition light L is irradiated onto the flat plate 27 and the mask 24 from a competition optical system (not shown) to perform the shading. FIG. 4 is for explaining the alignment of the pattern role and shadow printing apparatus.

First, the flat plate 27 is moved in parallel to shift the light shield 28 from above the key pattern 26.

The irradiation light during alignment uses a wavelength in a region where the photoresist is not sensitive, and a photomask 2 is placed on the wafer 21.
Project the image of 4. Numbers 31 to 34 are the projected keys.
In the optical system for observing the pattern, 31 is a half mirror deposited on an extremely thin substrate, 32 is a compensator plate for correcting parallel movement of the image due to refraction of the optical path by the half mirror substrate, and 33 is a microscope. objective lens,
34 is a bush eye lens. After aligning the key pattern of the mask and the key pattern of the wafer, the observation optical system is moved out of the competitive optical path, and the flat plate 27 is moved to shield the key pattern 26 of the mask from light. It performs dawning exposure. Note that the light-shielding flat plate may be placed immediately in front of the wafer.

[Brief explanation of drawings]

FIGS. 1a, b, and 1c are cross-sectional views showing methods used to protect key patterns on wafers coated with secondary positive resist. FIGS. 2a, 2b and 2c are cross-sectional views showing a method of protecting key patterns on a wafer coated with the negative resist of the present invention. FIG. 3a is a perspective view showing the state of alignment when carrying out the present invention, and FIG. 3b is a perspective view showing the state of alignment. FIG. 4 is a perspective view when applied to a projection type awning device. In the figure, 11...substrate,
12...Insulating layer, 13...Key pattern groove etched up to the substrate, 14...Negative resist layer. Grandson - Illustration Lacquer 212, Figure 3, Figure 4

Claims (1)

[Claims] 1 Keys and buttons for aligning multiple masks.
When exposing a wafer with a pattern etched onto the substrate and coated with a negative resist through a first mask, the area including the key pattern is shielded from light, and the key pattern is exposed.
For alignment, which involves removing the photosensitive layer and insulating layer laminated on the pattern part, then laminating the key pattern part again with the insulating layer and photosensitive layer, and aligning with the second mask. Key pattern protection method.