JPS6024620B2 - Pulse transmitter/receiver circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse transmitting/receiving circuit connected to a pulse transmission line.

Conventionally, in this type of pulse transmitting/receiving circuit, it is possible to transmit and receive data simultaneously between two transmitting/receiving circuits, but the third transmitting/receiving circuit connected to the same transmission line only functions as a receiver. There was a point where it was not possible to determine which other transmitting circuit the received information came from.

Therefore, in a transmission circuit where three or more pulse transmitting/receiving circuits are connected on the same W transmission line, only one transmitting/receiving circuit can transmit data, and the other transmitting/receiving circuits must be used only as receivers. was there. Figures 1 and 2
Referring to the figure, there is shown a block diagram representing the basic idea of the pulse transmitting/receiving circuit that has been used in the past.

In FIG. 1, 1 and 2 are pulse transmitting/receiving circuits, and 3 is a transmission line. In this case, the input signal applied to terminal 4 of the pulse transmitting/receiving circuit indicated by pulse transmitting/receiving circuit 1 is output to terminal 7 of the other party's transmitting/receiving circuit, and is output to terminal 6 of the pulse transmitting/receiving circuit indicated by pulse transmitting/receiving circuit 2. The applied input signal is output to the terminal 5 of the pulse transmitting/receiving circuit on the other side. This can be transmitted simultaneously in time. Next, as an example in which a third pulse transmitting/receiving circuit is connected to the above-mentioned transmission circuit, the third pulse transmitting/receiving circuit is shown in FIG. The circuit 8 functions only as a receiver and cannot determine which of the pulse transmitting and receiving circuits 9 and 10 the received information is a signal from.

In other words, in a transmission circuit that connects three (or more) pulse transmitting/receiving circuits to the same transmission line like this, only one pulse transmitting/receiving circuit can transmit, and the other pulse transmitting/receiving circuits are connected to the receiver. There was a point where it was said that it had to be used only as a. This is caused by the pulse transmitting/receiving circuit itself. FIG. 3 shows an example of a pulse transmitting/receiving circuit used in the following. In the figure, a potential Vcc (for example, OV) is applied to the terminals 21 and 22, and a potential VEB (for example, -5.2V) is applied to the terminal 23. Terminals 26, 28, and 30 correspond to the input signal application terminal, transmission line terminal, and output terminal of the pulse transmitting/receiving circuit shown in FIGS. 1 and 2, respectively.
Terminals 24, 25, and 31 are each reference voltage application terminals,
An appropriate resistor is connected to the terminals 29 and 23. The terminal 28 has a voltage of approximately 0.0, -0.8, depending on the state of input applied to the input terminal 26 and the output state of the transmitter/receiver circuit on the other side. 11.
It is designed so that three levels of 6V can be taken. Further, the reference voltage terminal 27 has a voltage of about -1.2V when the voltage applied to the input terminal 26 is high (for example -0.8V), and about -0. It is designed to be 4V. When the other party's transmitter signal is high and the input terminal 26 is at the peak w, the terminal 8 is about 10.8V and the terminal 2
7 is -0.4V, the transistor 33 becomes conductive and the output terminal 30 becomes High level. When the other party's transmitter signal is also at peak w, terminal 28 is approximately OV and transistor 3
2 becomes conductive, and the output terminal 30 becomes the peak w level. Also, when the other party's transmitter signal and the input terminal 26 are both at High level, the terminal 28 is about 10.6V, but the potential at the terminal 27 is about 11.2V, so the output terminal 3 is also at High level. . In this way, there is no problem if it is between two pulse transmitting/receiving circuits, but if a third transmitting/receiving circuit is added to the transmission line connected to terminal 28, the level at terminal 28 will be determined by the input signal of which transmitting/receiving circuit. It becomes impossible to judge whether something is wrong or not. Therefore, when using such conventional transmitting/receiving circuits, it is impossible to simultaneously transmit and receive independent pulse signals between, for example, three transmitting/receiving circuits connected to one transmission line. In other words, data processing circuits within a functional block have become significantly more dense and compact due to advances in integrated circuit technology, but physical miniaturization has not been possible between functional blocks due to the number of signals required to connect them. Restricted. Therefore, at present, the improvement of device performance is limited by the time required for pulse transmission between these functional blocks. In the present invention, in three pulse transmitting/receiving circuits connected to one transmission line, a difference is created in the level of each pulse transmitting signal sent to the transmission line, and the sum signal of these is received to the receiving section. By using a pulse transmitting/receiving circuit that has the function of outputting each other party's transmission signal from the signal, the above drawbacks are solved, the number of transmission lines required between machine building blocks is reduced, the device is miniaturized, and the signal transmission time is reduced. The present invention provides a circuit that achieves a reduction in

The configuration of the present invention is such that a pulse signal to be transmitted is input and the output level of the pulse signal is set to two different output levels of the pulse signals to be transmitted by other pulse transmitting/receiving circuits connected to the same line.
A transmission line drive circuit that outputs a transmission signal to a transmission line such that all combinations of value states are output as different potential differences, and a potential that indicates the sum of the pulse signal to be transmitted and at least two pulse signals to be received. a transmission line level detection circuit that compares the potential of the first reference voltage signal and the comparison result signal with the second reference voltage signal to identify the at least two received pulse signals; The present invention is characterized in that it includes a reference voltage generation circuit connected to a drive circuit and capable of switching the potential of the first reference voltage signal in accordance with the pulse signal to be transmitted.

In a transmission circuit that connects three of the above-mentioned basic pulse transmitter/receiver circuits to the same transmission line, a difference is made in the level of each transmission signal sent to the transmission line, and the sum signal is received by the receiver, and the sum signal is By using a pulse transmitting/receiving circuit having a function of outputting a transmission signal from each other party, the number of transmission lines between functional blocks can be reduced, and the device can be made smaller and the signal transmission time can be shortened.

Next, an embodiment of the present invention will be described with reference to the drawings.

Referring to FIG. 4, there is shown a block diagram representing the basic idea of the pulse transmitting/receiving circuit according to the present invention.
In the figure, 50, 51, and 52 are pulse transmitting/receiving circuits, of which 54, 56, and 58 are transmitting sections, 55, 57, and 59 are receiving sections, and 53 is a transmission line. These pulse transmitting/receiving circuits and the transmission line are connected through terminals A, B, and C, and the input signal Z of the transmitting/receiving circuit 50 is outputted by the receiving sections 57, 59, and the input signal Y of the transmitting/receiving circuit 51 is outputted by the receiving sections 55, 59. 5
The input signal × of the transmitting/receiving circuit 52 is
It is output at 5,57. These transmissions and receptions are attempted to be performed simultaneously using one transmission line 53. FIG. 5 shows a pulse transmitting/receiving circuit showing one embodiment of the present invention.

In FIG. 5, 67 is a transmission line driving circuit, 68 is a reference voltage generation and switching circuit, 69 is a transmission line level detection and output circuit, and the terminal 70 is at a potential of Vcc (for example, OV).
, the potential of terminal 71' and VE8 (for example -5.2V)
is applied to terminals 80, 81, 82, 83, 84, 85,
A reference voltage is applied to each of 86 and 87. Terminals 72, 7
3, 74, and 75 are respectively the Z input terminal 50 of the pulse transmitting/receiving circuit in FIG. 4, the A terminal of the transmission line,
Corresponds to the X output terminal and Y output terminal. The circuit operation when the circuit shown in FIG. 5 is used as the pulse transmitting/receiving circuit 50 in the transmission circuit shown in FIG. 4 will be described below. In the pulse transmitting/receiving circuits 50, 51, and 52, an appropriate resistor is inserted between the terminals 76 and 71 so that the current ratio flowing through the transistor 128 is 1:1.5:2.
, Z among the three input signals, if only the signal level of X is set to Low level (for example -1.6V), the transmission line potential is
If only the signal level of 0.8V and Y is set to Low level (for example -1.6V), it will be -1.2V, and if only the signal level of Z is set to Low level (for example -1.6V), it will be -1.6V. When designed, there are eight levels that the potential of the transmission line can take depending on how these three inputs are combined.

FIG. 6 shows these relationships. To explain by comparing with FIG. 5, the reference voltage terminals 90, 91, and 92 of each of the three reference voltage generating circuits are connected to each other when the signal level of the Z input applied to the terminal 72 is high (for example, -0.8V). In this case, the potentials are -0.6V, -1.0V, and -1.4V, respectively, plus the base-emitter voltage of the transistor 100, VBE, and if they are at the peak W level (for example, -1.6V), they are -2. The potential is the sum of 2V, -2.6V, -3.0V' and V88. Now, if the signal level of each input of
3 is about 0V and transistors 101, 103, 105
becomes conductive, and the internal potential levels of the collector potentials 93, 94, and 95 are all high level (approximately 0 V), and the transistors 107 and 111 become conductive, so that the transistor 11
4, 116, and 117 become conductive, and the signal levels of the output terminals 74 and 75 both become Hi bait level (for example, -0.8V), respectively. The Y signal is output correctly. If only the next signal level of is Low level (approximately -0.8V), and the internal potential level of 94 and 95 is High.
It becomes a release bell (approximately OV) and transistors 107 and 111
becomes conductive and the transistors 115 and 116 become conductive, so the signal level of the output terminal 74 is Low level (for example -1.6V), and the signal level of 75 is High level (
For example, -0.8V). Only the signal level of Y is Low
level (for example -1.6V), the terminal 73 is approximately -1.6V.
．． 2V, the transistors 102, 104, and 105 become conductive, and the internal potential level of the collector potentials 93 and 94 becomes the peak W level (for example, -0.8V), and the internal potential level of the collector potential 95 becomes the Hi level (approximately OV). Next transistor 1
Since transistors 10 and 112 become conductive, transistors 113 and 1
Since the terminal 18 becomes conductive, the signal level of the output terminal 74 becomes a High level (for example, -0.8V), and the signal level of the output terminal 75 becomes a peak W level (for example, -1.6V). The signal levels of both the X and Y signals reach the peak W level (for example, -1.6V). The terminal 73 where both the X and Y signals are at the peak w level is about -2.0V, and the transistors 102, 104, and 106 are turned on, and the internal potential levels of the collector potentials 93, 94, and 95 are at the peak w level (for example, -0. 8V), transistors 109 and 112 become conductive, so transistor 11
Since the output terminals 5 and 118 are in a conductive state, the signal levels of the output terminals 74 and 75 both reach the peak W level (for example, -1.6V). Next, if the signal level of the Z signal itself is the peak w level (for example, -1.6V), and the signal level of the X signal is the w level (for example, -1.6V),
For example, when the voltage is -1.6V), the voltage at the terminal 73 is about -2.4V, but the level at the reference voltage terminals 90, 91, and 92 is also about 1V.
．． Since the voltage drops by 6V, transistors 102, 103, 10
5 becomes conductive, and the internal potential level of the collector potential 93 becomes L.
ow level (approximately 10.8V), the internal potential level of 94 and 95 becomes Hi level (approximately OV), and the transistor 10
Since transistors 7 and 111 become conductive, transistors 115 and 1
16 becomes conductive, and the signal level of the output terminal 74 is Lo.
w level (for example -1.6V), the signal level of 75 is H
It becomes a high level (for example, -0.8V), and both the X and Y signals are output correctly. The same explanation can be made for other combinations as well, but in the above, a minimum of 40 rV was provided to identify the eight levels of the transmission line, but there is no intention to limit it to this and identify the potential of the transmission line. Of course, it is advantageous to make the potential difference even smaller.
In the above-described embodiment, the reference voltage generation circuit 68 generates the reference voltage in a state where all the signals are OFF when a high level signal is input to the input terminal 72 of the transmission line drive circuit 67. That is, the transistors 102, 104,
The base potentials of 106 are -0.6V, -1.0V, -1.
It is set to 4V. Further, when a signal at the peak w level is input to the input terminal 72, for example, a reference voltage is generated with all of them in the ON state. That is, transistors 102, 104
. Please note that as explained above, the present invention provides a pulse transmitting/receiving circuit consisting of a transmission line driving circuit, a reference voltage generating circuit capable of outputting two voltage levels, and a reception level detection/output circuit on one transmission line. end, B end,
By connecting to the C end, the A end and the B end, and the B end and the C end.
It is possible to simultaneously transmit and receive pulses at the C end, C end, and A end, reducing the number of transmission lines required between functional blocks, reducing the size of the device, and shortening the signal transmission time. be able to.

The above explanation has been about a transmission circuit in which three pulse transmitting/receiving circuits shown in FIG. 5 are connected on the same transmission line.
It is not intended that the transmission circuit using this circuit be limited to the above-mentioned transmission circuit, and it is also possible to connect three or more pulse transmission/reception circuits to the same transmission line, as shown in FIG. 7, for example.

An example of use in FIG. 7 is when the pulse transmitting and receiving circuits indicated by 150 and 155 transmit signals of × and Y, respectively, and the pulse transmitting and receiving circuits indicated by 161, 152, 153, and 154 on the same line each transmit × , Y signals can be identified. In this case, 161,162,163,164
The input terminals of are set to low level 1 51, 1 52, 1
It is assumed that the pulse transmitting/receiving circuits indicated by 53, 1 and 54 have only a receiving function. Therefore, the output terminals 165 and 166 of 150 and 155, which also have a transmission function, are
A level will appear. Figure 8 shows that the aircraft has a large number of pulse transmitter/receiver circuits connected on the same line.
, 157, 158 shows a transmission circuit that transmits and receives signals X, Y, and Z between the pulse transmitting and receiving circuits shown in numerals 159 and 168, which are not concerned with signal transmission and reception.
, 160 are set to the peak W level, the connections of the pulse transmitting/receiving circuits shown at 159, 168, 160 have no effect on the signal transmission/reception of ×, Y, and Z. The present invention is capable of transmitting its own pulse signal by connecting three pulse transmitting/receiving circuits as described above to the same transmission line, and at the same time receiving two independent pulse signals from two other pulse transmitting/receiving circuits. This has the effect of reducing the number of transmission lines between functional blocks, downsizing the device, and shortening signal transmission time.

[Brief explanation of the drawing]

Figures 1 and 2 are block diagrams showing the basic idea of the pulse transmitter/receiver circuit currently used, Figure 3 is the conventional pulse transmitter/receiver circuit, and Figure 4 is the pulse transmitter/receiver circuit of the present invention. FIG. 5 is a block diagram showing the basic idea. FIG. 5 is an embodiment of the pulse transmitting/receiving circuit of the present invention. FIG. It is expressed. FIG. 7 and FIG. 8 show the second pulse transmitting/receiving circuit of the present invention.
FIG. 7 is a block diagram showing a third usage example. 1, 2, 8,
9,10,50,51,52,150-160,168
...Pulse transmitting and receiving circuit, 54, 56, 58...
...Transmitting section of pulse transmitting/receiving circuit, 55, 57, 59
... Receiving section of pulse transmitting and receiving circuit, 3, 11, 53...
・Signal transmission line, 21, 22, 23, 70, 71...
...Power terminal, 4, 6, T2, 14, 16, 26, 72,
161-164, 170, 173, 176...
Input terminal, 5, 7, 13, 15, 17, 30, 74, 1
65, 166, 171, 172, 174, 175, 17
7,178...Output terminal, 24,25,31,
80, 81, 82, 83, 84, 85, 86, 87...
... Reference voltage application terminal, 28, 73 ... Transmission line connection terminal, 29, 76 ... Resistance connection terminal, 32, 33, 34, 100 to 131 ... Transistor. ``Sai'' Figure 2 Figures vs. Mi Figures Dimensions Momomi et al. Figures Collection Bag

Claims (1)

[Claims] 1. A pulse signal to be transmitted is input, and the output level of the pulse signal and the output level of the pulse signal to be transmitted by other pulse transmitting/receiving circuits connected to the same line are all combinations of different binary states are output as different potential differences. a transmission line drive circuit that outputs a transmission signal to the transmission line;
Compare the potential indicating the phase of the pulse signal to be transmitted and the at least two pulse signals to be received with the potential of the first reference voltage signal, and compare the comparison result signal with the second reference voltage signal. a transmission line level detection circuit for identifying at least two received pulse signals; and a reference voltage generation circuit connected to the transmission line drive circuit and capable of switching the potential of the first reference voltage signal according to the pulse signal to be transmitted. A pulse transmitting/receiving circuit comprising: