JPS6027208B2 - FM signal demodulation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an FM signal demodulation circuit suitable for integrated circuits with improved signal-to-noise ratio (hereinafter referred to as S/N ratio).

A conventional FM signal demodulation circuit for integrated circuits is shown in FIG.

This FM signal demodulation circuit consists of a resistor, capacitors C3 and C4.
, C5, and an inductance L, and a transistor Q. , Q2, a resistor R, a capacitor C, and a pair of peak detection circuits 2 consisting of transistors Q, Q6 resistors or 4 capacitors C2, and a differential amplifier circuit 3 consisting of a transistor Q3, Q resistors R2, and R3 constant current source 1. It is equipped with The phase shift discrimination network 1 converts frequency deviations into amplitude changes, the characteristics of which are shown in FIG. 6, the voltage is c
3 and the e2 voltage is the voltage across c4, both of which are the output voltages of the phase shift discrimination network 1.

Also, at the center frequency wo of the phase shift discrimination circuit network 1, e
, and e2 are equal in magnitude and opposite in phase. And lol
Over a certain range on either side of o, the magnitude of one signal voltage increases, the magnitude of the other signal voltage decreases, and the phases remain substantially 180o apart. Voltages e and e2 having such characteristics are applied to the pair of peak detection circuits 2. In the peak detection circuit 2, the base of Q2 is driven by Q biased in an emitter follower type.

The emitter of Q is connected to one end of C, and the collector of Q2 is connected to a DC power supply Vw. Also C. The edge of the pond is grounded. Therefore, when e is applied to Q and Q becomes conductive, Q2 becomes conductive and C is charged. Next, the base of Q is Q
Since the emitters of Q and Q are connected to the emitter of Q2, and the emitter current is supplied from constant current source 1, the impedance seen from the base of Q3 to the Q3 side is very large, and the emitter of Q and Q is connected to the emitter of C
, and this impedance exhibits a large time constant with respect to the center frequency wo. When a positive half-wave is applied to Q2, Q2 becomes conductive, and at this time the time constant becomes small and C. is charged to the peak voltage of the emitter of Q2.

When a negative half-wave is applied, the discharge of C becomes only Q, the time constant across C is large, so Q2 becomes non-conducting, and the base voltage of Q3 becomes the emitter of Q2. It will be held at the peak value. A pair of detected voltages having opposite phases are thus applied to the bases of Q3 and Q4 of the differential amplifier circuit 3, and a large detected output is obtained from the output terminal out. Here, the noise generated from a transistor generally has a dependence on the base current, and as shown in Figure 3, the noise figure NF is good if the emitter current is small and the current amplification factor hF8 is large, but if the emitter current is extremely On the other hand, if the amount is too low, the NF will deteriorate due to surface effects and the like.

In Q2 of the peak detection circuit 2, the emitter current is very small, especially when the input is weak.
It appears on t. The aim of the invention is to eliminate the above-mentioned drawbacks and
Reduces noise that occurs when the input signal is weak and improves S/N
The object of the present invention is to obtain an FM signal demodulation circuit with improved ratio.

An embodiment of the present invention will be described below with reference to FIG. In FIG. 4, the same parts as in FIG. 1 are given the same numbers. That is, a phase shift discrimination network 1 is formed by a resistor R6, capacitors C3, C4, C5, and an inductance L, the input terminal IN is connected to one end of R6, and the transistors Q, , Q2, and the resistor R
A pair of peak detection circuits 2 are formed by the i capacitor C, the transistor section, the Q6 resistor, and the K4 capacitor C2. Next, transistor Q3, Q, Q7 diode D
, , resistors R2, R3, R5, R7, R8, and R9 form a differential amplifier circuit 3, and the output terminal out is connected to the collector of Q4. Here, R7, R8, R9, D,,Q
7 forms a constant current circuit, and the collector current of Q7
emitter current is supplied. That is, diode ○,
Connect the cathode of ○ to the ground point, connect one end of R8 to the anode of ○, and connect R between the end of Rs and the DC power supply Vcc.
Connect 7. The base of Q7 is connected to the other end of R8, and R9 is connected between the emitter of Q7 and the ground point. Therefore, the current flowing through D is determined by Vq, R7, and R8, which determines the forward voltage drop of D. Also R
Since the voltage across D8 is determined, the base potential of Q7 is determined, and the emitter current of Q7 is determined.Therefore, a current determined by the base potential of Q7 flows through the collector of Q7.Next, D,
The bases of Q8 and Q9 are connected to the anode of , the emitter of Q8 is grounded through resistors R, o, the emitter of Q is grounded through resistors R, and the collector of Q8 is connected to the emitter of Q2. , Q9's collector is connected to the emitter of Q5.

Therefore, Q8,D,,R,. to form a constant current circuit 4, and
Q9,D,,R,. A constant current circuit 5 is formed. Here, the base potential of Q8 is determined by the daily direction voltage drop of D, and the collector current of Q8 is determined by the base potential of Q. Furthermore, due to the above e, Q,, Q2 are conductive,
Capacitor C, is charged to the peak voltage of the emitter of Q2. At this time, even when charging is finished, the emitter current of Q2 is the sum of the output current of constant current circuit 4 and the base current of Q3, so it is possible to prevent the emitter current of Q2 from becoming extremely low. You can prevent it from getting worse. Furthermore, since the current of the constant current circuit 4 is extremely small, it hardly affects the detection efficiency. Further, the movement of the constant current circuit 5 is exactly the same as that of the constant current circuit 4. As described above, according to the present invention, in the FM signal demodulation circuit, it is possible to reduce the noise that occurs when the input signal is weak, and to significantly improve the S/N ratio.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a conventional example, Figure 2 is an output characteristic diagram of the phase shift discrimination circuit shown in Figure 1, and Figure 3 is a diagram of the transistor N.
The F characteristic diagram, FIG. 4 is a circuit diagram of an embodiment of the present invention. 1... Phase shift discrimination circuit network, 2... Peak detection circuit, 3
... Differential amplifier circuit, 4, 5 ... Constant current circuit, IN.
...Input end, OUT...Output end, Vcc...
...DC power supply, Q, ~Q9...transistor,
R, ~R, . ...Resistance, C, ~C5...Capacitor, L...Inductance. 2 illustrations, 3 illustrations, 4 illustrations.

Claims (1)

[Claims] 1. In an FM signal demodulation circuit having a phase shift discrimination circuit network, a peak detection circuit that receives an output signal of this circuit network, and a differential amplifier circuit that receives an output signal of this detection circuit, the peak detection circuit 1. An FM signal demodulation circuit comprising a pair of transistor circuits that charge respective capacitors in response to an output signal from a network, and a constant current circuit connected in parallel to the capacitors.