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JPS602798B2 - superconducting device - Google Patents
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JPS602798B2 - superconducting device - Google Patents

superconducting device

Info

Publication number
JPS602798B2
JPS602798B2 JP56199494A JP19949481A JPS602798B2 JP S602798 B2 JPS602798 B2 JP S602798B2 JP 56199494 A JP56199494 A JP 56199494A JP 19949481 A JP19949481 A JP 19949481A JP S602798 B2 JPS602798 B2 JP S602798B2
Authority
JP
Japan
Prior art keywords
current
josephson
superconducting
voltage
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56199494A
Other languages
Japanese (ja)
Other versions
JPS58101482A (en
Inventor
敏明 村上
実 鈴木
陽一 榎本
稔 伊藤
義和 日高
隆 犬飼
隆弘 稲村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56199494A priority Critical patent/JPS602798B2/en
Publication of JPS58101482A publication Critical patent/JPS58101482A/en
Publication of JPS602798B2 publication Critical patent/JPS602798B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/10Junction-based devices
    • H10N60/12Josephson-effect devices

Landscapes

  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Description

【発明の詳細な説明】 本発明はラッチ状態を直流電流で自己に制御できる超伝
導論理回路素子に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a superconducting logic circuit element whose latched state can be controlled by direct current.

ジョセフソン接合による従来の論理回路はラッチング回
路が多く、ゲートの接合が電圧状態(オン)になると、
零電圧状態にリセットするにはゲート電流を一次切らな
ければならない。第1図イは入力が3つある場合のジョ
セフソン接合の基本的回路の一つであり、図中Vは電源
、Lは負荷素子、1,,12,13は制御線に流す入力
を示す。×印はジョセフソン接合を示す。図口はゲート
の電流電圧特性を示すものであり、aは動作直線を示す
。普通、ジョセフソン電流lcの最大値loより小さい
値P。に動作点をおき、第1図イの回路では入力電流1
,,12,13のつくる磁界によりジョセフソン電流の
最大値かPoより小さくなると、図口の特性曲線におい
て矢印に沿って電圧状態になり、動作直線との交点P,
に落着く。第1図イに示すように磁界制御でなく、電流
注入による制御では(lo−Po)より大きい電流を注
入すると、同様に特性曲線において矢印に沿って電圧状
態に入る。第1図口のlmは、これより電流が4・さく
なると、接合が零電圧状態にリセットされる電流である
。そこでP,点はlmより大きい電流の点であるので、
一度1gを0にしなければP6点にリセットできない。
このような理由で1gとして交流を給電する方式が考え
られているが、給電損失を考えると直流給電が望ましい
。そこで最近田Mから非ラッチ回路が発表された。
Conventional logic circuits using Josephson junctions are often latching circuits, and when the gate junction is in a voltage state (on),
To reset to zero voltage state, the gate current must be cut off primarily. Figure 1A shows one of the basic circuits of a Josephson junction when there are three inputs. In the figure, V is the power supply, L is the load element, and 1, 12, and 13 are the inputs flowing to the control line. . The x mark indicates a Josephson junction. The figure shows the current-voltage characteristics of the gate, and a shows the operating straight line. Usually, the value P is smaller than the maximum value lo of the Josephson current lc. In the circuit shown in Figure 1A, the input current is 1.
When the maximum value of the Josephson current becomes smaller than Po due to the magnetic field created by , , 12, 13, a voltage state occurs along the arrow in the characteristic curve in the figure, and the intersection with the operating line P,
I settled on. As shown in FIG. 1A, when controlling by current injection instead of magnetic field control, if a current larger than (lo-Po) is injected, the characteristic curve similarly enters a voltage state along the arrow. lm at the beginning of Figure 1 is the current at which the junction is reset to a zero voltage state when the current decreases by 4. Therefore, since the point P is a point where the current is larger than lm,
Unless 1g is set to 0, it cannot be reset to P6 point.
For these reasons, a method of supplying AC power at 1 g has been considered, but in consideration of power supply loss, DC power supply is preferable. Therefore, M. recently announced a non-latch circuit.

この原理はゲートの接合と並列に抵抗を設け、等価的に
第1図口の耳mをP,点より大きくする方法である。し
かし、この場合並列抵抗として素子数が多くなる上に、
回路のラツチを自由にできない欠点を伴っている。本発
明はこれらジョセフソン接合の不便さを除くため、ラッ
チングと非ラッチングの状態を制御電流により自由に選
ぶことのできる超伝導デバイスを提供することを目的と
するものである。
This principle is a method in which a resistor is provided in parallel with the gate junction, and equivalently the edge m of the mouth in FIG. 1 is made larger than the point P. However, in this case, the number of parallel resistors increases, and
This has the disadvantage that the circuit cannot be latched freely. In order to eliminate these inconveniences of Josephson junctions, the present invention aims to provide a superconducting device in which latching and non-latching states can be freely selected using a control current.

上記の目的を達するために、本発明は粒界にジョセフソ
ン接合を有する四角形の超伝導多結晶膜およびこれに接
続された対向する1組の制御端子と、対向する他の1組
のゲート端子とを備え、前記のゲート端子に最大ジョセ
フソン電流以上の電流を流し、かつ同時に制御端子に流
れる電流を制御することにより、超伝導体エネルギー・
ギャップの2倍の整数倍の電圧にラッチLあるいは制御
電流を切ることにより奪電圧状態に複帰したりすること
を特徴とする超伝導デバイスを発明の要旨とするもので
ある。次に本発明の実施例を添附面について説明する。
In order to achieve the above object, the present invention comprises a rectangular superconducting polycrystalline film having Josephson junctions at grain boundaries, a pair of opposing control terminals connected to this, and another pair of opposing gate terminals. By flowing a current higher than the maximum Josephson current to the gate terminal and simultaneously controlling the current flowing to the control terminal, superconductor energy
The gist of the invention is a superconducting device characterized by returning to a deprived voltage state by cutting the latch L or control current to a voltage that is an integral multiple of twice the gap. Next, embodiments of the present invention will be described with reference to the accompanying drawings.

なおこの実施例は一例示であって、本発明の精神を逸脱
しない範囲において種々の変更あるいは改良を行いうろ
ことは云うまでもない。第2図は本発明の基本的構成を
示し「図におし、て1は基板、2は基板1上に形成され
た素子の主要部分で、結晶粒界にジョセフソン接合をも
つ四角形の超伝導体多結晶薄膜からなり、3,3′,4
,4′は前記の薄膜において対向する辺に設けられた超
伝導体よりなる2組の電極端子である。
It should be noted that this embodiment is merely an example, and it goes without saying that various changes and improvements may be made without departing from the spirit of the present invention. Figure 2 shows the basic configuration of the present invention. Consisting of a conductor polycrystalline thin film, 3, 3', 4
, 4' are two sets of electrode terminals made of superconductors provided on opposite sides of the thin film.

2つの粒界にジョセフソン接合をもつ超伝導体多結晶薄
膜は、例えば特厭昭56−11821号出願に述べたよ
うに、酸化物超伝導体BaPbrxBix03の薄膜を
スパッタ法等で形成し、空気中又は酸素中0で500〜
650℃で3〜1幼時間熱処理して形成される。
A superconductor polycrystalline thin film having a Josephson junction between two grain boundaries is produced by forming a thin film of an oxide superconductor BaPbrxBix03 by sputtering or the like, as described in the Japanese Patent Application No. 11821/1983, for example. 500 to 0 in medium or oxygen
It is formed by heat treatment at 650°C for 3-1 hours.

この場合平均粒径2500Aの結晶粒の周囲にジョセフ
ソン接合が生じた第3図イに示すような構造になる。図
中5は超伝導体の結晶粒を示す。第4図イは本発明の電
圧‐電流特性を示す。第夕2図のAA方向に電流1gを
流し(この場合lc=0)「電流1gがジョセフソン電
流の最大値Lより大きくなると素子が電圧状態(2△/
e)(ここに△は超伝導体エネルギーギャップ、eは電
子電荷を示す。)になりト曲線8に移り電流を減らす0
と曲線に沿って変化し電圧状態の最小値lm,に達する
と雰電圧状態に戻る。もし、BB方向に直流の制御電流
lcをある閥値lc,以上に流すと第4図イの曲線8は
曲線8′に変り、電流が1′m,迄変って雰電圧状態に
復タ帰する。
In this case, a structure as shown in FIG. 3A is obtained in which Josephson junctions are formed around crystal grains having an average grain size of 2500 Å. In the figure, 5 indicates a crystal grain of the superconductor. FIG. 4A shows the voltage-current characteristics of the present invention. A current of 1 g is passed in the direction of AA in Fig. 2 (in this case, lc = 0).When the current of 1 g becomes larger than the maximum value L of the Josephson current, the element enters the voltage state (2△/
e) (here, △ is the superconductor energy gap, and e is the electron charge.) The current changes to curve 8 and decreases to 0.
The voltage changes along the curve, and when it reaches the minimum value lm of the voltage state, it returns to the ambient voltage state. If a DC control current lc flows in the BB direction above a certain threshold value lc, the curve 8 in Figure 4A changes to a curve 8', and the current changes to 1'm, returning to the atmospheric voltage state. do.

この1′m,の位置はBB′方向の電極端子の幅によっ
て決まり、幅がAA′方向の端子と同等以上になると1
′m,は−loに等しくなる。従ってBB方向の電極の
幅は、AA′の方向の電極の幅よりも小であることが、
心要である。さらにBB′の方向の0電極の幅とAA′
の方向の電極の幅との比を変えることによって、第4図
イにおいて示される電流1′m,の値を調整することが
できる。電流1gがちより大きい1′。を越えると、l
c=0で‘ま第4図口のょ化電圧等磯蛾を生比後、電流
を減ずると曲線9に変化し、lm2 を通って零電圧状
態にもどる。
The position of this 1'm is determined by the width of the electrode terminal in the BB' direction, and if the width is equal to or greater than the terminal in the AA' direction, 1'
'm, becomes equal to -lo. Therefore, the width of the electrode in the BB direction is smaller than the width of the electrode in the AA' direction.
This is important. Furthermore, the width of the 0 electrode in the direction of BB' and AA'
By changing the ratio of the width of the electrode in the direction of , the value of the current 1'm, shown in FIG. 4a, can be adjusted. Current 1g is 1' larger than 1g. If you exceed l
When c=0, the voltage at the bottom of Figure 4 is reduced, and when the current is reduced, it changes to curve 9 and returns to the zero voltage state through lm2.

1g>1′。1g>1'.

でlc>lc,となるか1g>loでlc>lc2(l
c2>lc,なる第2の閥値)になると曲線9が9′に
変り、電流が減ると1′m2に至り、そこから零電圧状
態にもどる。このときの1′m2もrm,と同様にBB
′方向の電極端子の幅に依存する。電流1gをさらに大
きくすると6△/e、…と「 2△/eの整数倍の電圧
状態に移る。
Then lc>lc, or 1g>lo then lc>lc2(l
When the second threshold (c2>lc) is reached, the curve 9 changes to 9', and as the current decreases it reaches 1'm2, from which it returns to the zero voltage state. At this time, 1'm2 is also rm, and similarly BB
depends on the width of the electrode terminal in the ′ direction. When the current 1g is further increased, the voltage state changes to 6△/e, which is an integral multiple of 2△/e.

また1gの方向が逆のときは第亀図イ,口に示すように
AA′端子にあらわれる電圧が逆になる。第4図イ,口
の特性は、ラ、ソチング状態を自由に選べる論理スイ、
ソチ素子に応用できる。
If the direction of 1g is reversed, the voltage appearing at the AA' terminal will be reversed, as shown in Figure A and B. Figure 4 A. The characteristics of the mouth are A. A logic switch that allows you to freely choose the sowing state;
It can be applied to Sochi elements.

これを第4図イについて説明する。始め、バイアス電流
でPoの動作点におき、負荷 タ直線がごP,となるよ
うに負荷抵抗を選んでおく。
This will be explained with reference to FIG. 4A. First, set the bias current at the operating point Po, and select the load resistance so that the load Ta line becomes P.

そこで、入力信号をAA′に加え、電流16がloを越
えるか、或るし、は制御磁界によりジョセフソン最大電
流がloより小さくなると、素子は電圧状態に移る。l
c=0であれば入力パルスが去ったZO後、曲線8に沿
ってlm.に至たり零電圧状態のPoによりセットされ
る。つまり非ラッチ動作を行つoこれに対しlc>lc
,にしておくと電圧状態になってからは曲線8′に沿っ
て変化し、負荷直線Zとの交点PIにおさまり、電圧状
態にラツチされる。
Then, when an input signal is applied to AA' and the current 16 exceeds lo, or the control field causes the Josephson maximum current to be less than lo, the device transitions to the voltage state. l
If c=0, after the input pulse leaves ZO, lm. It is set by Po in the zero voltage state. In other words, a non-latching operation is performed o On the other hand, lc>lc
, then after reaching the voltage state, it changes along the curve 8', settles at the intersection point PI with the load straight line Z, and is latched to the voltage state.

ラッチ状態から解放するにはloを0にすればよい。も
し、入力電流がさらに大きくなると、第4図ロに示すよ
うに電圧4△/eの状態(曲線9およ2び9′)に移り
、さらに狐△/eの電圧状態に移ることも可能である。
To release from the latched state, lo should be set to 0. If the input current becomes even larger, it is possible to move to the state of voltage 4△/e (curves 9 and 2 and 9') and further to the voltage state of 4△/e as shown in Figure 4B. It is.

特定のnの値にするにはlcの値によって決めると便利
である。例えばn=2のときはlc2<lc<lc3
にしておき、ゲートのバイアス電源により電圧が4△/
eより大き2くならないようにしておくと確実な動作を
する。以上が動作の説明であるが、以下では第3図によ
り、この動作の物理的根拠を述べる。第3図イは第2図
の2を拡大したもので、5は超伝導体の結晶粒である。
It is convenient to determine a specific value of n based on the value of lc. For example, when n=2, lc2<lc<lc3
The voltage is set to 4△/ by the gate bias power supply.
If you make sure that the value is not greater than 2, e will work reliably. The above is an explanation of the operation, and below, the physical basis of this operation will be described with reference to FIG. Figure 3A is an enlarged view of 2 in Figure 2, where 5 is a superconductor crystal grain.

口は結晶粒をさらに舷3大したものでその周囲にはジョ
セフソン接合が形成されている。薄膜2の部分に電流1
g,lcを注入すると、一つの結晶粒には互に直角な方
向の電流ig,icが流れる。ig,lcが横切るジョ
セフソン接合の位置は異なる。la,ibが各接合の部
分の最大ジョセフソン電流icより小、さし、場合、そ
の間での相互干渉はない。
The mouth is a crystal grain that is three times larger, and a Josephson junction is formed around it. Current 1 is applied to the thin film 2 part.
When g and lc are injected, currents ig and ic flow in directions perpendicular to each other in one crystal grain. The positions of the Josephson junctions crossed by ig and lc are different. If la and ib are smaller than the maximum Josephson current ic in each junction, there is no mutual interference between them.

しかし、例えばicがio以上になると図口の6の部分
は電圧状態になり、周波数のコ4△/h(△は超伝導体
のエネルギーギャップ、hはプランク定数)のマイクロ
波が発生される。(B,D,JOSephS。
However, for example, when ic becomes more than io, the part 6 in the figure becomes a voltage state, and microwaves with a frequency of 4△/h (△ is the energy gap of the superconductor and h is Planck's constant) are generated. . (B, D, JOSephS.

n‘‘Coupled SuperConductOG
’’Rev,ofModemPh$ics,Jan雌r
y1964,PP216−22礎参照)。このマイクロ
波ェネルギは図ハのように伝搬され電流igの流れる方
向の向きに電圧2△/eを発生する。lcをlc,以上
増加すると、このような状態の結晶粒が図二のように2
の部分に対角線状に並び、結果としてAA′方向すなわ
ち端子3,3′に電圧2△/eを生ずるようになる。l
cがlc2以上に増加すると対角線状に2列に電圧状態
の結晶粒が並びVgは4△/eとなる。接合の電圧が2
△/eの整数倍のとき前述のジョセフソンの理論電流は
−lcとlcの間の任意の値をとることができる。
n''Coupled SuperConductOG
''Rev, ofModemPh$ics, Jan female r
y1964, PP216-22 Foundation). This microwave energy is propagated as shown in Figure C and generates a voltage 2Δ/e in the direction in which the current ig flows. When lc is increased by more than lc, the crystal grains in this state become 2 as shown in Figure 2.
, and as a result, a voltage 2Δ/e is generated in the AA' direction, that is, at the terminals 3 and 3'. l
When c increases to lc2 or more, crystal grains in the voltage state are arranged diagonally in two rows, and Vg becomes 4Δ/e. The voltage at the junction is 2
When Δ/e is an integral multiple, the aforementioned Josephson's theoretical current can take any value between -lc and lc.

第4図イ、口において、lcを流する1g−Vg特性が
変化したのはこの理由によるものである。ただし、第2
図におけるBB′方向の端子幅がAA′方向に比べ細い
場合は電圧状態における電流の下限の絶体値がloより
小さくなる。〔実施例〕 超伝導薄膜としてBaPq〜Bix03(0.25<×
く0.35)による例を示す侍願昭56一11821号
出願に記載したように、この材料の多結晶薄膜の結晶粒
界には、丁度ジョセフソン接合になるような薄いバリア
が形成される。
This is the reason why the 1g-Vg characteristic of flowing lc at the mouth in Figure 4A changed. However, the second
If the terminal width in the BB' direction in the figure is narrower than in the AA' direction, the absolute value of the lower limit of the current in the voltage state will be smaller than lo. [Example] BaPq~Bix03 (0.25<×
As described in Samurai Application No. Sho 56-11821, which shows an example of 0.35), a thin barrier just like a Josephson junction is formed at the grain boundaries of a polycrystalline thin film of this material. .

このような傾向は組成x>0.25で著しくなる。実施
例ではx:0.3を選んだ。薄膜の厚さは2000〜7
000Aが適当であるが、ここでは5000Aを選んだ
。超伝導転移温度Tcはx=0.3で約眺で、2△/e
は2.2hVである。超伝導薄膜の作成は特鰯昭55一
12027号出願において記載されているように、母(
Pb船Bio.3)0,.504なる組成のターゲット
を用い、アルゴンと酸素各50%の混合ガス圧6×10
2Ton、プレート電圧1.細Vにおいて、約260q
0のサファィャ基板上にスパッタリングで薄膜を形成し
、酸素中で560ooで約1幼時間熱処理した。
Such a tendency becomes remarkable when the composition x>0.25. In the example, x: 0.3 was selected. The thickness of the thin film is 2000~7
Although 000A is appropriate, 5000A was chosen here. The superconducting transition temperature Tc is approximately 2△/e at x=0.3
is 2.2hV. The preparation of the superconducting thin film is based on the mother (
Pb ship Bio. 3) 0,. Using a target with a composition of 504, the mixed gas pressure of 50% each of argon and oxygen was 6 x 10.
2Ton, plate voltage 1. Approximately 260q in narrow V
A thin film was formed by sputtering on a No. 0 sapphire substrate, and heat treated in oxygen at 560 oo for about 1 hour.

結晶粒の直径は平5均2400Aであった。この薄膜を
エッチングするには「特願昭56−9569号出願に記
載してあるように、HCと04(60.0〜62.ぴ○
溶液)を水に対して容積比で20〜60%加え、この溶
液に対してHC〆(35.0〜37.0%溶液)を容積
比で1〜0.3%加えた0溶液によりエッチングするこ
とにより、サイズは第1図の2の部分としてloAm×
10仏mとloAm×20山mとの2種のパターンを形
成した。次に、電極端子および配線パターンにはBaP
Bo.7がio.2503なる組成を選んだ。
The average diameter of the crystal grains was 2400A. To etch this thin film, use HC and 04 (60.0 to 62.pi○) as described in Japanese Patent Application No. 56-9569.
Etching with a 0 solution in which 20 to 60% by volume of solution) was added to water, and 1 to 0.3% by volume of HC〆 (35.0 to 37.0% solution) was added to this solution. By doing this, the size is loAm× as part 2 in Figure 1.
Two types of patterns were formed: 10 m and loAm x 20 m. Next, BaP was used for the electrode terminals and wiring patterns.
Bo. 7 is io. A composition of 2503 was selected.

この組成の薄膜はx=0.3の場合に比べ臨界電流密度
が第2図の薄膜2の部分の最大ジョセフソン電流の4倍
大きくなるので、薄膜2の部分が電圧状態になっても、
電極端子および配線部は零電圧状態が保たれる。薄膜の
スパッタ条件、熱処理条件は前記と同じである。この場
合のパターン形成には、商品名AZ1350Jのポジレ
ジストで電極端子と配線部のパターンを形成し(その部
分のレジストを除たパターン)、上から上記組成物のス
パッタを行ない、レジストを除去し第2図の素子を完成
させた。第2図においてAA′の方向の線幅は10仏m
と20一mの2種類、BB方向の幅は何れも10山mと
した。この素子の最大ジョセフソン電流loは10仏m
で70仏A、20りmで140仏Aであり、2△/eは
2.2hV、lc,=140仏A(線幅10仏m)、l
c2 −160ムAであった。
In a thin film with this composition, the critical current density is four times larger than the maximum Josephson current in the thin film 2 portion of FIG.
The electrode terminal and wiring section are maintained at zero voltage. The thin film sputtering conditions and heat treatment conditions are the same as above. To form a pattern in this case, a pattern for the electrode terminal and wiring part is formed using a positive resist with the trade name AZ1350J (a pattern excluding the resist in that area), and the above composition is sputtered on top to remove the resist. The device shown in Figure 2 was completed. In Figure 2, the line width in the direction of AA' is 10 mm.
and 201 m, and the width in the BB direction was 10 m. The maximum Josephson current lo of this element is 10 m
70 Buddha A at 20 m, 140 Buddha A at 20 m, 2△/e is 2.2 hV, lc, = 140 Buddha A (line width 10 Buddha m), l
c2-160muA.

実施例以外の材料でも第2図の構造を構成すれば第4図
の特性を実現できる。
If the structure shown in FIG. 2 is constructed using materials other than those in the example, the characteristics shown in FIG. 4 can be achieved.

叙上のように本発明によれば素子のラッチ状態を自由に
外部からの電流で制御できるだけでな〈、ゲ−トの電圧
状態の電圧も自由にえられることができるので、従来の
ジョセフソン接合に比べ回路の設計において大きな自由
度をもたらす。
As mentioned above, according to the present invention, not only can the latch state of the element be freely controlled by an external current, but also the voltage of the gate voltage state can be freely obtained, which is different from the conventional Josephson method. It provides a greater degree of freedom in circuit design than bonding.

また、本発明は素子の製法も非常に簡単であるため、上
記のように穣れた機能のデバイスを低コストで製作でき
る利点をもつものである。
Furthermore, since the manufacturing method of the element of the present invention is very simple, it has the advantage that a device with the above-mentioned sophisticated functions can be manufactured at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図口は従来のジョセフソン接合の特性「第1図イは
従来素子による磁界制御形の基本回路、第2図は本発明
による超伝導デバイス、第3図イ〜二は動作の物理的説
明図、第4図イ,口は本発明の特性を示す。 1・・。 基版、2・・・粒界ジョセフソン接合をもつ超伝導体多
結晶薄膜、3,3′,4,4′・・・超伝導体による電
極端子、5…結晶粒子「 6・・・結晶粒界ジョセフソ
ンのマイクロ波発生部、7・・・マイクロ波ェネルギを
吸収し電圧を発生する部分、1g…ゲート電流「lo・
・・最大ジョセフソン電流、Po,P,…動作点、lc
…制御電流、8,8′9,9′…曲線、lm,,lm2
,1′m,,1′m2…電圧状態の電流の最低値。第1
凶 第2図 第3図 第4図
Figure 1 shows the characteristics of a conventional Josephson junction; Figure 1A shows the basic circuit of a magnetic field controlled type using a conventional element; Figure 2 shows a superconducting device according to the present invention; Figure 3A-2 show the physical characteristics of the operation. Explanatory drawings, Figure 4 A, and mouth indicate the characteristics of the present invention. 1... Base plate, 2... Superconductor polycrystalline thin film with grain boundary Josephson junction, 3, 3', 4, 4 '... Electrode terminal made of superconductor, 5... Crystal particle ' 6... Crystal grain boundary Josephson microwave generation part, 7... Part that absorbs microwave energy and generates voltage, 1g... Gate Current “lo・
...Maximum Josephson current, Po, P,...Operating point, lc
...control current, 8,8'9,9'...curve, lm,,lm2
, 1'm,, 1'm2...Minimum value of current in voltage state. 1st
Figure 2 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】 1 粒界にジヨセフソン接合を有する四角形の超伝導多
結晶膜およびこれに接続された対向する1組の制御端子
と、対向する他の1組のゲート端子とを備え、前記のゲ
ート端子に最大ジヨセフソン電流以上の電流を流し、か
つ同時に制御端子に流れる電流を制御することにより、
超伝導体エネルギー・ギヤツプの2倍の整数倍の電圧に
ラツチ、あるいは制御電流を切ることにより零電圧状態
に複帰したりすることを特徴とする超伝導デバイス。 2 制御電流の方向の粒界ジヨセフソン接合部の薄膜の
辺の長さを、ゲート電流の方向の辺に比べて小さくし、
両者の辺の比によってラツチ状態におけるゲートの電圧
状態の最小電流を調整することを特徴とする特許請求の
範囲第1項記載の超伝導デバイス。 3 粒界ジヨセフソン接合をもつ多結晶薄膜にBaPb
_1_−_xBi_xO_3(0.1<x≦0.35)
を用い、電極としては、超伝導電極材料を用いたことを
特徴とする特許請求の範囲第1項及び第2項記載の超伝
導デバイス。
[Scope of Claims] 1. A rectangular superconducting polycrystalline film having Josephson junctions at grain boundaries, a pair of opposing control terminals connected to the rectangular superconducting polycrystalline film, and another pair of opposing gate terminals, By flowing a current higher than the maximum Josephson current to the gate terminal of the
A superconducting device characterized by latching to a voltage that is an integral multiple of twice the superconductor energy gap, or returning to a zero voltage state by cutting off the control current. 2. The length of the side of the thin film of the Josephson junction in the direction of the control current is made smaller than the side in the direction of the gate current,
2. The superconducting device according to claim 1, wherein the minimum current in the voltage state of the gate in the latched state is adjusted by the ratio of the two sides. 3 BaPb in a polycrystalline thin film with grain boundary Josephson junctions
_1_-_xBi_xO_3 (0.1<x≦0.35)
3. The superconducting device according to claim 1, wherein a superconducting electrode material is used as the electrode.
JP56199494A 1981-12-12 1981-12-12 superconducting device Expired JPS602798B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56199494A JPS602798B2 (en) 1981-12-12 1981-12-12 superconducting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56199494A JPS602798B2 (en) 1981-12-12 1981-12-12 superconducting device

Publications (2)

Publication Number Publication Date
JPS58101482A JPS58101482A (en) 1983-06-16
JPS602798B2 true JPS602798B2 (en) 1985-01-23

Family

ID=16408743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56199494A Expired JPS602798B2 (en) 1981-12-12 1981-12-12 superconducting device

Country Status (1)

Country Link
JP (1) JPS602798B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6065582A (en) * 1983-09-20 1985-04-15 Nippon Telegr & Teleph Corp <Ntt> Grain boundary josephson junction photodetector

Also Published As

Publication number Publication date
JPS58101482A (en) 1983-06-16

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