JPS6028036B2 - integral circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integrating circuit that provides an analog integrated output.

When an analog integrator is used as an integrator that integrates an input over a long period of time, such as in the measurement of integrated power, the analog integrator has the disadvantage of causing errors in the integrated output because it is easily affected by drift.

The present invention realizes an integration circuit with a simple configuration and inexpensive elements that is less affected by drift and can provide analog integration output without error even during long-term integration.

FIG. 1 is a block diagram of an embodiment of an integrating circuit according to the present invention.

In Figure 1, River is an input terminal, IG is an integrator consisting of an operational amplifier A, an input resistor RI, and a capacitor CI.
A reset switch SW is connected to the capacitor CI in parallel with this.
is connected. COM is a comparator, COU is 2
This is Susumu Kauso Yu. The comparator COM has an integrator IG.
The comparator COM outputs a signal when the output value exceeds the set value Vref. The output terminal of the comparator COM is connected to the input terminal of the counter COU, and the switch S
Connected to W. D/A is a digital-to-analog converter (hereinafter referred to as a D/A converter). counter C
Count the output pulses of the O-yama comparator COM, and
The A converter converts the count value of the counter COU into an analog signal. The output of the D/A converter and the output of the integrator are weighted such that the output lbit of the D/A converter corresponds to one integration period of the integrator IG. ADD is an adder that adds the output of the D/A converter and the output of the integrator IG. OUT is an output terminal and is connected to the output terminal of the adder ADD. The operation of the integrator circuit according to the present invention having such a configuration will be explained using the waveform diagram shown in FIG. 2. The input signal applied from the input terminal IN is applied to the integrator IG and integrated, and the output of the integrator IG increases with time.

The output of the integrator IG is applied to a comparator COM and compared with a set voltage Vref. When the output of the integrator IG exceeds the set voltage Vref, the comparator COM outputs a signal. After the signal is differentiated by capacitor C and resistor R, it is applied to switch SW to turn it on. This resets the integrator IG. In this way, since the output of the comparator COM is fed back to the integrator 10, the output of the comparator COM becomes a pulse signal. The output of the integrator IG and the output pulse signal of the comparator COM are shown in FIG. The output pulses of the comparator COM are added to the binary counter COU' and counted.
The counted value is added to a D/A converter and converted into an analog signal. The analog output of the D/A converter increases stepwise, as shown by the solid line in FIG. 2C. This step-like analog signal is connected to the resistor R. is added to adder ADD via. On the other hand, the output of the integrator IG, which is repeatedly reset at a cycle corresponding to lbi[minutes of the output of this D/A converter, is given to the adder ADD and added to the output of the D/A converter. As a result, the output of the adder ADD is as shown in FIG.
It will look like the dotted line. That is, discontinuity in the output of the D/A converter is complemented by the output of the integrator IG, and the output terminal OUT
It is possible to extract an analog integral output that increases continuously with time. In this way, the integrator circuit of the present invention has D
Since the discontinuous output of the /A converter is supplemented with the output of the integrator that is reset at regular intervals to obtain a continuous analog integrated output, the drift of the analog integrator is also reset at regular intervals. As a result, it is possible to obtain an integrating circuit that is free from the influence of drift even if the input is integrated over a long period of time.

Moreover, since the integrator is reset at regular intervals in this way, it is possible to significantly increase the integral current of the integrator compared to an integrator that integrates the input continuously for a long time. Become. As a result, it is possible to use an easily available integrating capacitor with high capacity, high precision, and low leakage.

■ There is no need to use a high-resistance input resistor for the integrator.■ It is less susceptible to humidity.

etc., an inexpensive and extremely practical integrating circuit can be obtained with a simple configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of an integrating circuit according to the present invention, and FIG. 2 is a waveform diagram for explaining its operation. IG...Integrator, COM...Comparator, D/A...Digital/analog converter, C
OU...Counter, ADD...Adder. Figure 1 Figure 2

Claims (1)

[Claims] 1. An integrator that integrates an input signal, a comparator that outputs a signal when the output of this integrator reaches a set value and uses that output signal to reset the integrator, and a counter that counts the output pulse signal of this comparator. , a digital-analog converter that converts the output of this counter into an analog signal and weights it so that 1 bit of the analog output signal corresponds to one cycle of the integrator; An integrating circuit comprising: an adder for adding the output signal of the integrator; and an output terminal for taking out the output of the adder.