JPS6028202B2 - Failure detection circuit to prevent false detection - Google Patents

Description

Detailed Description of the Invention This invention introduces an extremely low speed detection condition for the system into a fault detection circuit in a multi-system on-board receiver of an automatic train control (abbreviated as ATC) device, thereby preventing false detection of faults. The present invention relates to a detection circuit, and is particularly aimed at preventing the detection of a failure near the attenuation point of the signal reception level.

In order to ensure safety in train passenger transportation, ATC equipment uses so-called redundant circuits, in which the electrical circuits in its vital parts are multiplexed into dual or triple systems depending on the degree of importance. Measures are taken to increase the reliability of the device by allowing other systems to continue functioning normally even if one system fails.

Therefore, in order to quickly detect a failure in any system and take remedial measures, a failure detection circuit for each system is attached to the apparatus. In a multi-system on-board reception system, when failure detection is performed for each system, the failure is normally determined by detecting discrepancies in the operating states of each system.

That is, FIG. 1A shows signals received from the ground to the on-vehicle antenna CA by receiving circuit blocks RA, .
Through R and R, each receiving relay M old,,MR
2. A basic circuit example of a triple system on-board receiving circuit to drive MR3. Figure B shows the old relay M, MR2, M
This is an example of a drive circuit for an output relay PR based on so-called majority logic, which is configured by combining each contact point of R3 (indicated by the same symbol as a relay, the same applies hereinafter), and shows that the circuit operations of at least two of the triple systems match. This is a basic requirement, and a failure detection circuit such as the one shown in FIG. 2 detects the first system that does not match, and determines it as a failure circuit. For example, when a signal is received when the No. 1 and No. 2 systems are normal and the No. 3 system is in a faulty state, relays MR, MR2 are activated, relay MR3 is in a restored state, and output relay PR is activated.

Therefore, the circuit of operation contact PR and recovery contact MR3 is configured with the circuit shown in FIG. 2, and the detection signal phantom 3 is output, and a failure in the No. 3 system is detected. Note that phantom and phantom 2 are failure detection signals for the 1st and 2nd systems. However, in the fault detection circuit shown in Fig. 2, the transmission from the ground to the train is detected at the boundary of a block section formed by the orbit of the track or the installation of a loop antenna for signal transmission, or at the twisting depth point of the loop antenna. When a train runs at extremely low speed near the attenuation point of the signal level,
Due to variations in the receiving sensitivity of each system, a mismatch may occur in the operating states of each system, and a failure detection circuit may be activated. For example, the curve lv shown in FIG. 3A represents the on-vehicle reception level on the transmitting loop antenna L, which shows only the vicinity of the twisting point P in FIG. Assuming that the minimum operating levels of the receiving circuits No. 1, No. 2, and No. 3 systems when the train passes over the twisting point P are lm,, lm2, and lm3, respectively, the distance between them is s,
is the motion mismatch distance between the No. 3 system and the No. 1 and No. 2 systems, and the distance s2 is the motion mismatch distance between the No. 1 system and the No. 2 and 3 systems.

Therefore, the respective operation mismatch times at train speed v are equal to = s, /v for the 3rd system and the 1st and 2nd systems.
, for the No. 3 system, t2 = s2/v, and when the train slows down near point P or stops, the period of time or operation mismatch time increases, and there is no failure in each system. Regardless of the situation, an incorrect failure detection operation is performed. At the boundary of the above-mentioned combustion point or block section of the loop antenna, the range where there is a possibility of operational inconsistency among the on-board receiving systems is generally less than 50 cm in distance.

Therefore, the above-mentioned incorrect failure detection is limited to cases where the vehicle passes through that point at an extremely low speed or has stopped, as described above. However, trains are generally equipped with an on-board device separate from the ATC device and capable of detecting extremely low train speeds (for example, 5 speeds/h) as shown in Figure 4 for security purposes such as opening and closing the vehicle doors. It is being That is, A in the same figure is a block diagram of a speed detection device for door opening/closing security that detects the output of the speed generator 　○ by a speed detection circuit SD to drive the detection relay SDR, and B in the same figure shows the operation of the detection relay SDR. On the chart, the train is stopped or at extremely low speed (e.g. less than 5 objects/H)
Now operate the relay SDR and reach the set detection speed (5
Object/H), restore the relay SDR. The operating contact of this relay SDR is inserted into the door opening/closing control switch circuit to prevent the train door from opening when the train's speed exceeds a set extremely low speed. The present invention utilizes the conditions for extremely low speed detection described above, and when the train is at an extremely low speed below the detection speed, the failure detection circuit shown in FIG. By providing a failure detection function only when the above-mentioned failure detection function is provided, the above-mentioned unauthorized failure detection is prevented. FIG. 5 shows an embodiment of the present invention.

In other words, the figure shows that the recovery contact SDR of the detection relay SDR shown in Fig. 4 is inserted into the input side of the conventional fault detection circuit shown in Fig. 2, and when the train is at an extremely low speed, the relay SDR operates to generate a fault detection signal. The generation circuits of phantom, phantom 2, and M3 are cut off, and generation of false detection signals is prevented. However, if the failure detection time is the duration of the first failure for the above-mentioned failure detection circuit to detect a failure, then the time it takes for a train to travel 50 places at a speed of 5 days/day is 0.36 (seconds). Therefore, the failure detection time at this time needs to be set larger than 0.36 (seconds).

As described above, the present invention has the effect of preventing erroneous detection by the failure detection circuit by utilizing the usage level detection conditions for train door opening/closing control.

[Brief explanation of the drawing]

Figure 1A is a basic block diagram of a triplexed ATC onboard receiving circuit, Figure 1B is a majority logic output circuit diagram of the above circuit, and Figure 2 is a conventional circuit attached to the triplex circuit. failure detection circuit, Figure 3A is a curve diagram of the change in reception level on the vehicle, Figure 3B is
4 is a schematic diagram of the vicinity of the transmitting loop antenna twisting point where the level change occurs, FIG. FIG. 5 is a circuit diagram showing an embodiment of the failure detection circuit for preventing malfunction of the present invention. M old..., MR2, MR3...receiving relay of triplex receiving circuit or its contacts, PR...triple system majority logic output relay or its contacts, TC...speed generator, SD
...Speed detection circuit, SDR...Speed detection relay or its contacts. Next figure 1〆 Z figure inferior 3 figure Next figure 4 T figure

Claims (1)

[Claims] 1 Introducing the speed detection conditions of the train speed detection device for door opening/closing security already installed in the vehicle into the failure detection circuit that detects operational discrepancies between each system in the automatic train control multiple system onboard receiving device and determines system failure. A failure detection circuit for preventing false detection, characterized in that the circuit is configured to stop the detection function of the failure detection circuit when the train speed is lower than the detection speed set in the detection device.