JPS6031422B2 - Image signal correction device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image signal correction device applicable to facsimile receivers and the like that record in black and white binary.

Conventionally, in facsimile receivers that perform binary recording, AG
The baseband signal on the transmitting side is regenerated using a C circuit, a synchronous detection circuit, a low-pass filter, an absolute value amplifier, etc., and the regenerated baseband signal is converted into a binarized signal using a predetermined threshold value, and then sampled. Receipt images were reproduced by inputting them into a binary recording device.

By the way, CCITT group 2 (so-called GO standard) facsimile machines use two-phase AM as a transmission method.
- Although PM-VSB transmission is adopted, the facsimile receiver described above has the following drawbacks when receiving signals by this AM-PM-VSB transmission.

In other words, with conventional facsimile receivers, it is extremely difficult to reproduce the thin white signal within the black signal (this is a white pongee line converted into a signal on the sending side), and the reproduced document image may be partially distorted. The problem was that the image was painted black. The present invention has been made in view of the above drawbacks, and by correcting the thin white signal in the black signal,
Another object of the present invention is to provide an image signal correction device that can obtain excellent reproduced written images.

The present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of main parts of a facsimile receiver to which an embodiment of the image signal correction device of the present invention is applied, and FIG. 2 is a waveform diagram for explaining the operation of FIG. 1. In FIG. 1, 1 is an input terminal for a received image signal, and 2 is an AGC circuit that automatically adjusts the gain of the received image signal. 3 is a synchronous detection circuit, 4 is a low-pass filter, and 5 is an absolute value amplifier, and these 3, 4, and 5 constitute a demodulation circuit.

Therefore, at the output of the absolute value amplifier 5, the baseband signal on the transmitting side is reproduced. A comparator 6 binarizes the reproduced baseband signal a using a predetermined slice level signal a applied to the input terminal 14.

Both 7 and 8 are delay, flip, and flop circuits (hereinafter abbreviated as D-FF circuits).

The D-FF circuit 7 is used for sampling to obtain transmission synchronization. 16 is an input terminal for a clock pulse signal C for sampling.

In the conventional facsimile receiver, the output signal of the D-FF circuit 7 is directly outputted to the recording device through the terminal 19. In FIG. 2, in the recycled baseband bond number A, A indicates thin white line information.

This information A was originally a thin white line image existing in a black image on the transmitting side, but was transmitted by two-phase AM-PM-VSB, and due to its characteristics, the gain was reduced when demodulated. Therefore, in the conventional facsimile receiver, as shown by the signal port in FIG. 2, the comparator 6 determines that the information A is black, and the received image is filled with black. The present invention corrects the thin white line condition A in the reproduced baseband signal A in FIG. 2, for example, and reproduces the thin white line in the black image, which could not be reproduced conventionally. A comparator 9 binarizes the reproduced baseband signal A with a slice level signal b lower than the slice level signal a.

15 is an input terminal for the slice level signal b.

The output signal of this comparator 9 is as shown in FIG. At traffic light 2, if A' corresponds to thin white line information A, then
Adding only this information A' to the signal port for correction may lead to overcorrection. In other words, the correction may actually make the reproduced document image difficult to see or distorted. In consideration of this point, the present embodiment is characterized in that only one bit of the sampling pulse signal C is corrected at the peak portion of the waveform of the thin white line condition signal A. Reference numeral 10 denotes a differentiating circuit, which converts the reproduced baseband signal I into a signal E.

A comparator 11 slices the signal tree at the "0" level to obtain a signal.

12 is a negative differentiator circuit, which outputs one pulse signal at the falling point of the signal.

The output signal of the negative differentiator circuit 12 is one pulse signal at each peak portion of the signal A. Further, 13 is an AND circuit which performs the logical product of signal 2 and signal vol. The output signal H of the AND circuit 13 is one pulse signal outputted with respect to the amplitude peak of the information determined by the comparator 9 to be white. This signal is the PS of the D-FF circuit 7 for sampling.
input to the terminal. Generally, when the clock pulse signal C is input to the CK terminal, the D-FF circuit 7 continuously outputs the state of the signal input to the D terminal until the next clock pulse signal C is input.

However, when a pulse signal is input to the PS terminal while the output signal of the D-FF circuit 7 is at a low level, the D-FF circuit 7
The output signal of the circuit 7 becomes high level. therefore,
In the signal stream, one pulse signal A'' is added to the position corresponding to the thin white line information A. Note that the D-FF circuit 7
When the output terminal RI is at a high level, it is irrelevant even if a pulse signal is input to the terminal. Further, this output signal is input to the D input terminal of the D-FF circuit 8. here,
Since the clock pulse signal C and the output signal Q of the AND circuit 13 are in an asynchronous relationship, the / of the pulse signal A'' is
- The width of the level portion is less than one period of the clock pulse signal C.

This causes inconvenience in the subsequent recording device (not shown). In order to correct this, a D-FF circuit 8 which receives the same clock pulse signal C is provided. This D-FF circuit 8 performs exactly the same operation as the D-FF circuit 7, and the output signal N of the D-FF circuit 8 is obtained by delaying the input signal by one period of the clock pulse signal C. becomes. However, for signal A'' in signal A, the width of its high level portion is the same as one period of clock pulse signal H.
Since the period corresponds to one pixel in the subsequent recording device, no inconvenience occurs. In this way, the thin white line information that is conventionally reproduced as a black image is corrected so that it is reproduced as a white image by one pixel at the peak of its amplitude.

As described above, in the present invention, the first signal binarized at the first slice level is determined to be black, and the second signal binarized at the second slice level lower than the first slice level is determined to be black. In the signal, for the information determined to be white, a new white signal is corrected and added to the first signal at the peak position of the amplitude, so the white line condition information is reproduced in the part that was previously erroneously painted black. The present invention provides an excellent image signal correction device that can significantly improve the quality of recorded images.

[Brief explanation of drawings]

FIG. 1 is a block diagram of main parts of a facsimile receiver to which an embodiment of the image signal correction device of the present invention is applied, and FIG.
FIG. 3 is a signal waveform diagram for explaining the operation shown in the figure. 6, 9... Comparator, 7, 8... D-FF circuit, 10
... Differential circuit, 11 ... Comparator, 12
・・・・・・Ren differential circuit, 13・・・・・・AND circuit. Figure 1 Figure 2

Claims (1)

[Claims] 1. A first comparing means that binarizes the received image signal at a first threshold level; and a second comparing means that binarizes the received image signal at a second threshold level lower than the first threshold level. and,
a synchronizing means for synchronizing the first comparing means with a predetermined clock signal; a peak position detecting means for the received image signal; and an output signal of the second comparing means and an output signal of the peak position detecting means. 1. An image signal correction device, comprising: an AND means, wherein the output of the AND means forces the output of the synchronization means to a white level.