JPS6036031B2 - How to measure semiconductor devices - Google Patents
How to measure semiconductor devicesInfo
- Publication number
- JPS6036031B2 JPS6036031B2 JP2894678A JP2894678A JPS6036031B2 JP S6036031 B2 JPS6036031 B2 JP S6036031B2 JP 2894678 A JP2894678 A JP 2894678A JP 2894678 A JP2894678 A JP 2894678A JP S6036031 B2 JPS6036031 B2 JP S6036031B2
- Authority
- JP
- Japan
- Prior art keywords
- gate
- source
- drain
- measuring
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000000034 method Methods 0.000 claims description 9
- 230000005669 field effect Effects 0.000 claims description 4
- 230000003247 decreasing effect Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 11
- 230000015556 catabolic process Effects 0.000 description 8
- 230000006378 damage Effects 0.000 description 5
- 230000009977 dual effect Effects 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 1
- 230000003631 expected effect Effects 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の測定方法に関し、特にMOS型電
界効果半導体装置の特性測定に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for measuring a semiconductor device, and more particularly to a method for measuring characteristics of a MOS field effect semiconductor device.
近年、MOS型電界効果トランジスタ(以下FETと略
記する)の相互コンダクタンス等を改善する目的で、ゲ
ート絶縁膜厚を数100Aまで薄くする必要があること
から、この絶縁膜圧を測定中の取扱いミス、あるいは静
電気的な破壊から保護するために、またあるいは他の目
的で、ゲート・ソース間にダイオード等の素子を集積す
る割合が多くなった。In recent years, in order to improve the mutual conductance of MOS field effect transistors (hereinafter abbreviated as FET), it is necessary to reduce the thickness of the gate insulating film to several hundred amps. , or to protect against electrostatic damage, or for other purposes, the proportion of devices such as diodes integrated between the gate and source has increased.
しかし、これによってゲート・ソース間が何らかの原因
で破損した場合、破損部が付加素子部にあるのか、ゲー
ト絶縁膜部にあるのかを電気的に調査する場合、特にデ
ュアルゲート構造のFET等では、極めて繁雑な測定が
必要とされるようになった。第1図は従来のデュアルゲ
ートMOSFETの1例の等価回路図である。However, if the gate and source are damaged for some reason, it is necessary to electrically investigate whether the damaged part is in the additional element part or in the gate insulating film part, especially in dual-gate structure FETs. Extremely complex measurements are now required. FIG. 1 is an equivalent circuit diagram of an example of a conventional dual gate MOSFET.
一つのゲートG.,○2とソースSとの間にそれぞれ逆
接続のダイオードD,,D2が2個入っている。One gate G. , ○2 and the source S are provided with two reversely connected diodes D, , D2, respectively.
第2図は第1図のMOSFETのG2−S間の正常なダ
イオードのブレークダウン波形図である。FIG. 2 is a breakdown waveform diagram of a normal diode between G2 and S of the MOSFET shown in FIG.
第3図は第1図のMOSFETのG2−S間の異常なダ
イオードのブレークダウン波形図である。デュアルゲー
トMOSFETに欠陥がなく、正常であるときは第2図
に示した耐圧特性を示すが、もしダイオードのPN接合
に破損を生じるか、あるいはゲート絶縁膜に破損を生ず
るとりーク電流を発生し、第3図に示すような波形にな
る。このリーク電流がダイオードのPN接合の破損によ
るものか、あるいはゲート絶縁膜の絶縁破壊によるもの
かを判断することは非常に難しく、かつ繁雑となるし、
測定の回数をふやすことにより破壊を進行させ、更に他
の部分まで破壊を誘発させる可能性も増す欠点があった
。本発明は上記欠点を除き、シングル,デュアル構造を
問わず、上記ゲート・ソース間が破損しているFETの
破損部が付加素子部にあるのか、ゲート絶縁膜にあるの
かを容易に、しかも正確に判定することのできる半導体
装置の測定方法を提供するものである。FIG. 3 is a breakdown waveform diagram of an abnormal diode between G2 and S of the MOSFET shown in FIG. When the dual gate MOSFET is normal and has no defects, it exhibits the breakdown voltage characteristics shown in Figure 2, but if the diode's PN junction is damaged or the gate insulating film is damaged, leakage current will occur. Then, the waveform becomes as shown in FIG. It is extremely difficult and complicated to determine whether this leakage current is due to damage to the PN junction of the diode or dielectric breakdown of the gate insulating film.
There is a drawback that increasing the number of measurements increases the possibility that the destruction will progress and further induce destruction to other parts. The present invention eliminates the above-mentioned drawbacks and makes it possible to easily and accurately determine whether the damaged part of an FET with damage between the gate and source is in the additional element part or in the gate insulating film, regardless of whether it has a single or dual structure. The purpose of the present invention is to provide a method for measuring a semiconductor device that can be used to determine whether or not a semiconductor device is being used.
本発明の半導体装置の測定方法は、ゲート・ソース間に
ダイオード等の付加素子を集積したh40S型電界効果
半導体装置において、該半導体装置のゲート・ソース間
に抵抗を接続し、ドレィン・ソース間に電圧源と電流計
とを直列に接続し、前記ゲート・ソース間に接続した抵
抗の抵抗値を大きくしたときのドレイン電流と小さくし
たときのドレィン電流を測定比較することにより、付加
素子と絶縁膜のどちらが劣化しているかを検出すること
を特徴とする。The method for measuring a semiconductor device of the present invention is to connect a resistor between the gate and source of the h40S field effect semiconductor device in which an additional element such as a diode is integrated between the gate and source, and to connect the resistor between the drain and source. By connecting a voltage source and an ammeter in series and measuring and comparing the drain current when the resistance value of the resistor connected between the gate and source is increased and when it is decreased, it is possible to detect the additional element and the insulating film. It is characterized by detecting which of the two has deteriorated.
本発明を実施例により説明する。The present invention will be explained by examples.
第4図は本発明に使用する測定回路の等価回路図である
。FIG. 4 is an equivalent circuit diagram of a measuring circuit used in the present invention.
デュアルゲートMOSFETのドレインDとソースSと
の間に電圧源VDと電流計1。A voltage source VD and a current meter 1 are connected between the drain D and source S of the dual gate MOSFET.
とを接続してゲートG,とソースSとの間に電圧を印加
し、ゲートG2とソースS間に抵抗Rを接続し、抵抗R
の値を変えたときにドレィン電流が変化するか杏かによ
り、破損部が付加ダイオード部にあるのか、ゲート絶縁
腰部にあるのかを判定する。ドレィン・ソース間電圧は
、ゲート○2とドレィン部にほぼ等しくなり、ゲートC
2の絶縁膜に電流が流れるような欠陥がある場合、ここ
に電流が流れ、この電流がゲート○2・ソース間の抵抗
の両端に電位差を作り、この抵抗の大小により、ドレィ
ン電流が変化するために上記方法が成立するのである。
第5図は本発明の方法により測定したVo−lo特性図
である。A voltage is applied between the gate G and the source S by connecting the gate G2 and the source S, a resistor R is connected between the gate G2 and the source S, and the resistor R
Depending on whether the drain current changes when the value of is changed, it is determined whether the damaged part is in the additional diode part or in the gate insulating waist part. The drain-source voltage is almost equal to the gate ○2 and the drain part, and the gate C
If there is a defect in the insulating film 2 that allows current to flow, the current will flow there, and this current will create a potential difference across the resistance between the gate ○2 and the source, and the drain current will change depending on the size of this resistance. Therefore, the above method is established.
FIG. 5 is a Vo-lo characteristic diagram measured by the method of the present invention.
第5図において、1′oは抵抗Rを100KQとした場
合、loは抵抗Rを零とした場合のそれぞれのドレィン
電流である。In FIG. 5, 1'o is the drain current when the resistance R is 100KQ, and lo is the drain current when the resistance R is zero.
ゲート絶縁膜が絶縁破壊したときは図のようにloと1
′oとに差を生ずる。もしダイオードが破損した場合に
はこの差を生じない。破損部がゲートG,にある場合は
、ソース端子に直列に比較的大きな抵抗を直列に接続し
たり、あるいは他の素子、FETやダイオード等の直列
に接続し、上述の方法をそのまま用いれば、ドレィン電
流の差を大きくすることができる。When the gate insulating film has dielectric breakdown, lo and 1 as shown in the figure.
′o. If the diode were damaged it would not make this difference. If the damaged part is at the gate G, connect a relatively large resistor in series with the source terminal, or connect another element, FET, diode, etc. in series, and use the above method as is. The difference in drain current can be increased.
この測定方法の、最も効果が期待されるのは、素子製造
中に劣化が発生した場合の原因が容易に明確になり、迅
速な対策が可能になることであるが、その他、不良原因
の外部調査に非常に有効な手段となる。The most expected effect of this measurement method is that when deterioration occurs during device manufacturing, the cause can be easily identified and countermeasures can be taken quickly. It is a very effective means of investigation.
第1図は従釆のデュアルゲートMOSFETの1例の等
価回路図、第2図は第1図のMOSFETのG2一S間
の正常なダイオードのブレークダウン波形図、第3図は
第1図のMOSFETの○2−S間の異常なダイオード
のブレークダウン波形図、第4図は本発明に使用する測
定回路の等価回路図、第5図は本発明の方法により測定
したV。
−1。特性図である。D…ドレイン、G,,G21”ゲ
ート、S…ソース、D,,D2・・・ダイオード、A・
・・電流計、R・・・抵抗、Vo・・・電圧源、Vc,
・・・可変電圧源。
弟順系2図
系3釘
第4図
束5図Figure 1 is an equivalent circuit diagram of an example of a secondary dual gate MOSFET, Figure 2 is a breakdown waveform diagram of a normal diode between G2 and S of the MOSFET in Figure 1, and Figure 3 is a diagram of the breakdown waveform of a normal diode between G2 and S of the MOSFET in Figure 1. A breakdown waveform diagram of an abnormal diode between ○2 and S of a MOSFET, FIG. 4 is an equivalent circuit diagram of a measuring circuit used in the present invention, and FIG. 5 is a V measured by the method of the present invention. -1. It is a characteristic diagram. D...Drain, G,, G21'' gate, S... Source, D,, D2... Diode, A.
...Ammeter, R...Resistance, Vo...Voltage source, Vc,
...Variable voltage source. Younger brother series 2 series 3 nails 4th bundle 5
Claims (1)
した、Mos型電界効果半導体装置において、ゲート・
ソース間に抵抗を接続し、ドレイン・ソース間に電圧源
と電流計を直列に接続して前記ゲート・ソース間に接続
した抵抗の抵抗値を大きくしたときのドレイン電流と抵
抗値を小さくしたときのドレイン電流を、測定比較する
ことにより、付加素子とゲート絶縁膜のどちらが劣化し
ているのかを検出することを特徴とする半導体装置の測
定方法。1 In a Mos-type field effect semiconductor device that integrates additional elements such as diodes between the gate and source,
When a resistor is connected between the sources, a voltage source and an ammeter are connected in series between the drain and the source, and the resistance value of the resistor connected between the gate and the source is increased, and the drain current and resistance value are decreased. 1. A method for measuring a semiconductor device, comprising: detecting which of the additional elements and the gate insulating film is degraded by measuring and comparing the drain currents of the semiconductor devices.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2894678A JPS6036031B2 (en) | 1978-03-13 | 1978-03-13 | How to measure semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2894678A JPS6036031B2 (en) | 1978-03-13 | 1978-03-13 | How to measure semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54121067A JPS54121067A (en) | 1979-09-19 |
| JPS6036031B2 true JPS6036031B2 (en) | 1985-08-17 |
Family
ID=12262564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2894678A Expired JPS6036031B2 (en) | 1978-03-13 | 1978-03-13 | How to measure semiconductor devices |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6036031B2 (en) |
-
1978
- 1978-03-13 JP JP2894678A patent/JPS6036031B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54121067A (en) | 1979-09-19 |
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