JPS6036124B2 - Parallel feedback microwave oscillator - Google Patents
Parallel feedback microwave oscillatorInfo
- Publication number
- JPS6036124B2 JPS6036124B2 JP3500079A JP3500079A JPS6036124B2 JP S6036124 B2 JPS6036124 B2 JP S6036124B2 JP 3500079 A JP3500079 A JP 3500079A JP 3500079 A JP3500079 A JP 3500079A JP S6036124 B2 JPS6036124 B2 JP S6036124B2
- Authority
- JP
- Japan
- Prior art keywords
- distributed constant
- line
- terminal
- dielectric substrate
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/18—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance
- H03B5/1841—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator
- H03B5/1847—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator the active element in the amplifier being a semiconductor device
- H03B5/1852—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance the frequency-determining element being a strip line resonator the active element in the amplifier being a semiconductor device the semiconductor device being a field-effect device
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Description
【発明の詳細な説明】
本発明は、誘電体基板の主面上に第1及び第2の分布定
数線路が形成され、又この第1及び第2の分布定数線路
を形成せる誘電体基板上に、電界効果トランジスタがそ
のゲート端子を第1の分布定数線路に、ドレィン端子(
又はソース端子)を第2の分布定数線路に、ソース端子
(又はドレィン端子)を接地に接続して配され、更にそ
の電界効果トランジスタのドレィン端子(又はソース端
子)及びゲート端子が帰還回路を以つて結合されてなる
構成を有する並列帰還型マイクロ波発振器の改良に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a structure in which first and second distributed constant lines are formed on the main surface of a dielectric substrate, and a dielectric substrate on which the first and second distributed constant lines are formed. , a field effect transistor connects its gate terminal to the first distributed constant line and its drain terminal (
The field effect transistor's drain terminal (or source terminal) and gate terminal are connected to the second distributed constant line, the source terminal (or drain terminal) is connected to the ground, and the drain terminal (or source terminal) and gate terminal of the field effect transistor are connected to the second distributed constant line. The present invention relates to an improvement in a parallel feedback microwave oscillator having a configuration in which the microwave oscillator is coupled in parallel.
従来の斯種並列帰還型マイクロ波発振器は、第1図及び
第2図に示す如く、相対向する第1及び第2の主面1及
び2を有し、その第2の主面2上に接地導体3が形成さ
れてなるその誘電体基板4の主面1上にマイクロストリ
ップ線路による分布定数線路5及び6が形成され、又誘
電体基板4の主面1上に、ゲート端子G、ドレィン端子
D及びソース端子Sを有する電界効果トランジスタTが
、そのゲート端子Gを線7を用いて分布定数線路5の一
端5aに、ドレイン端子Dを線8を用いて分布定数線路
6の一端6aに、ソース端子Sをそれが一端が連結せる
リード線9、そのリード線9の他端が接続されてなる誘
電体基板1の主面2上に予め形成された導体10、及び
一端がその導体10に連結されて誘電体基板4の厚さを
横切って延長し他端が接地導体3に連結されてなる短絡
用導体11を介して接地導体3に接続して配され、更に
電界効果トランジスタTのドレィン端子○及びゲート端
子Gが、誘電体基板4の主面1上に分布定数線路5の一
端5aより延長せる態様を以つて形成されたマイクロス
トリップ線路による分布定数線路12、誘電体基板4の
主面1上に分布定数線路6の一端6aより延長せる態様
を以つて形成されたマイクロストリップ線路による分布
定数線路13、及び相対向する面上に電極14a及び1
4bを有し、その電極14aが分布定数線路12の遊端
12aに電気機械的に連結され、電極14bが線15を
介して分布定数線路13の遊端13aに接続されてなる
態様を以つて誘電体基板4上に配された直流阻止兼帰還
用容量素子16を以つて構成されてなる帰還回路17を
以つて結合され、而して詳細説明はこれを省略するも第
1図及び第2図との対応部分に同一符号が附されている
第3図に示す如き等価回路で表わされるという構成を有
するを普通とする。A conventional parallel feedback microwave oscillator of this type has first and second main surfaces 1 and 2 facing each other, as shown in FIGS. On the main surface 1 of the dielectric substrate 4 on which the ground conductor 3 is formed, distributed constant lines 5 and 6 are formed by microstrip lines, and on the main surface 1 of the dielectric substrate 4, gate terminals G and drain terminals are formed. A field effect transistor T having a terminal D and a source terminal S has its gate terminal G connected to one end 5a of the distributed constant line 5 using a line 7, and the drain terminal D connected to one end 6a of the distributed constant line 6 using a line 8. , a lead wire 9 connecting the source terminals S at one end, a conductor 10 formed in advance on the main surface 2 of the dielectric substrate 1 to which the other end of the lead wire 9 is connected, and a conductor 10 at one end. The field effect transistor T is connected to the ground conductor 3 via a shorting conductor 11 which extends across the thickness of the dielectric substrate 4 and whose other end is connected to the ground conductor 3. The distributed constant line 12 is a microstrip line formed in such a manner that the drain terminal ○ and the gate terminal G can extend from one end 5a of the distributed constant line 5 on the main surface 1 of the dielectric substrate 4, and the distributed constant line 12 of the dielectric substrate 4. A distributed constant line 13 formed by a microstrip line is formed on the main surface 1 so as to extend from one end 6a of the distributed constant line 6, and electrodes 14a and 1 are formed on the opposing surfaces.
4b, its electrode 14a is electromechanically connected to the free end 12a of the distributed constant line 12, and the electrode 14b is connected to the free end 13a of the distributed constant line 13 via the wire 15. They are coupled through a feedback circuit 17 composed of a DC blocking/feedback capacitive element 16 disposed on a dielectric substrate 4, and a detailed explanation thereof is omitted, but as shown in FIGS. 1 and 2. It is generally assumed that the configuration is represented by an equivalent circuit as shown in FIG. 3, in which the same reference numerals are given to corresponding parts.
所で斯る並列帰還型マイクロ波発振器の構成によれば、
電界効果トランジスタTのドレィン端子○及びゲート端
子Gが帰還回路17を以つて結合されているので、その
帰還回路17の帰還定数(分布定数線路12及び13の
特性インピーダンス、直流阻止兼帰還用容量素子16の
容量等によって決まる)、分布定数線路5及び6の特性
インピーダンス等を予め適当に選定し置けば、分布定数
線路5及び6の夫々と接地導体3との間に図示せざるも
所要の直流バイアス用電源を接続することにより、マイ
クロ波発振器が得られ、而してその発振出力を分布定数
線路6及び接地導体3間より外部に導出し得るものであ
るが、電界効果トランジスタTのドレイン端子○及びゲ
ート端子Gを結合せる帰還回路17が、分布定数線路5
及び6に夫々連結せる分布定数線路12及び13と之等
分布定数線路12及び13間に線15を介して接続せる
直流阻止兼帰還用容量素子16とを以つて構成されてい
るという複雑な構成を有し、この為安定なマイク。According to the configuration of such a parallel feedback microwave oscillator,
Since the drain terminal ○ and gate terminal G of the field effect transistor T are coupled through the feedback circuit 17, the feedback constant of the feedback circuit 17 (the characteristic impedance of the distributed constant lines 12 and 13, the capacitive element for DC blocking and feedback) 16), and by appropriately selecting the characteristic impedance of the distributed constant lines 5 and 6 in advance, the required direct current (not shown) can be generated between each of the distributed constant lines 5 and 6 and the ground conductor 3. By connecting a bias power supply, a microwave oscillator is obtained, and its oscillation output can be led out between the distributed constant line 6 and the ground conductor 3. However, the drain terminal of the field effect transistor T A feedback circuit 17 that connects ○ and the gate terminal G is connected to the distributed constant line 5.
and 6, and a DC blocking/feedback capacitive element 16 connected between the equally distributed constant lines 12 and 13 via a line 15. This makes it a stable microphone.
波発振が得られないと共に特に帰還回路17を構成せる
直流阻止兼帰還用容量素子16の為に全体の構成が大型
になる等の欠点を有していた。依って本発明は上述せる
欠点を有効に回避し得る新規な並列帰還型マイクロ波発
振器を提案せんとするもので、以下詳述する所より明ら
かとなるであろう。In addition to not being able to obtain wave oscillations, this method has drawbacks such as the overall structure becoming large due to the direct current blocking/feedback capacitive element 16 that constitutes the feedback circuit 17. Therefore, the present invention aims to propose a novel parallel feedback type microwave oscillator which can effectively avoid the above-mentioned drawbacks, which will become clear from the detailed description below.
第4図及び第5図は本発明による並列帰還型マイクロ波
発振器の一例を示し、第1図及び第2図との対応部分に
は同一符号を附して詳細説明はこれを省略するも、第1
図及び第2図にて上述せる構成に於てその帰還回路16
が分布定数線路5及び6は夫々連結せる分布定数線路1
2及び13とそれ等分布定数線路12及び13間に線1
5を介して接続せる直流阻止兼帰還用容量素子16とを
以つて構成されているに代え、誘電体基板4の主面2上
に構成された接地導体3に主面2側よりみて分布定数線
路5及び6と交叉する大いさを以つて形成された環状ス
ロット線路による分布定数線路21を以つて、第4図及
び第5図との対応部分に同一符号が附されて示されてい
る第6図に示す如き、電界効果トランジスタTのドレィ
ン端子D及びゲート端子Gのインダクタンス22及びコ
ンデンサ23の直列回路を以つて電界効果トランジスタ
Tのドレィン端子D及びゲート端子G側のトランス24
及び25を介して結合せしめてなる等価回路で表わされ
るべく構成されていることを除いては第1図及び第2図
にて上述せると同様の構成を有する。4 and 5 show an example of a parallel feedback microwave oscillator according to the present invention, and corresponding parts to those in FIGS. 1 and 2 are given the same reference numerals, and detailed explanation thereof will be omitted. 1st
The feedback circuit 16 in the configuration described above in FIGS.
The distributed constant lines 5 and 6 are respectively connected to the distributed constant line 1.
2 and 13 and the line 1 between the equally distributed constant lines 12 and 13
A ground conductor 3 formed on the main surface 2 of the dielectric substrate 4 has a distributed constant when viewed from the main surface 2 side. A sixth line, in which corresponding parts to those in FIGS. 4 and 5 are denoted by the same reference numerals, has a distributed constant line 21 which is a circular slot line formed with a size that intersects the lines 5 and 6. As shown in the figure, a transformer 24 on the side of the drain terminal D and gate terminal G of the field effect transistor T is connected by a series circuit of an inductance 22 and a capacitor 23 on the drain terminal D and gate terminal G of the field effect transistor T.
It has the same structure as that described above in FIGS. 1 and 2, except that it is configured to be represented by an equivalent circuit formed by coupling through 25 and 25.
以上が本発明による並列帰還型マイクロ波発振器の一例
構成であるが、斯る構成によれば、第1図及び第2図に
て上述せる従来の並列帰還型マイクロ波発振器の場合と
同様に電界効果トランジスタTのドレィン端子D及びゲ
ート端子Gが帰還回路17を以つて結合されているので
、その帰還回路17の帰還定数(分布定数回路21の特
性インピーダンス、長さ等によって決められる)、分布
定数線路5及び6の特性インピーダンス等を第1図及び
第2図の場合と同様に予め適当に設定し置仇ま、第1図
及び第2図の場合と同様に分布定数線路5及び6の夫々
と接地導体3との間に図示せざるも所要の直流バイアス
用電源を接続することにより、第1図及び第2図の場合
と同様にマイクロ発振が得られ、而してその発振出力を
分布定数線路6及び接地導体3間より導出し得ること明
らかである。The above is an example of the configuration of the parallel feedback type microwave oscillator according to the present invention. According to such a configuration, the electric field is Since the drain terminal D and gate terminal G of the effect transistor T are coupled through the feedback circuit 17, the feedback constant (determined by the characteristic impedance, length, etc. of the distributed constant circuit 21) of the feedback circuit 17, the distributed constant The characteristic impedances, etc. of the lines 5 and 6 are set appropriately in advance as in the case of FIGS. By connecting a necessary DC bias power supply (not shown) between the ground conductor 3 and the ground conductor 3, micro oscillation can be obtained as in the case of Figs. 1 and 2, and the oscillation output can be distributed. It is clear that it can be derived from between the constant line 6 and the ground conductor 3.
然し乍ら上述せる本発明の実施例によれば、電界効果ト
ランジスタTのドレィン端子○及びゲート端子Gを結合
せる帰還回路17が、誘電体基板4の主面2上の接地導
体3に形成された環状スロット線路による分布定数線路
21のみを以つて構成されているという簡易な構成を有
し、この為安定なマイクロ波発振が得られると共に、帰
還回路17が第1図及び第2図にて上述せる従来の場合
の如くに全体の構成を大型化する直流阻止兼帰還用容量
素子を含んで構成されていないので、全体の構成を小型
化し得る等の大なる特徴を有するものである。However, according to the embodiment of the present invention described above, the feedback circuit 17 for coupling the drain terminal ○ and the gate terminal G of the field effect transistor T is formed in the annular shape formed on the ground conductor 3 on the main surface 2 of the dielectric substrate 4. It has a simple configuration consisting of only the distributed constant line 21 formed by a slot line, so that stable microwave oscillation can be obtained, and the feedback circuit 17 is as described above in FIGS. 1 and 2. Since it does not include a direct current blocking/feedback capacitive element that increases the size of the entire configuration as in the conventional case, it has great features such as the ability to downsize the entire configuration.
尚上述に於ては電界効果トランジスタTのゲ−ト端子G
の接続されている分布定数線路5が終端開放型でなる場
合につき述べたが、第4図及び第5図との対応部分に同
一符号の附されて示されている第7図及び第8図に示す
如く、第4図及び第5図にて上述せる構成に於てその分
布定数線路5が誘電体基板4の厚さを横切って延長せる
短絡導体31にて終端短絡せる終端短絡型であるという
ことを除いては第4図及び第5図の場合と同様の構成と
して第4図及び第5図にて上述せると同様の作用効果を
得る様になすことも出来ること明らかであろう。In the above description, the gate terminal G of the field effect transistor T
7 and 8, in which corresponding parts to those in FIGS. 4 and 5 are designated with the same reference numerals, have been described above. As shown in FIG. 4 and FIG. 5, in the configuration described above, the distributed constant line 5 is of a terminal short-circuit type in which the distributed constant line 5 is terminated and short-circuited by a short-circuit conductor 31 that can be extended across the thickness of the dielectric substrate 4. It will be obvious that, except for this, it is possible to obtain the same effects as those described above with reference to FIGS. 4 and 5 using the same configuration as that shown in FIGS. 4 and 5.
又上述に於ては電界効果トランジスタTがそのゲート端
子G、ドレイン端子D及びソース端子Sをしてそれ等に
共通な面上に配されてなる構成を有し、而してその電界
効果トランジスタTがそのゲート端子G、ドレイン端子
D及びソース端子Sを配している面と対向せる面をして
誘電体基板4上に配した関係を以つて誘電体基板4上に
配されている場合につき述べたが、第4図及び第5図と
の対応部分に同一符号の附されて示されている第9図及
び第10図に示す如く、第4図及び第5図にて上述せる
構成に於て電界効果トランジスタTがそのゲート端子G
及びドレィン端子Dをしてそれ等に共通の面上に配され
、ソース端子Sをしてゲート端子G及びドレィソ端子D
の配されてなる面と対向せる面上に配してなる構成を有
し、一方誘電体基板4に穴32が穿設され、而してその
穴32内に電界効果トランジスタTがそのゲート端子G
及びドレィン端子Dを夫々線7及び8を用いて分布定数
線路5及び6に接続し、ソース端子Sをして接地導体3
に連結して誘電体基板4に配されてなることを除いては
第4図及び第5図の場合と同様の構成として第4図及び
第5図にて上述せると同様の作用効果を得る様になすこ
とも出来ること明らかであろう。Further, in the above description, the field effect transistor T has a structure in which its gate terminal G, drain terminal D, and source terminal S are arranged on a plane common to them, and thus the field effect transistor When T is arranged on the dielectric substrate 4 in such a manner that the surface facing the surface on which the gate terminal G, drain terminal D and source terminal S are arranged is arranged on the dielectric substrate 4. However, as shown in FIGS. 9 and 10, in which parts corresponding to those in FIGS. 4 and 5 are denoted by the same reference numerals, the configuration described above in FIGS. , the field effect transistor T has its gate terminal G
and a drain terminal D are disposed on a surface common to them, a source terminal S is arranged on a gate terminal G, and a drain terminal D is disposed on a common plane.
On the other hand, a hole 32 is formed in the dielectric substrate 4, and a field effect transistor T is placed in the hole 32 with its gate terminal connected to the dielectric substrate 4. G
and the drain terminal D are connected to the distributed constant lines 5 and 6 using wires 7 and 8, respectively, and the source terminal S is connected to the ground conductor 3.
4 and 5 except that it is connected to the dielectric substrate 4 and arranged on the dielectric substrate 4, and the same operation and effect can be obtained as described above in FIGS. It is obvious that you can do something similar.
更に上述に於ては電界効果トランジスタの1つを以つて
、又電界効果トランジスタのゲート端子及びドレィン端
子の接続される分布定数線路がマイクロストリップ線路
による分布定数線路でなる構成を以つて、更に帰還回路
を構成せる分布定数線路がスロット線路でなる構成を以
つて構成されている場合につき述べたが、第11図及び
第12図に示す如く、謙雷体基板41の主面42上に、
ストリップ線路43とその両側にスロット44及び45
を介して配された導体46及び47とを以つて構成せる
結合スロット線路による分布定数線略48及び49と、
ストリップ線路43と連接して延長せるストリップ線路
53とその両側にスロット54及び55を介して配され
た導体56及び57とを以つて構成せる結合スロット線
路による分布定数線路58及び59とが連接して形成さ
れ、又誘電体基板41の王面42上に、夫々ゲート端子
G、ドレィン端子D及びソース端子Sを有する電界効果
トランジスタTI及びT2が、それ等のゲート端子Gを
夫々線66及び67を用いて導体46及び47に、ドレ
ィン端子Dを夫々線76及び77を用いて導体56及び
57に、ソース端子Sを夫々線63及び73を用いてス
トリップ線路43及び53に接続して、ストリップ線路
43及び53の連接位置上に於て配され、更に電界効果
トランジスタTI及びT2のドレィン端子D及びゲート
端子Gが、誘電体基板41の主面42と対向せる他の主
面82上にその主面82側よりみて分布定数線路48及
び49を横切って導体46の導体56と対向せる側面位
置及び導体47の導体57と対向せる側面位置間に延長
せる態様を以つて形成されたストリップ線路部91と、
同様に主面82上にその主面82側よりみて分布定数線
路58及び59を横切って導体56の導体46と対向せ
る側面位置及び導体57の導体47と対向せる側面位置
間に延長せる態様を以つて形成されたストリップ線路部
92と、一方の電極93aが線94を用いて導体46上
にその上述せるストリップ線路部91の一方の遊端に対
応する位置に於て接続され、他方の電極93bが導体5
6にその上述せるストリップ線路部92の一方の遊端に
対応する位置に於て連結されてなる結合用容量素子95
と、一方の電極96aが線97を用いて導体47にその
上述せるストリップ線路部91の他方の遊端に対応する
位置に於て接続され、他方の電極96bが導体57にそ
の上述せるストリップ線路部92の他方の遊機に対応す
る位置に於て連結されてなる結合用容量素子98とを以
つて構成されたりング共振器構成の分布定数線路99を
以つて構成された帰還回路100を以つて結合され、而
して第11図及び第12図との対応部分に同一符号が附
されて示されている第13図に示す如き第6図にて上述
せる等価回路に準じた等価回路で表わされるという構成
を有し、依って電界効果トランジスタの2つTI及びT
2を以つて、又電界効果トランジスタTI及びT2のゲ
ート端子G:及びドレィン端子○の接続される分布定数
線路48及び49;及び58及び59が結合スロット線
路による分布定数線路でなる構成を以つて、更に帰還回
路100を構成せる分布定数線路99がリング共振器構
成を以つて構成されてなるという構成として、第4図及
び第5図にて上述せると同様の作用効果を得る様になす
ことも出来るものである。Furthermore, in the above, one of the field effect transistors is used, and the distributed constant line to which the gate terminal and drain terminal of the field effect transistor are connected is a distributed constant line formed of a microstrip line, and further feedback is generated. Although we have described the case where the distributed constant lines constituting the circuit are configured with slot lines, as shown in FIGS.
Strip line 43 and slots 44 and 45 on both sides
Distributed constant lines 48 and 49 formed by a coupled slot line constituted by conductors 46 and 47 arranged through the
Distributed constant lines 58 and 59 are connected to each other by coupled slot lines, which are constituted by a strip line 53 that can be extended in connection with the strip line 43, and conductors 56 and 57 arranged on both sides of the strip line 53 through slots 54 and 55. Field effect transistors TI and T2 are formed on the crown surface 42 of the dielectric substrate 41 and have a gate terminal G, a drain terminal D, and a source terminal S, respectively. Connect the drain terminal D to the conductors 56 and 57 using wires 76 and 77, respectively, and the source terminal S to the strip lines 43 and 53 using wires 63 and 73, respectively. The drain terminals D and gate terminals G of the field effect transistors TI and T2 are arranged on the other main surface 82 opposite to the main surface 42 of the dielectric substrate 41. A strip line section formed in such a manner that it extends across the distributed constant lines 48 and 49 when viewed from the main surface 82 side, between the side position of the conductor 46 facing the conductor 56 and the side position of the conductor 47 facing the conductor 57. 91 and
Similarly, on the main surface 82, when viewed from the main surface 82 side, there is a mode in which the conductor 56 is extended across the distributed constant lines 58 and 59 between the side position of the conductor 56 facing the conductor 46 and the side position of the conductor 57 facing the conductor 47. The strip line section 92 thus formed and one electrode 93a are connected on the conductor 46 using a wire 94 at a position corresponding to one free end of the strip line section 91 described above, and the other electrode 93b is conductor 5
6, a coupling capacitive element 95 connected at a position corresponding to one free end of the strip line section 92 mentioned above.
One electrode 96a is connected to the conductor 47 using a wire 97 at a position corresponding to the other free end of the above-mentioned strip line section 91, and the other electrode 96b is connected to the conductor 57 at a position corresponding to the other free end of the above-mentioned strip line section 91. A feedback circuit 100 is configured with a distributed constant line 99 having a ring resonator configuration and a coupling capacitance element 98 connected at a position corresponding to the other idler of the section 92. The circuits are combined and are represented by an equivalent circuit similar to the equivalent circuit described above in FIG. 6 as shown in FIG. 13, in which the corresponding parts in FIGS. Therefore, two field effect transistors TI and T
2, and the distributed constant lines 48 and 49 to which the gate terminal G and drain terminal ○ of the field effect transistors TI and T2 are connected; Furthermore, the distributed constant line 99 constituting the feedback circuit 100 is configured to have a ring resonator configuration, so that the same effects as described above in FIGS. 4 and 5 can be obtained. It is also possible.
尚本例の場合導体43と導体46及び47の夫々との間
、及び導体53と導体56及び57の夫々との間に直流
バイアス用電源を接続することにより、導体53と導体
46又は47との間よりマイクロ波発振出力を得ること
が出来るものである。又第14図に示す如く第11図及
び第12図にて上述せる構成に於て、その分布定数線路
48及び49を構成せるストリップ線路43の遊端を短
絡導体101及び102を以つて導体46及び47に連
結して分布定数線路48及び49を終端短絡型に構成し
、これにより第11図及び第12図にて上述せる実施例
の場合と同様の作用効果を得る様になすことも出来もの
である。In this example, by connecting a DC bias power source between the conductor 43 and each of the conductors 46 and 47, and between the conductor 53 and each of the conductors 56 and 57, the conductor 53 and the conductor 46 or 47 are connected. It is possible to obtain microwave oscillation output from between. Further, as shown in FIG. 14, in the configuration described above in FIGS. 11 and 12, the free ends of the strip line 43 constituting the distributed constant lines 48 and 49 are connected to the conductor 46 by short-circuiting conductors 101 and 102. It is also possible to connect the distributed constant lines 48 and 47 to terminals 47 and 47 to configure the distributed constant lines 48 and 49 to have short-terminated terminals, thereby obtaining the same effect as in the embodiment described above in FIGS. 11 and 12. It is something.
更に第15図及び第16図に示す如く、第11図及び第
12図にて上述せる構成に於て、その電界効果トランジ
スタTI及びT2が、それ等のゲート端子G及びドレィ
ン端子Dを各別にそれ等に共通の面上に、ソース端子S
とそれ等に共通の端子としてゲート端子G及びドレイン
端子Dを配してなる面と対向せる他の面上に配してなる
態様を以つて一体化され、而してその電界効果トランジ
スタTI及びT2のソース端子S(共通端子としての)
が誘電体基板41の主面42上に形成せるストリップ線
路43及び53の連接位置に連結されてなることを除い
ては第11図及び第12図と同機の構成とし、これによ
って第11図及び第12図にて上述せる実施例の場合と
同様の作用効果を得る様になすことも出来るものである
。Furthermore, as shown in FIGS. 15 and 16, in the configuration described above in FIGS. 11 and 12, the field effect transistors TI and T2 have their gate terminals G and drain terminals D separately connected to each other. On the surface common to them, source terminal S
and the field effect transistors TI and TI are integrated in such a manner that the gate terminal G and the drain terminal D are arranged as common terminals on another surface opposite to the surface on which the gate terminal G and the drain terminal D are arranged, and the field effect transistors TI and Source terminal S of T2 (as a common terminal)
11 and 12 except that the strip lines 43 and 53 are connected to the connection position of the strip lines 43 and 53 formed on the main surface 42 of the dielectric substrate 41. It is also possible to obtain the same effect as that of the embodiment described above with reference to FIG.
又上述せる本発明の各実施例に於てその「ソ−ス端子」
を「ドレイン端子」、「ドレイン端子」を「ソース端子
」と講替えた構成とすることも出釆、その他本発明の精
神を脱することないこ種々の変型変更をなし得るであろ
う。In each embodiment of the present invention described above, the "source terminal"
It is also possible to replace the "drain terminal" with "drain terminal" and the "drain terminal" with "source terminal," and various other modifications and changes may be made without departing from the spirit of the present invention.
第1図は従来の並列帰還型マイクロ波発振器を示す略線
的平面図、第2図はそのD−0線上の断面図、第3図は
その等価回路図、第4図は本発明による並列帰還型マイ
クロ波発振器の一例を示す略線的平面図、第5図はその
V−V線上の断面図、第6図はその等価回路図、第7図
は本発明の他の例を示す略線的平面図、第8図はその畑
一肌線上の断面図、第9図は本発明の更に他の例を示す
略線的平面図、第10図はそのX−X線上の断面図、第
11図は本発明の尚更に他の例を示す略線的平面図、第
12図はその刈−刈線上の断面図、第13図はその等価
回路図、第14図は本発明の更に他の例を示す略線的平
面図、第15図は本発明の尚更に他の例を示す略線的平
面図、第16図はXW−XW線上の断面図である。
図中1及び2は主南、3は接地導体、4は誘電体基板、
T,TI及びT2は電界効果トランジスタ、5,6,2
1,48,49,58,59及び99は分布定数線路、
11,31,101及び102は短絡導体、17及び1
00は帰還回路を示す。
第2図
第1図
第3図
第4図
第5図
第6図
第7図
第8図
第9図
第10図
第11図
第12図
第13図
第14図
第15図
第16図Fig. 1 is a schematic plan view showing a conventional parallel feedback type microwave oscillator, Fig. 2 is a sectional view taken along line D-0, Fig. 3 is its equivalent circuit diagram, and Fig. 4 is a parallel parallel feedback oscillator according to the present invention. FIG. 5 is a schematic plan view showing an example of a feedback microwave oscillator, FIG. 5 is a sectional view taken along line V-V, FIG. 6 is an equivalent circuit diagram thereof, and FIG. 7 is a schematic diagram showing another example of the present invention. A linear plan view, FIG. 8 is a sectional view taken along the field line, FIG. 9 is a schematic plan view showing still another example of the present invention, and FIG. 10 is a sectional view taken along the line X-X. FIG. 11 is a schematic plan view showing still another example of the present invention, FIG. 12 is a sectional view on the cutting line, FIG. 13 is an equivalent circuit diagram thereof, and FIG. 14 is a further example of the present invention. FIG. 15 is a schematic plan view showing still another example of the present invention, and FIG. 16 is a cross-sectional view taken along the line XW-XW. In the figure, 1 and 2 are the main south, 3 is the ground conductor, 4 is the dielectric substrate,
T, TI and T2 are field effect transistors, 5, 6, 2
1, 48, 49, 58, 59 and 99 are distributed constant lines,
11, 31, 101 and 102 are short circuit conductors, 17 and 1
00 indicates a feedback circuit. Figure 2 Figure 1 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 Figure 13 Figure 14 Figure 15 Figure 16
Claims (1)
が形成され、上記誘電体基板上に電界効果トランジスタ
がそのゲート端子を上記第1の分布定数線路に、ドレイ
ン端子(又はソース端子)を上記第2の分布定数線路に
、ソース端子(又はドレイン端子)を接地に接続して配
され、上記電界トランジスタのドレイン端子(又はソー
ス端子)及びゲート端子が帰還回路を以つて結合されて
なる構成を有する並列帰還型マイクロ波発振器に於て、
上記帰還回路が上記誘電体基板の上記主面と対向する他
の主面上に上記第1及び第2の分布定数線路と結合すべ
く形成された第3の分布定数線路を以つて構成されてな
る事を特徴とする並列帰還型マイクロ波発振器。1. First and second distributed constant lines are formed on the main surface of a dielectric substrate, and a field effect transistor on the dielectric substrate has its gate terminal connected to the first distributed constant line, and its drain terminal (or source terminal) is connected to the second distributed constant line, and the source terminal (or drain terminal) is connected to ground, and the drain terminal (or source terminal) and gate terminal of the field transistor are coupled through a feedback circuit. In a parallel feedback microwave oscillator with a configuration of
The feedback circuit includes a third distributed constant line formed on another main surface of the dielectric substrate opposite to the main surface to be coupled to the first and second distributed constant lines. A parallel feedback microwave oscillator characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3500079A JPS6036124B2 (en) | 1979-03-25 | 1979-03-25 | Parallel feedback microwave oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3500079A JPS6036124B2 (en) | 1979-03-25 | 1979-03-25 | Parallel feedback microwave oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55127705A JPS55127705A (en) | 1980-10-02 |
| JPS6036124B2 true JPS6036124B2 (en) | 1985-08-19 |
Family
ID=12429844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3500079A Expired JPS6036124B2 (en) | 1979-03-25 | 1979-03-25 | Parallel feedback microwave oscillator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6036124B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1137600B (en) * | 1981-07-08 | 1986-09-10 | Cise Spa | DIELECTRIC CAVITY PLANAR OSCILLATOR OPERATING AT MICROWAVE FREQUENCY |
| JPH0654845B2 (en) * | 1983-04-04 | 1994-07-20 | 株式会社東芝 | Microwave oscillator |
| JP2004007349A (en) | 2002-03-29 | 2004-01-08 | Murata Mfg Co Ltd | High frequency circuit device using slot line and communication device equipped with the same |
-
1979
- 1979-03-25 JP JP3500079A patent/JPS6036124B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55127705A (en) | 1980-10-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0794974A (en) | Highly efficient amplifier circuit | |
| JPH0365016B2 (en) | ||
| US5233313A (en) | High power field effect transistor amplifier | |
| JPH0345563B2 (en) | ||
| JPS6349402B2 (en) | ||
| JP3045074B2 (en) | Dielectric line, voltage controlled oscillator, mixer and circuit module | |
| JPS6036124B2 (en) | Parallel feedback microwave oscillator | |
| JPH0191502A (en) | Dielectric resonator | |
| JPH03218102A (en) | interdigital filter | |
| JPS58137314A (en) | Microwave power amplifier | |
| US3715677A (en) | Amplifiers of hybrid integrated subminiaturised circuit design | |
| JP2008112810A (en) | Circuit board, semiconductor element storage package, and semiconductor device | |
| JPS60248004A (en) | resonator | |
| JPH0260204A (en) | microwave integrated circuit | |
| JPS58116808A (en) | high frequency power amplifier | |
| JPS6031103B2 (en) | High power transistor device for high frequency | |
| JPH0311923Y2 (en) | ||
| JP2001185919A (en) | Microwave circuit | |
| JPS6120401A (en) | Micro strip line | |
| JPS6032749Y2 (en) | Chip type capacitive element | |
| JPS60106205A (en) | Monolithic fet oscillator | |
| JPS5940702A (en) | Converter of waveguide-strip line | |
| JPS63274202A (en) | Field effect transistor | |
| JPH06112706A (en) | Impedance conversion circuit | |
| JPS6276658A (en) | Microwave semiconductor device |