JPS6037646B2 - Feedback amplifier circuit with FET switch circuit - Google Patents
Feedback amplifier circuit with FET switch circuitInfo
- Publication number
- JPS6037646B2 JPS6037646B2 JP8727677A JP8727677A JPS6037646B2 JP S6037646 B2 JPS6037646 B2 JP S6037646B2 JP 8727677 A JP8727677 A JP 8727677A JP 8727677 A JP8727677 A JP 8727677A JP S6037646 B2 JPS6037646 B2 JP S6037646B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- fet
- feedback
- amplifier
- feedback amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/303—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters using a switching device
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】
本発明は、特にテープレコーダのィコラィザー回路等の
特性切換に用いて好適するFETスイッチ回路を備えた
帰還増幅回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a feedback amplifier circuit equipped with an FET switch circuit which is particularly suitable for use in changing the characteristics of an equalizer circuit of a tape recorder or the like.
一般に、テープレコーダはノーマルテープ及びクローム
テープ等の使用する磁気テープの種類に応じて再生ィコ
ラィザー特性を切換える必要がある。Generally, it is necessary for a tape recorder to switch the playback equalizer characteristics depending on the type of magnetic tape used, such as normal tape or chrome tape.
そしてこの切換えは従来スライドスイッチ等のメカニカ
ルスイッチによって成されているが、近来FET(電界
効果トランジスタ)をスイッチング素子とした電子スイ
ッチが用いられるようになつた。This switching has conventionally been accomplished by mechanical switches such as slide switches, but recently electronic switches using FETs (field effect transistors) as switching elements have come into use.
この電子スイッチはメカニカルスイッチに比して接触不
良及びチャッタリングを防止し得ると共に信号路の配線
が最短で済み、誘導雑音等のトラブルも生せず又回路数
も少なくてコスト的にも安価にできる効果を奏するもの
である。Compared to mechanical switches, this electronic switch can prevent poor contact and chattering, requires the shortest signal path wiring, does not cause problems such as induced noise, and has fewer circuits, making it cheaper in terms of cost. It is effective.
このことからFETをスイッチング素子としたFETス
イッチ回路がテープレコーダのイコライザー回路等の帰
還増幅回路の侍性切換に用いられるようになつた。For this reason, FET switch circuits using FETs as switching elements have come to be used for switching the characteristics of feedback amplifier circuits such as tape recorder equalizer circuits.
即ち、この種従来のFETスイッチ回路を備えたィコラ
ィザ−回路は、第1図に示すようにテープレコーダの再
生系路(図示せず)に入出力端1,2が介挿接続される
帰還増幅器3が設けられており、そして帰還増幅器3の
出力端2と反転入力端1′間に、該増幅器3の利得或い
は周波数特性を変化させる複数の抵抗素子R及び容量素
子Cからなる帰還回路4が介挿接続されている。That is, as shown in FIG. 1, an equalizer circuit equipped with a conventional FET switch circuit of this type is a feedback amplifier in which input and output terminals 1 and 2 are interposed and connected to a playback path (not shown) of a tape recorder. 3, and a feedback circuit 4 consisting of a plurality of resistive elements R and capacitive elements C for changing the gain or frequency characteristics of the amplifier 3 is provided between the output terminal 2 and the inverting input terminal 1' of the feedback amplifier 3. Interposed connection.
そして前記帰還回路4は、その中の1つの抵抗素子Rに
並列にドレィン電極Dが前記帰還増幅器3の出力端2側
に、ソース電極Sが反転入力端1′側に接続されると共
にゲート電極Gがノーマル及びクロームテープに対応し
たィコラィザ−特性を切換える切換スイッチSWの可動
端子aに接続されたスイッチング用電界効果トランジス
タFETを備えている。そして前記切換スイッチSWの
第1固定端子bは接地されると共に第2固定端子cは負
バイアス電源−Vに接続されている。このように帰還回
路4に切換スイッチSWによってスイッチング制御され
るFETを備えたFETスイッチ回路5が設けられてい
る。尚、前記切換スイッチSWはその可動端子aを第1
固定端子b側に切換えた時は、前記FETをONさせて
テープレコーダのィコラィザ−特性をノ−マルテープ特
性に、また第2固定端子c側に切換えた時は前言苗ET
をOFF制御してテープレコーダのィコラィザー特性を
クロームテーブ特性になるように設定する。The feedback circuit 4 has a drain electrode D connected to the output terminal 2 side of the feedback amplifier 3, a source electrode S connected to the inverting input terminal 1' side, and a gate electrode connected in parallel to one resistive element R therein. G is provided with a switching field effect transistor FET connected to a movable terminal a of a changeover switch SW for switching between equalizer characteristics corresponding to normal and chrome tapes. The first fixed terminal b of the changeover switch SW is grounded, and the second fixed terminal c is connected to the negative bias power supply -V. In this way, the feedback circuit 4 is provided with the FET switch circuit 5 including the FET whose switching is controlled by the changeover switch SW. Note that the changeover switch SW sets its movable terminal a to the first
When switching to the fixed terminal b side, the FET is turned on and the equalizer characteristics of the tape recorder become normal tape characteristics, and when switching to the second fixed terminal c side, the equalizer characteristics of the tape recorder are set to the normal tape characteristics.
is turned off to set the equalizer characteristics of the tape recorder to the chrome tape characteristics.
而して、斯るFETスイッチ回路を備えた従釆のィコラ
ィザ−回路に於いて、帰還回路4の帰還作用によってィ
コラィザー特性を得るもFETのスイッチングによるO
N、OFF制御によってノーマルテープ特性及びクロー
ムテープ特性に応じたィコラィザ‐特性を得るように成
されるが、上記した従来のィコラィザー回路は帰還増幅
器3の入力端子1にeiなる入力信号が印加された場合
、FETのソース電極Sに同様にしてeiなる電圧が生
じ、これが結果的に前記FETのゲート電極Gとソース
電極S間の電圧VGSに加算されることになり、入力信
号eiによりFETのチャンネル抵が変化を受け増幅器
3の出力端の歪を悪化させる欠点が生じる。Therefore, in a secondary equalizer circuit equipped with such a FET switch circuit, equalizer characteristics are obtained by the feedback action of the feedback circuit 4, but the O due to switching of the FET is
N, OFF control is used to obtain equalizer characteristics corresponding to normal tape characteristics and chrome tape characteristics, but in the conventional equalizer circuit described above, an input signal ei is applied to the input terminal 1 of the feedback amplifier 3. In this case, a voltage ei is similarly generated at the source electrode S of the FET, which is eventually added to the voltage VGS between the gate electrode G and source electrode S of the FET, and the input signal ei causes the channel of the FET to be The disadvantage is that the distortion at the output end of the amplifier 3 is worsened by the change in resistance.
また、この歪悪化を防ぐ手段として第1図点線で示すよ
うにFETのゲートソース電極間に低抗Roを挿入して
ノーマルテープ時に切換スイッチSWによりFETのゲ
ート電極をオープンにすれば一応改善はされるがこのよ
うにすると前言己切換スイッチSWを切換えることによ
り前記増幅器3の出力端が直流的に変化するという具合
が生ずる欠点を有する。In addition, as a means to prevent this deterioration of distortion, as shown by the dotted line in Figure 1, a low resistance Ro is inserted between the gate and source electrodes of the FET, and the gate electrode of the FET is opened using the changeover switch SW during normal tape operation. However, this method has the disadvantage that the output terminal of the amplifier 3 changes in a direct current manner by switching the changeover switch SW.
更にはFETをON状態にするノーマルテープ使用時、
前言印ETのゲート電極を積極的に開放して上述欠点を
除去することも1手段として考えられるが構成が複雑に
なると共に誘導等のトラブルにより雑音が生じ易い欠点
があり、いずれにしても実用的でない。Furthermore, when using normal tape to turn on the FET,
One possible solution would be to actively open the gate electrode of the aforementioned ET to eliminate the above-mentioned drawbacks, but this would complicate the configuration and easily generate noise due to problems such as induction, so in any case, it is not practical. Not on target.
本発明は上述した事情に鑑みて成されたもので帰還増幅
器の出力端に歪を生じせしめることなく且つ出力端の直
流電位を安定にし得、更には誘導雑音を防し得る構成簡
単にして安価な特にテープレコーダのィコラィザー回路
の特性切換に用いて好適するFETスイッチ回路を備え
た帰還増幅回路を提供することを目的とするものである
。The present invention has been made in view of the above-mentioned circumstances, and has a simple and inexpensive structure that can stabilize the DC potential at the output end without causing distortion at the output end of the feedback amplifier, and can further prevent induced noise. In particular, it is an object of the present invention to provide a feedback amplifier circuit equipped with an FET switch circuit suitable for use in changing the characteristics of an equalizer circuit of a tape recorder.
以下本発明の−実施例を図面第2図を参照して詳細に説
明する。尚、本発明は帰還増幅器に設けられた帰還回路
をテープレコーダのィコラィザー回路として適用し、第
1図に準じ同一の構成は同一符号で表記すると共に、第
1図に対して異なる構成をもって本発明の説明を述べる
。Embodiments of the present invention will be described in detail below with reference to FIG. 2 of the drawings. Note that the present invention applies a feedback circuit provided in a feedback amplifier as an equalizer circuit of a tape recorder, and the same components as in FIG. I will give an explanation.
すなわち本発明は帰還増幅器3の出力端2と反転入力端
1′間に介挿接続される帰還回路4に設けられるスイッ
チング用のFETを備えたFETスイッチ回路5の接続
構成に特徴を有して構成することにある。That is, the present invention is characterized by the connection configuration of the FET switch circuit 5 equipped with a switching FET provided in the feedback circuit 4 interposed and connected between the output terminal 2 and the inverting input terminal 1' of the feedback amplifier 3. It consists in composing.
即ち、前記帰還回路4に、該帰還回路4を構成する複数
の抵抗素子のうち前記出力端側の第1抵抗素子R,に対
し並列に、ドレィン電極Dを帰還増幅器3の反転入力端
1′側に接続すると共にソース電極Sを出力端2に直接
的に接続したスイッチング用FETを設け、そしてこの
FETのソース電極Sとゲ−ト電極G間に比較的高低抗
の抵抗素子R2を介挿接続すると共に、該ゲート電極G
をノーマル及びクロームテープ特性切換用の単一の切換
スイッチSW。That is, in the feedback circuit 4, the drain electrode D is connected to the inverting input terminal 1' of the feedback amplifier 3 in parallel to the first resistance element R on the output terminal side among the plurality of resistance elements constituting the feedback circuit 4. A switching FET is provided whose source electrode S is directly connected to the output terminal 2, and a resistance element R2 having a relatively high and low resistance is inserted between the source electrode S and gate electrode G of this FET. In addition to connecting the gate electrode G
A single switch SW for switching between normal and chrome tape characteristics.
を介して負バイアス電源−Vに接続してFETスイッチ
回路5を構成する。尚、前記功換スイッチSWoは、オ
ン(投入)時にテープレコーダのィコラィザ−特性をノ
ーマルテープ特性に、切換制御すると共にオフ(開放)
時にクロームテープ特性に制御する如く設定されている
。従って、切襖スイッチSWoをオンにした場合、FE
Tのゲート電極Gは−Vに負バイアスされて該FETは
ON状態に制御され、一方切換スイッチSWoをオフに
した場合、ゲート電極Gは−Vの負バイアスから開放さ
れると共に前記FETのゲート電極は抵抗R2を介して
直流的に追随したソース電極電位(出力端電位)が与え
られOFF状態に制御される。The FET switch circuit 5 is configured by connecting to the negative bias power supply -V through the FET switch circuit 5. The functional switch SWo controls switching the equalizer characteristic of the tape recorder to the normal tape characteristic when turned on (turned on), and also turns off (opened).
It is sometimes set to control the characteristics of chrome tape. Therefore, when the cut-off switch SWo is turned on, the FE
The gate electrode G of T is negatively biased to -V and the FET is controlled to be in the ON state.On the other hand, when the changeover switch SWo is turned off, the gate electrode G is released from the negative bias of -V and the gate of the FET is controlled to be in the ON state. The electrode is supplied with a source electrode potential (output end potential) which is followed by direct current via the resistor R2, and is controlled to be in the OFF state.
よって、このようにFETは切換スイッチSW。Therefore, in this way, the FET is a changeover switch SW.
のオン,オフ制御によってスイッチング制御されてノー
マル及びクロームテープ特性のィコラィザ−特性切換が
行なわれる。従って、本発明の斯る回路構成によると切
換スイッチSWoの切換によるFETのスイッチング制
御時FETのゲート電位は抵抗R2の作用によりソース
電位に追随し、ゲート・ソース電極間の電位・は常に一
定電位(零電位)に保たれるのでゲート・ソース電極間
のチャンネル抵抗は信号による変化を受けることがない
ので歪発生を防止することができる。The equalizer characteristics are switched between normal and chrome tape characteristics by switching control by the on/off control of . Therefore, according to the circuit configuration of the present invention, when the switching of the FET is controlled by switching the changeover switch SWo, the gate potential of the FET follows the source potential due to the action of the resistor R2, and the potential between the gate and source electrodes is always a constant potential. Since the channel resistance between the gate and source electrodes is maintained at zero potential, the channel resistance between the gate and source electrodes is not subject to change due to signals, thereby preventing distortion from occurring.
また斯る本発明によると前記抵抗R2はFETの入力イ
ンピーダンスが非常に大きいことから大抵抗と成し得、
以って負荷抵抗として作用し得るので帰還増幅器の出力
端には直流的に影響を与えることがなく安定な動作を行
うことができると共に、その構成も頗る簡単であり、か
つ信号路の配線も最短にして誘導雑音の発生も防止し得
る多々効果を奏するものである。Further, according to the present invention, the resistor R2 can be a large resistor since the input impedance of the FET is very large.
Therefore, since it can act as a load resistance, stable operation can be performed without affecting the output terminal of the feedback amplifier in terms of direct current.The configuration is also extremely simple, and the wiring of the signal path is easy. This has many effects such as minimizing the time and preventing the generation of induced noise.
更に本発明は上記実施例に基づき、第3図に示す如く第
2図の基本構成を左右チャンネル用に1対用意してステ
レレオ構成とすることもできる。Furthermore, the present invention is based on the above-mentioned embodiment, and as shown in FIG. 3, a pair of the basic configuration shown in FIG. 2 can be prepared for left and right channels to form a stereo stereo configuration.
即ち、左チャンネル用のイコラィザ−回路10と右チャ
ンネル用のィコラィザー回路11の夫々FETスイッチ
回路51,52を構成するFETのゲート電極G,,○
2を、順方向に接続されたダイオードD,,D2を介し
て互いを援続し共通の切換スイッチSWsによって行う
ようにしたものである。ところで前記ダイオード○,,
D2の介在は切換スイッチSWsの切換時における両チ
ャンネル間の干渉を防止するためにある。That is, the gate electrodes G, .
2 are connected to each other via diodes D, D2 connected in the forward direction, and are performed by a common changeover switch SWs. By the way, the diode ○,,
The intervention of D2 is to prevent interference between both channels when the changeover switch SWs is switched.
よって、この構成によれば、簡単にステレオとして使用
でき、更には切換スイッチSWsを両チャンネル共用に
して成し得るので前述した実施例の効果を合わせもって
構成をより一層簡単にできる。Therefore, according to this configuration, it can be easily used as a stereo system, and furthermore, the changeover switch SWs can be used in common for both channels, so that the configuration can be further simplified by combining the effects of the above-described embodiments.
以上によって、本発明は構成簡単かつ安価に−して帰還
増幅器出力端の直流電位を安定に○得ると共に歪発生を
防止し得、更には誘導雑音も防止し得る等多々効果を奏
し実用に際して利益大なるものである。As described above, the present invention has a simple and inexpensive structure, can stably obtain a DC potential at the output end of a feedback amplifier, can prevent distortion, and can also prevent induced noise, etc., and has many advantages in practical use. It is a big thing.
第1図は従来の回路接続図、第2図は本発明の一実施例
を示す回路接続図、第3図は本発明の他の実施例を示す
回路接続図である。
1・・・入力端、2・・・出力端、3・・・帰還増幅器
、4…帰還回路、FET…電界効果トランジスタ、SW
o・・・切換スイッチ、R2・・・抵抗。
第1図第2図
第3図FIG. 1 is a conventional circuit connection diagram, FIG. 2 is a circuit connection diagram showing one embodiment of the present invention, and FIG. 3 is a circuit connection diagram showing another embodiment of the present invention. 1... Input end, 2... Output end, 3... Feedback amplifier, 4... Feedback circuit, FET... Field effect transistor, SW
o...Choice switch, R2...Resistor. Figure 1 Figure 2 Figure 3
Claims (1)
され前記増幅器の利得或いは周波数特性を変化させる帰
還回路と、この帰還回路に設けられ該帰還回路を構成す
る複数の抵抗素子のうち前記出力端側の第1抵抗素子に
対し並列にドレイン電極及びソース電極が前記増幅器の
入力端側及び出力端側に夫々対応して接続されると共に
ゲート電極がスイツチ手段を介してバイアス電源に接続
されたスイツチング用FETとこのFETのゲート電極
とソース電極間に介挿接続された抵抗素子とから構成し
たことを特徴とするFETスイツチ回路を備えた帰還増
幅回路。1. A feedback amplifier, a feedback circuit that is interposed and connected between the input and output terminals of this amplifier and changes the gain or frequency characteristics of the amplifier, and a plurality of resistive elements that are provided in this feedback circuit and constitute the feedback circuit. A drain electrode and a source electrode are connected in parallel to the first resistive element on the output end side, corresponding to the input end side and the output end side of the amplifier, respectively, and the gate electrode is connected to a bias power source via a switch means. What is claimed is: 1. A feedback amplifier circuit equipped with a FET switch circuit, characterized in that it is comprised of a switching FET and a resistance element interposed and connected between the gate electrode and source electrode of this FET.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8727677A JPS6037646B2 (en) | 1977-07-22 | 1977-07-22 | Feedback amplifier circuit with FET switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8727677A JPS6037646B2 (en) | 1977-07-22 | 1977-07-22 | Feedback amplifier circuit with FET switch circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5422812A JPS5422812A (en) | 1979-02-21 |
| JPS6037646B2 true JPS6037646B2 (en) | 1985-08-27 |
Family
ID=13910240
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8727677A Expired JPS6037646B2 (en) | 1977-07-22 | 1977-07-22 | Feedback amplifier circuit with FET switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6037646B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6297344U (en) * | 1985-12-09 | 1987-06-20 |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5331231U (en) * | 1976-08-24 | 1978-03-17 | ||
| JPH07101481B2 (en) * | 1983-04-09 | 1995-11-01 | ローム 株式会社 | Amplifier circuit |
| JPS6135425U (en) * | 1984-07-31 | 1986-03-04 | 株式会社東芝 | recording amplification circuit |
-
1977
- 1977-07-22 JP JP8727677A patent/JPS6037646B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6297344U (en) * | 1985-12-09 | 1987-06-20 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5422812A (en) | 1979-02-21 |
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