JPS6037668B2 - Carrier phase control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION In a multi-phase multi-level modulation method in which information is made to correspond to the phase and amplitude of a carrier wave in multi-level data transmission, the present invention provides a method for controlling the phase of a regenerated carrier wave used for synchronous detection by eliminating distortion and noise. The present invention relates to a phase control device that allows control using information extracted from a signal.

CCITT's recommendations regarding modulation and demodulation equipment for 9600 b/s data transmission over voice bands recommends that the data point arrangement be as shown in FIG. 1 on the phase plane.

The data points are (1,1), (3,0) on the coordinates in Figure 1.
, (5,0), (3,3) and 9 of each point
A total of 16 points including the points rotated by an integer of 00 are arranged.
Considering the phase control for the recovered carrier wave of coherent detection on the demodulation side for data transmission using the data point arrangement shown in Figure 1, it is difficult to control the phase by simply extracting only the error in the phase direction. Therefore, it is inevitable that the state of the data points is controlled as shown in FIG. 2-1.
The present invention uses not only phase information but also power information to avoid erroneous control at points shifted by 450 degrees.The principle of the present invention will be explained below.

The present invention is effective for carrier wave phase control in data transmission using multi-phase multi-level modulation in which data points with different powers are arranged in adjacent phases, as illustrated in FIG.

For example, in the data point arrangement shown in Figure 1, the sum of the squares of the distances from the center of the data points on the axis * Jumori = 34, and the sum of the squares of the distances at points on a line offset by 450 degrees from the axis. 1212 crosses + graduation = greater than 20. Therefore, if phase control is performed using this information so that the sum of squares of the distances is maximized on the axis, erroneous control as shown in FIG. 2-1 can be avoided. In this case, the arbitrariness of 900 remains, but since these are usually processed by code processing using differential codes etc., this does not pose a problem in this case. As a concrete method, when data is received within the shaded area in Figure 2-2, an amount corresponding to the sum of the squares of the distance from the center (i.e., the power of the received data) is received. The phase of the regenerated carrier wave is controlled so that the data points move in the positive direction (counterclockwise), and when data is received outside the shaded area, the data points are moved by an amount corresponding to the power of the received data. The phase of the regenerated carrier wave is controlled so that it moves in the negative direction. Now, if the probability of data occurrence at each data point is equal, if the above processing is performed each time each received data is input, the power of the data in the shaded area and the data outside the shaded area will be The magnitude and direction of the average phase control amount are determined by the difference from the power. Therefore, the second -
In the case of the phase state shown in Fig. 3, the vertical axis and the machine axis rotate counterclockwise, and in the case of the phase state shown in Fig. 2-4, the vertical axis and the horizontal ball rotate clockwise. It will rotate to
Finally, the phase is controlled to the normal state shown in FIG. As described above, it has been shown that the present invention is not controlled even when there is a phase shift of 450 degrees, but another feature of the present invention is that it is possible to control even if distortion and noise are superimposed on the signal. That's true. When distortion or noise is superimposed on a signal, on the receiving side the signal is almost uniformly distributed around the data points, as shown by diagonal lines in FIG. 2-5. However, in the shaded area, the amplitude still varies depending on the phase, so the phase can be controlled in exactly the same manner as described above. Further, the above-mentioned phase control can be applied only to the received data falling in the area outside the circle shown in FIGS. 2-5. The present invention will be explained in more detail below using examples.

FIG. 3 is a block diagram showing an embodiment of the present invention. The received signal coming from terminal 1 in Figure 3 is branched into two,
They are demodulated by synchronous detectors 2-- and 2-2, respectively, and receive baseband signals are obtained at terminals 11-1 and 11-2. The regenerated carrier waves used in the synchronous detectors 2-1 and 2-2 are generated by a voltage controlled oscillator 9, one of which remains unchanged, and the other whose phase is rotated by 90 degrees by a 90 degree phase shifter 10, and the phase of the recovered carrier wave is rotated by 90 degrees, and the phase of the carrier wave is rotated by 90 degrees, respectively. 2-2. Terminal 11
The pair of received baseband signals obtained at -1 and 11-2 correspond to the vertical and horizontal axes in Figures 1 and 2, so the phase of the voltage controlled oscillator can be appropriately controlled. Accordingly, it is possible to correctly control the data point arrangement as shown in FIG.

A specific method of phase control is performed as follows using the pair of received baseband signals.

The signals output from the synchronous detectors 2-1 and 2-2 are branched and sent to two-way circuits 3-1 and 3-2, respectively.
are squared and added together in an adder 6 to become one input of a calculator 7. A two-way sum calculation circuit is constituted by the two-way circuits 3-1, 3-2 and the adder 6, and the absolute value of the phase error amount is obtained from the output of the adder 6.

The other input of the multiplier 7 is used to compare the pair of received baseband signals with the comparison circuit 4-. 1 and 4-20 and the pair of received baseband signals described above are input to encoders 4-3 and 4-4, and the code output obtained by inputting them to encoders 4-3 and 4-4 is input to logic circuit 5, obtained by its output.
Here, the sign output is 0 when a positive value is input,
It says that if a negative value is input, 1 will be output. Furthermore, the comparison circuit 4-1 actually consists of a subtracter 41 and a sign circuit 42, and the comparison circuit 4-2 consists of an adder 43 and a sign circuit 44, each of which outputs a sign output.
That is, in FIG. 3, if the value of the signal from the synchronous detector 2-1 is y and the value of the signal from the synchronous detector 2-2 is another, the sign of the x-y value is determined by the code circuit 4. The sign of the value x+y is output from the code circuit 4-2. Further, the logic operation circuit 5 includes three exclusive OR circuits 51, 52, and 53. In FIG. 4, comparator 4-1,
The output of 4-2, the output of encoders 4-3, 4-4, and the output of logic circuits which are the outputs of the logical OR of these outputs are calculated for each region shown in FIG. 2-2. Indicated.

Here, the x value corresponds to the horizontal axis, and the y value corresponds to the vertical axis. For example, in FIG. 2-2, when data between 00 and 450 is received, the output of comparator 4-1 becomes negative and 1
is obtained, and since the outputs of the comparator 4-2 and encoders 4-3 and 4-4 are positive, 0 is obtained. Therefore, the output of 52, which is the output of the exclusive OR of comparator 4-1 and encoder 4-3, is 1
, or similarly, the output of exclusive OR 51, i.e.
The output of the logic circuit 5 becomes 1. The values shown in FIG. 4 are obtained in the same manner in other areas. The output of this logic circuit 5 is used as a sign, and the sign output of the parentheses is weighted by the absolute value (power) of the phase error amount supplied from the adder 6 in the nullator 7 to obtain the phase error output. It will be done. If the phase error output is used to adjust the phase in the negative direction when the signal falls in the shaded area in Figure 2, and in the positive direction when the signal falls in other areas, the low-pass filter 8 By the smoothing effect of , the carrier wave phase can finally be controlled to the normal state shown in FIG. The present invention describes a data point arrangement that complies with CCITT recommendations for voice band data transmission with a data point arrangement of 960 ribs/s, but generally data point arrangement is applied when the power is not uniform in the phase direction in multi-phase multilevel modulation. For example, it is widely effective for cases in which data points are arranged in a grid pattern on a phase plane.

[Brief explanation of the drawing]

FIG. 1 is a phase plane diagram showing the data point arrangement according to CCITT compliance of the voice band 9600b/s data transmission modem device, FIG. 2 is a phase plane diagram for explaining the principle of the present invention, and FIG. The figure is a block diagram showing one embodiment of the present invention, and FIG. 4 is a diagram showing the response of the logic circuit. In Fig. 3, 2-1 and 2-2 are synchronous detectors;
11 and 3-2 are two-plan circuits, 4-1 and 4-2 are comparators, 4-3 and 4-4 are encoders, 5 is a logic operation circuit, 6 is an adder, 7 is a chicken calculator, 8 is a low pass filter,
9 is a voltage controlled oscillator, 1 phase shifter, 51, 52
, 53 are exclusive OR circuits. Memo' figure Hiiragi Z-/Duetsu Otsu-Z figure Hair Z-3 figure Otsu-mu figure traditional Z-5 figure O3 figure soup 4 figure

Claims (1)

[Claims] 1. A device that performs synchronous detection using two mutually orthogonal regenerated carrier waves to obtain two output signals in data transmission using multi-phase multi-level modulation in which data points with different powers are given in adjacent phases, and the above-mentioned device. A square sum calculation circuit calculates the square of the output signal and adds the results, a comparison circuit extracts the difference between the two output signals and the sign of the sum, and the result of the comparison circuit and the output a logical operation circuit that extracts the direction of a phase error by a logical operation based on a combination of exclusive OR circuits according to the sign of the signal;
A phase adjustment in which the amount of phase error is obtained by assigning a positive or negative sign determined by the output of the logic operation circuit to the value of the output of the multiplication-sum operation circuit, and the phase of the reproduced carrier wave is controlled based on this amount of phase error. A carrier wave phase control device comprising a circuit.