JPS6037719B2 - drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a drive circuit, and particularly to a step motor drive circuit used in electronic watches and the like.

An electronic watch has been proposed in which the oscillation frequency of an oscillator is divided into two, and two drive pulses with different phases are obtained, and these two drive pulses drive a step motor that causes the drive unit to vibrate in simple harmonic motion, thereby driving the second hand, etc. ing. When such a step motor is started, it may not start unless the position of the driving part and the gutter characteristics of the electromagnet are in a predetermined relationship. Therefore, in conventional electronic watches, when correcting the time etc., the generation of drive pulses is first stopped, the problem is corrected, and then the drive pulses are generated again to start the step motor, but as mentioned above, it does not start. In order to prevent this phenomenon, a mechanism was created in which the second hand always stopped at a predetermined number of seconds (for example, a few seconds at the corner). Such a mechanism was mainly implemented mechanically. The object of the present invention is to provide a highly reliable motor drive circuit that uses a simple mechanism to smoothly restart the second hand even if the second hand is stopped at an arbitrary number of seconds.

According to the present invention, there is provided an oscillation circuit that outputs an oscillation signal with a predetermined period and stops outputting the oscillation signal in response to an input control signal; A drive circuit comprising a signal generation circuit that generates at least one drive signal, a storage circuit that stores the signal state of the output of the signal generation circuit until the next signal is output, and a storage circuit that stores the signal state of the output of the signal generation circuit until the next signal is output; The method further includes a transmission circuit that transmits a signal corresponding to a signal storage state of the storage circuit immediately before the output of the oscillation signal is stopped to the signal generation circuit in response to the control signal. Obtain a drive circuit that According to the present invention, no matter what state the step motor is stopped in, the drive output is always applied in a startable state, and the step motor can be stopped in any state.

Furthermore, since everything is controlled by electronic mechanisms, there are no failures and high reliability.

In turn, it is possible to make the drive circuit more compact, thereby achieving miniaturization of wristwatches and the like. The present invention will be explained in detail below using FIG. The frequency dividing circuit 1 is a frequency dividing circuit that enters a reset state when the reset state 6 is at a high level, and starts frequency division at the same time as the reset is released, as shown in 1-Q in FIG. Binary flippf. The split circuit 2 divides the frequency of the clock supplied from the frequency divider circuit 1 by two, and upon reset, the frequency division by two is stopped by control J signals 51 and 52 from the control circuit described below, and the output level is increased. Fixed. The pulse width adjustment circuit 3 is a circuit that adjusts the output level width from the binary flip-flop circuit 2 and generates an output pulse with a half-cycle phase difference. Therefore, in the case of FIG. 1, which is an example of Z of the present invention, when the output 2-Q of the binary flip-flop changes from high level to low level as shown in FIG. 2, 2-Q is constant at 31. Since it is transmitted with a time delay (hereinafter referred to as t seconds), a motor drive pulse A with a pulse width of t seconds is generated, and similarly when 2-Q changes from low level to no level, 32 has 2-Q
is transmitted with a delay of t seconds, so a motor drive pulse B with a pulse width of t seconds is generated. In other words, when motor drive pulse A is high level, motor drive pulse B is always low level, and when motor drive pulse B is /.
The motor drive pulse A is always at a low level, and although both may be at a low level at the same time, they are never at a low level at the same time. Furthermore, at the time of reset, both are at low level. Here, when the motor drive pulse A becomes a high level, the memory circuit 4 sets 41 to a high level.
When 42 is set to low level and motor drive pulse B becomes high level, 41 is set to low level and 42 is set to high level, and when motor drive pulses A and B are low level, 41 is set to low level and 42 is set to high level.
, 42 in the previous state. In the control circuit 5, when the reset signal 6 is at a low level, both 51 and 52 go to a low level, and the reset and preset terminals of the binary flip-flop circuit 2 are set at a low level to divide the frequency by two. Since the gate of is opened, the level of the output 41 of the memory circuit 4 is transmitted to the reset terminal of the binary flip-flop circuit 2, and at the same time, the level of the output 42 of the memory circuit is transmitted to the preset terminal of the binary flip-flop circuit 2. This is a circuit that conveys information to the

As shown in period 11 in FIG. 2, when the reset terminal 6 is set to high level after the motor drive pulse A is generated, 51 becomes high level and 52 becomes low level, and the binary flip-flop circuit 2 is reset. Then, the output terminal 2-Q becomes a low level, the output terminal 2-Q becomes a high level, and a motor drive pulse B is generated t seconds after the reset signal is released. Also, as shown in period 22, motor drive pulse B
When the reset terminal 6 is set to /. level after occurrence of
51 becomes a low level and 52 becomes a high level, the preset of the binary flip-flop circuit 2 operates, the output terminal 2-Q becomes a high level, the output terminal 2-Q becomes a low level, and the motor is turned off after t seconds after the reset signal is released. Drive pulse A is generated. In conventional corner-second stop watches, the first drive pulse is always generated from one of the two output terminals, so that the second hand always advances to the odd-numbered seconds scale t seconds after the reset is released, but as described above, In the arbitrary second stop watch using the motor drive circuit of the present invention, the scale that the second hand advances t seconds after the reset is released will be an odd number when the corner number is stopped, and the number of corners when the corner number is stopped. Mechanical parts for five-way control are omitted. Furthermore, according to the present invention, due to sudden fluctuations in power supply voltage, etc.
Even if a signal other than the regular drive pulse signal is output from the pulse generation circuit 3, the motor will reliably rotate to zero by the first drive pulse after the reset is released. That is, to explain this using FIGS. 1 and 2, after the motor drive pulse A is generated and immediately before the reset terminal 6 reaches the /-I level, the motor drive pulse B is generated due to the cause mentioned above. Then, the output 41 of the memory circuit 4 is inverted to a low level, and the output 42 is inverted to a high level. In this state, when the reset terminal 6 becomes /.--level, the output 51 of the transmitting means 5 becomes o-level and the output 52 becomes high-level.
Since the high level of the output 52 is supplied to the preset input terminal P of the flip-flop circuit 2, the output 2-Q becomes the /... level, and the signal line 3 of the pulse generating circuit 3
1 becomes low level. Therefore, when the reset is released, terminal 6
When becomes a low level and the output is supplied from the frequency divider circuit 1, the 2-Q output becomes a low level and the signal line 31 becomes a low level, t seconds after the reset is released, and as a result,
Motor drive pulse A is output. Since the driving pulse B was outputted immediately before the reset, the motor rotates by the driving pulse A after the reset is released. As described above, according to the present invention, even if the pulse generating circuit 3 is reset after outputting a signal other than a regular drive pulse, it will surely rotate t seconds after the reset is released.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.
FIG. 2 is a time chart of FIG. 1. 1...Divide circuit, 2...Binary flip. top circuit, 3...Pulse width adjustment circuit, 4...
...Memory circuit, 5... Control circuit, 6...
Reset terminal. Kiyoshi Z figure hair figure 2

Claims (1)

[Claims] 1. An oscillation circuit that outputs an oscillation signal with a predetermined period and stops outputting the oscillation signal by inputting a control signal, and at least two step motors with different phases using the oscillation signal output from the oscillation circuit. A step motor drive circuit that includes a signal generation circuit that generates a drive signal, a memory circuit that stores the signal output state of the signal generation circuit until the next signal is output, and a memory circuit that stores the signal output state of the signal generation circuit until the next signal is output, and A signal corresponding to the signal storage state of the storage circuit immediately before the signal output stops is transmitted to the signal generation circuit in response to the control signal, and a step generated last before the control signal is input is transmitted to the signal generation circuit in response to the control signal. A step motor drive circuit further comprising means for guiding the signal generation circuit to a state in which a drive signal different from the motor drive signal is generated first after the control signal disappears. .