JPS6038035B2 - Light emitting device manufacturing method - Google Patents
Light emitting device manufacturing methodInfo
- Publication number
- JPS6038035B2 JPS6038035B2 JP52116604A JP11660477A JPS6038035B2 JP S6038035 B2 JPS6038035 B2 JP S6038035B2 JP 52116604 A JP52116604 A JP 52116604A JP 11660477 A JP11660477 A JP 11660477A JP S6038035 B2 JPS6038035 B2 JP S6038035B2
- Authority
- JP
- Japan
- Prior art keywords
- light emitting
- dicing
- emitting device
- region layer
- device manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Dicing (AREA)
- Led Devices (AREA)
Description
【発明の詳細な説明】
本発明は発光素子製造方法において、特に発光秦子べレ
ツトの製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a light emitting device, and particularly to a method for manufacturing a light emitting bead.
まず従来の、一般的な発光素子べレツトの製造方法をＮ
型ＤａＰを基体にした場合について第１図乃至第４図を
参照しながら説明する。まず、第１図に示す様なＮ型Ｇ
ａｐゥェェーハー１上に、液相成長法等により、第２図
の２に示すようなＰ型領域層を形成させ、ＰＮ接合面３
を有する半導体ウェーハーを製造する。First, the conventional method of manufacturing a general light emitting device pellet was explained.
The case where the DaP type is used as the base will be explained with reference to FIGS. 1 to 4. First, N-type G as shown in Figure 1
A P-type region layer as shown in 2 in FIG. 2 is formed on the ap wafer 1 by a liquid phase growth method, etc.
A semiconductor wafer having the following characteristics is manufactured.
このウェーハーのＰ型領域層、およびＮ型領域層の表面
に、それぞれＡｕ合金等の電極４，５を形成し、図示上
面、したがってＰ型領域層の表面からダィシングすると
、第３図の６に示す様な斜線の部分がダィシングにより
失われることになる。Electrodes 4 and 5 made of Au alloy or the like are formed on the surfaces of the P-type region layer and the N-type region layer of this wafer, respectively, and dicing is performed from the upper surface shown in the drawing, that is, from the surface of the P-type region layer. The shaded area shown will be lost due to dicing.
なお、第３図は説明のため、ウェーハーの一部を拡大し
たものである。しかる後に個々のべレットに分割すれば
、第４図に示すような断面図のべレットが製造されるこ
とになる。Note that FIG. 3 shows a part of the wafer enlarged for explanation. If the pellets are then divided into individual pellets, pellets having a cross-sectional view as shown in FIG. 4 will be manufactured.
なお、説明をしやすくするため個々の発光素子べレット
は、第３図、および第３′図において点線７で示される
ような、ダィシングの中心で、しかも、ダイシングされ
ない面に対して垂直な方向に分割されるものとし、ダィ
シング間隔をＬ、ダィシング幅を１と表わす。以上、従
来の、この様な方法によれば、少なくともＰＮ薮合面が
ダィシングにより切断されることになり、ダィシング幅
、すなわち４０ミクロン程度が無駄になる。For ease of explanation, each light emitting element pellet is placed at the center of dicing and in a direction perpendicular to the undiced surface, as shown by dotted line 7 in FIGS. 3 and 3'. The dicing interval is expressed as L, and the dicing width is expressed as 1. As described above, according to such a conventional method, at least the PN mating surface is cut by dicing, and the dicing width, that is, about 40 microns, is wasted.
ＰＮ接合面は、発光素子におし、て、発光の基礎となる
部分であり、できるだけ広い面積を有することが望まれ
る。本発明は、上記の欠点をなくし、ＰＮ接合面のダィ
シングによる無駄をなくした発光素子製造方法を得るも
のである。The PN junction surface is the basis of light emission in the light emitting element, and is desired to have as wide an area as possible. The present invention eliminates the above-mentioned drawbacks and provides a method for manufacturing a light emitting device that eliminates waste caused by dicing the PN junction surface.
以下本発明を従釆の場合の説明と同じく、Ｎ型Ｇａｐを
基体にした場合について説明する。In the following, the present invention will be described in the same manner as in the case of the subordinate structure, in which the N-type Gap is used as the base.
第１図から第２図までは従来の場合と同じなので説明を
省略する。本発明は、ダィシングを厚い層側の表面から
、図示のようにＰＮ接合面に達しないがその接合面に近
綾する深さまで行なうのであるから、この実施例では、
ダィシングにより失われる部分は、第３′図の斜線６で
示される部分となる。Since the steps from FIG. 1 to FIG. 2 are the same as the conventional case, the explanation will be omitted. In the present invention, dicing is performed from the surface of the thicker layer to a depth that does not reach the PN junction surface as shown in the figure but is close to the junction surface, so in this embodiment,
The portion lost due to dicing is the portion indicated by diagonal lines 6 in FIG. 3'.
なお第３′図も、ウェーハーの一部の拡大図である。し
かる後に薄い半導体領域層２のダィシングに対応する部
分において点線７を境に個々のべレットに分割すれば、
第４′図に示すような断面図を有するべレットが製造さ
れることになる。仮りに縦、横のダィシング間隔Ｌを０
．３５帆、ダィシング幅１を５０ミクロン、しかもダィ
シング方向を縦藤互いに直交させれば発光素子べレット
のＰＮ接合面は正方形になり、両方法により製造された
ＰＮ懐合面の面積比は、（０．３５）２／（０．３０）
２±１．３６となる。Note that FIG. 3' is also an enlarged view of a part of the wafer. After that, if the thin semiconductor region layer 2 is divided into individual pellets along the dotted line 7 at the portion corresponding to the dicing,
A pellet having a cross-sectional view as shown in FIG. 4' will be manufactured. Suppose that the vertical and horizontal dicing interval L is 0.
．． If the dicing width 1 is 50 microns and the dicing directions are orthogonal to each other, the PN bonding surface of the light emitting element pellet will be square, and the area ratio of the PN bonding surfaces manufactured by both methods is ( 0.35)2/(0.30)
It becomes 2±1.36.
以上記載したように、本発明によれば、同じ表面積のウ
ェーハーから、ＰＮ接合面を十分有効に活用できる発光
素子の製造が可能になる。As described above, according to the present invention, it is possible to manufacture a light emitting element that can fully and effectively utilize the PN junction surface from a wafer having the same surface area.
第１図乃至第４図は従釆の発光秦子べレット製造法およ
び製造される発光素子べレットの断面図第３′図、第４
図は本発明による発光素子べレット製造方法、および製
造される発光素子べレットの断面図を示す。
１・・・・・・Ｎ型ＧａＰゥェーハ−、２・・・・・・
Ｐ型領域層、３・…・・ＰＮ接合面、４・・・・・・Ｐ
型領域層表面の電極、５・・・・・・Ｎ型領域層表面の
電極、６・・…・ダィシングにより失われる部分、７・
・・・・・ダイシングの中心軸、およびべレットの分割
面。
第１図
第２図
第３図
第 ３ノ図
第４図
第 ４′図Figures 1 to 4 are cross-sectional views of the light-emitting device pellet manufacturing method and the manufactured light-emitting element pellets, Figures 3' and 4.
The figure shows a method for manufacturing a light emitting device pellet according to the present invention and a cross-sectional view of the manufactured light emitting device pellet. 1...N-type GaP wafer, 2...
P-type region layer, 3...PN junction surface, 4...P
Electrode on the surface of the type region layer, 5... Electrode on the surface of the N-type region layer, 6... Portion lost due to dicing, 7.
...The central axis of dicing and the dividing surface of the pellet. Figure 1 Figure 2 Figure 3 Figure 3 Figure 4 Figure 4'
Claims (1)
イオードウエーハ内の前記第１表面側の第１導電形の半
導体領域層と第２表面側の第２導電形の厚い半導体領域
層との間に、前記各表面に平行なＰＮ接合面を形成する
工程と、前記第２表面側から前記厚い半導体領域層をＰ
Ｎ接合に近接する深さまでダイシングする工程と、その
後薄い半導体領域層の前記ダイシングに対応する部分か
ら個々のペレツトに分割する工程とを具備したことを特
徴とする発光素子製造方法。1. Between a semiconductor region layer of a first conductivity type on the first surface side and a thick semiconductor region layer of a second conductivity type on the second surface side in a light emitting diode wafer having a first surface and a second surface facing each other. a step of forming a PN junction plane parallel to each of the surfaces;
A method for manufacturing a light emitting device, comprising the steps of dicing to a depth close to the N junction, and then dividing the thin semiconductor region layer into individual pellets from a portion corresponding to the dicing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52116604A JPS6038035B2 (en) | 1977-09-30 | 1977-09-30 | Light emitting device manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52116604A JPS6038035B2 (en) | 1977-09-30 | 1977-09-30 | Light emitting device manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5451392A JPS5451392A (en) | 1979-04-23 |
| JPS6038035B2 true JPS6038035B2 (en) | 1985-08-29 |
Family
ID=14691263
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52116604A Expired JPS6038035B2 (en) | 1977-09-30 | 1977-09-30 | Light emitting device manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6038035B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5219796A (en) * | 1991-11-04 | 1993-06-15 | Xerox Corporation | Method of fabricating image sensor dies and the like for use in assembling arrays |
-
1977
- 1977-09-30 JP JP52116604A patent/JPS6038035B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5451392A (en) | 1979-04-23 |
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