JPS6041498B2 - Input signal disconnection detection circuit - Google Patents
Input signal disconnection detection circuitInfo
- Publication number
- JPS6041498B2 JPS6041498B2 JP55072172A JP7217280A JPS6041498B2 JP S6041498 B2 JPS6041498 B2 JP S6041498B2 JP 55072172 A JP55072172 A JP 55072172A JP 7217280 A JP7217280 A JP 7217280A JP S6041498 B2 JPS6041498 B2 JP S6041498B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- input signal
- output
- amplitude
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 title claims description 17
- 230000003287 optical effect Effects 0.000 claims description 10
- 230000005540 biological transmission Effects 0.000 claims description 8
- 230000003321 amplification Effects 0.000 claims description 7
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 7
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 230000003111 delayed effect Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 230000000087 stabilizing effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/691—Arrangements for optimizing the photodetector in the receiver
- H04B10/6911—Photodiode bias control, e.g. for compensating temperature variations
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Optical Communication System (AREA)
Description
【発明の詳細な説明】
この発明はアバランシ・フオトダイオード(APDとも
いう)を光/電気変換素子として用いるパルス光伝送用
受信装置において、APDのなだれ増倍度を負帰還によ
り制御して等イb増幅器の出力振幅を安定化する方式を
とる上記受信装置の入力信号断検出回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a receiving device for pulsed optical transmission using an avalanche photodiode (also referred to as an APD) as an optical/electrical conversion element, in which the avalanche multiplication factor of the APD is controlled by negative feedback to achieve equal output power. The present invention relates to an input signal disconnection detection circuit for the above-mentioned receiving device which adopts a method of stabilizing the output amplitude of the b amplifier.
一般に光伝送用受信装置にはAPDが光/電気変換素子
としてよく用いられる。Generally, an APD is often used as an optical/electrical conversion element in an optical transmission receiving device.
これは逆バイアスされたAPDにはなだれ効果を利用し
た光電流の増倍効果があり、簡単に高感度を得ることが
できるからである。しかし、APDの逆バイアス電圧対
なだれ増情度特性(以下Vr−M特性と略記する)は原
理的に周囲温度の影響を大きく受けるため、何らかのな
だれ増幅度M(以下増幅度M又は単にMと略記する)安
定化対策が必要となる。通常の方式ではM安定化は受信
用等化増幅回路最終段の出力振幅を一定にするように負
帰還制御によって逆バイアス電圧Vr(以下単にVrと
いうことあり)を変化させ増幅度Mを安定化する方法を
採用している。上記のようなパルス光伝送用受信装置に
おいて、入力信号断を検出するには信号成分の断を検出
するかクロック成分断を検出するかすればよいのである
が、入力信号断の場合には逆バイアス電圧VrがAPD
のブレークダウン電圧まで上昇してあとに説明するよう
にAPDからは大きな雑音が発生するため、従来におい
ては前者の方式は雑音の除去が困難であるとの理由で取
り上げられず、後者の方式はクロック断を検出する時期
をIJミッタの動作の中間とすれば一応雑音の影響をほ
ぼなくすことが出来るところから実用化されている。This is because the reverse biased APD has a photocurrent multiplication effect using the avalanche effect, and high sensitivity can be easily obtained. However, since the APD's reverse bias voltage vs. avalanche amplification characteristic (hereinafter abbreviated as Vr-M characteristic) is in principle greatly affected by the ambient temperature, some avalanche amplification degree M (hereinafter amplification degree M or simply M) (abbreviated)) Stabilization measures are required. In the normal method, M stabilization stabilizes the amplification degree M by changing the reverse bias voltage Vr (hereinafter simply referred to as Vr) using negative feedback control so as to keep the output amplitude of the final stage of the receiving equalization amplifier circuit constant. The method is adopted. In the receiver for pulsed optical transmission as described above, in order to detect an input signal interruption, it is sufficient to detect the interruption of the signal component or the interruption of the clock component, but in the case of an interruption of the input signal, reverse bias Voltage Vr is APD
As will be explained later, the former method has not been taken up in the past because it is difficult to remove the noise, and the latter method has not been used. This has been put into practical use because the influence of noise can be almost completely eliminated by detecting the clock interruption in the middle of the operation of the IJ transmitter.
しかし乍らこの後者方式では入力信号断時と信号入力時
のレベル差が圧縮されるので検出はできるものの安定性
という点では問題があり、またパルス繰返し周波数が2
00MHZ程度になると使用できなかった。なおクロッ
ク断の検出をリミッタのあとで行なうことは、信号断で
もAPDからの大きな雑音により通常のレベルより10
ないし2■旧小さいクロック成分が抽出され、これがリ
ミッタ回路でふつうのクロックと同程度の大きさにまで
増幅されるので、全く不可能となる。又リミッタの前で
検出しようとすると大利得の増幅器が必要となり、回路
規模および消費電力の増大を生じ不都合である。したが
って本発明の目的はパルス繰返し周波数が高い場合でも
入力信号断を確実に検出する回路を提供するものである
。However, this latter method compresses the level difference between when the input signal is cut off and when the signal is input, so although it can be detected, there is a problem in terms of stability, and the pulse repetition frequency is
It could not be used at around 00MHZ. Note that detecting clock loss after the limiter is a problem because even if the signal is interrupted, the noise level from the APD will be 100% higher than the normal level.
or 2) Since a small clock component is extracted and amplified by the limiter circuit to a size comparable to that of a normal clock, this becomes completely impossible. Furthermore, if detection is to be performed in front of the limiter, a large gain amplifier will be required, resulting in an increase in circuit scale and power consumption, which is inconvenient. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a circuit that reliably detects input signal interruption even when the pulse repetition frequency is high.
本発明は上記の目的を達成するのに、先述の雑音の除去
が困難で取り上げられなかった信号成分断検出による方
式を再検討し、あとに説明するように特別の信号処理を
行ない、今までとは逆に雑音が相当大きいことを利用し
てこれを実現するようにしたものである。In order to achieve the above object, the present invention reconsiders the method using signal component disconnection detection, which was not considered because it was difficult to remove the noise mentioned above, and performs special signal processing as explained later. On the contrary, this is achieved by taking advantage of the fact that the noise is quite large.
すなわち本発明によれば、アバランシ・フオトダィオー
ドを光/電気変換素子として用い、前記ァバランシ・フ
オトダィオードの増幅度の温度などによる変化を受信増
幅回路の出力の振幅を一定にするように負帰還をかけて
制御する形式のパルス光伝送用受信装置における入力信
号の断を検出する回路において、前記出力にパルス繰返
し周期に等しい遅延時間を与える遅延回路と、遅延した
出力の符号と原動力の符号のいずれか一方を反転しこの
反転した符号と他方の符号を加算して加算信号を発生す
る手段と、前記加算信号の振幅のピーク値を検出するピ
ーク振幅回路と、検出した振幅のピーク値の大きさから
前記入力信号の断を検出する手段とを有することを特徴
とする入力信号断検出回路が得られる。That is, according to the present invention, an avalanche photodiode is used as an optical/electrical conversion element, and negative feedback is applied to compensate for changes in the amplification degree of the avalanche photodiode due to temperature or other factors so as to keep the amplitude of the output of the receiving amplifier circuit constant. In a circuit for detecting a disconnection of an input signal in a controlled type of pulsed optical transmission receiver, a delay circuit that gives the output a delay time equal to a pulse repetition period, and either one of the sign of the delayed output and the sign of the driving force. means for inverting the signal and adding the inverted sign and the other sign to generate an addition signal; a peak amplitude circuit for detecting the peak value of the amplitude of the addition signal; There is obtained an input signal disconnection detection circuit characterized in that it has means for detecting input signal disconnection.
次に図面を参照して本発明につき詳細に説明する。Next, the present invention will be explained in detail with reference to the drawings.
第1図は受信装置の入力信号が断になったときにAPD
から発生する雑音のスペクトル特性を示す図である。Figure 1 shows the APD when the input signal to the receiver is cut off.
2 is a diagram showing the spectral characteristics of noise generated from the
この雑音は2種類の成分から成っていて、図にAで示し
た1つの雑音成分はAPDの結晶構造などの不均一性に
起因する増倍領域の部分的なブレークダウンによるマイ
クロプラズマ雑音(MP雑音ともいう)であり、ほぼ台
形のパルス状雑音でそのスペクトルの拡りは数十MHZ
である。Bで示した他の1つの雑音成分はショット雑音
と呼ばれ、APDの階電流が増倍されたもので、そのス
ペクトルは周波数に無関係でほぼ平坦な特性を示してい
る。CはAとBを加算した綜合雑音である。なおAPD
が信号入力時に発する雑音はAPDの状態によって周波
数に無関係に−3の旧ないし−5中旧程度の小さな値を
示し、その中間の値−4のBを○として同じ図に点線で
附記した。ここで曲線Cと○を比較すればすぐ分るよう
に、Dの値を仮に一3MBとしても、入力信号断におけ
るAPDの発する雑音が如何に大きいかが分り、このた
め先に述べたように入力信号断の検出が困難になるので
ある。第2図は本発明の一実施例の回路構成をブロック
であらわした図である。This noise consists of two types of components. One noise component, indicated by A in the figure, is microplasma noise (MP It is a nearly trapezoidal pulse-like noise with a spectrum spread of several tens of MHz.
It is. Another noise component indicated by B is called shot noise, which is a multiplication of the floor current of the APD, and its spectrum is independent of frequency and exhibits substantially flat characteristics. C is the combined noise obtained by adding A and B. Furthermore, APD
The noise generated when the signal is inputted shows a small value of -3 old to -5 medium old or so, depending on the state of the APD, regardless of the frequency, and the intermediate value B of -4 is marked with a circle and marked with a dotted line in the same diagram. As you can easily see by comparing curve C and ○, even if the value of D is 1 3 MB, you can see how large the noise generated by the APD is when the input signal is disconnected. This makes it difficult to detect signal interruption. FIG. 2 is a block diagram showing the circuit configuration of an embodiment of the present invention.
この第2図において、11はパルス繰返し周期Tに等し
い遅延時間tdを与える遅延回路、12は符号反転回路
、13は加算回路、14はピーク振幅検出回路、15は
比較回路をそれぞれ表わしている。なお信号をあらわす
aないしdについてはあとに説明する。第3図は第2図
の回路の動作を説明するためのタイムチャートであり、
図の左側に示した記号alとa2は第2図のaに、bl
とb2はbに、clとc2はcにそれぞれ対応するもの
である。ここにalは入力信号が入力されているときの
波形をあらわしており、この場合パルス繰返し周期Tと
して2.8ね(40皿MHZ)、立上り時間として1船
、デューティ比として0.0振幅Vp,として1ボルト
の“01lloo01びの符号列とする。blとclは
反転回路12と加算器13の出力をそれぞれ示している
。a2、b2、およびc2は入力信号が断のとき発する
雑音およびその変化をあらわしたものである。次に第2
図の回路の動作を第3図を併用して説明する。In FIG. 2, 11 represents a delay circuit that provides a delay time td equal to the pulse repetition period T, 12 a sign inversion circuit, 13 an addition circuit, 14 a peak amplitude detection circuit, and 15 a comparison circuit. Note that a to d representing signals will be explained later. FIG. 3 is a time chart for explaining the operation of the circuit in FIG. 2,
The symbols al and a2 shown on the left side of the figure are a in Figure 2 and bl
and b2 correspond to b, and cl and c2 correspond to c, respectively. Here, al represents the waveform when the input signal is input, and in this case, the pulse repetition period T is 2.8 mm (40 MHz), the rise time is 1 ship, and the duty ratio is 0.0 amplitude Vp. , is a code string of "01lloo01" of 1 volt. bl and cl represent the outputs of the inverting circuit 12 and the adder 13, respectively. a2, b2, and c2 represent the noise generated when the input signal is disconnected and its This represents change.Next, the second
The operation of the circuit shown in the figure will be explained with reference to FIG.
入力信号有りすなわち通常動作時において、信号alが
入力されると、この信号は遅延回路11でtdだけ遅延
を与えられ、反転回路12で反転されてblで示すよう
な信号となる。そしてこの信号は加算回路13で入力信
号alと加算され、clに示すような振幅が2Vp,す
なわち2ボルトの大きな信号となる。この場合図からも
分るように、原信号alに“1”の符合が連続するとこ
ろでは、その1運の符合に対してclでは離間した上下
1組のパルスが残るだけである。この信号clは比較器
1 5において2Vp,よりは小さくたとえばVp,と
等しく選んである基準電圧Vrd(更に詳しくは後述)
と比較され、比較出力dとしてclの電圧が基準電圧V
rerより高いことをあらわす符合“1”を出力する。
この場合2Vp,は2ボルト、Vrdは1ボルトとなる
ので、比較出力dの送出は容易である。なお信号clは
別にタイミング抽出のためにも使用される。次に信号が
断となった場合について説明すると、入力信号alが前
記のような特性を持っている場合は入力雑音a2は立上
り時間1仇s程度でゆるやかに安定化電圧Vp,に達し
、信号断が終れば同様にゆるやかにゼロになる。When there is an input signal, that is, during normal operation, when the signal al is input, this signal is delayed by td in the delay circuit 11, and is inverted in the inverting circuit 12 to become a signal as shown by bl. This signal is added to the input signal al in the adder circuit 13, and becomes a large signal with an amplitude of 2Vp, that is, 2 volts, as shown by cl. In this case, as can be seen from the figure, where the original signal al has consecutive "1" codes, only one pair of upper and lower pulses separated from each other remains in cl for the 1-bit codes. This signal cl is applied to the comparator 15 by a reference voltage Vrd which is selected to be smaller than 2Vp and equal to, for example, Vp (described in more detail later).
The voltage of cl is compared with the reference voltage V as the comparison output d.
Outputs the code "1" indicating that it is higher than rer.
In this case, 2Vp is 2 volts and Vrd is 1 volt, so it is easy to send out the comparison output d. Note that the signal cl is also used separately for timing extraction. Next, to explain the case where the signal is disconnected, if the input signal al has the characteristics described above, the input noise a2 gradually reaches the stabilizing voltage Vp with a rise time of about 1 second, and the signal Once the cut is over, it will slowly return to zero in the same way.
したがってtdだけ遅延され反転された信号b2は図に
示すようになり、このb2とblを加算すればc2に示
すように振幅Vp2が非常に小さい信号、単純な数値Z
計算によれば入力信号が断でない場合の振幅2Vp2の
4分の1の0.5ボルトの振幅を持つ信号となる。この
信号c2は比較器15で基準電圧Vrefと比較される
が、電圧VrefはVp,すなわち1ボルトに選んであ
るので、両電圧の菱は約0.5ボルJトあり、比較器1
5は信号c2が基準電圧VMよりは小さいことをあらわ
す符号“0”を出力する。したがって比較出力dの内容
を知ることにより入力信号断を容易に検出することがで
きる。Therefore, the signal b2 delayed by td and inverted becomes as shown in the figure, and by adding this b2 and bl, as shown in c2, a signal with a very small amplitude Vp2, a simple numerical value Z
According to the calculation, the signal has an amplitude of 0.5 volt, which is one-fourth of the amplitude 2Vp2 when the input signal is not interrupted. This signal c2 is compared with the reference voltage Vref in the comparator 15, but since the voltage Vref is selected to be Vp, that is, 1 volt, the rhombus of both voltages is about 0.5 volt J, and the comparator 1
5 outputs the code "0" indicating that the signal c2 is smaller than the reference voltage VM. Therefore, by knowing the content of the comparison output d, it is possible to easily detect an input signal disconnection.
なお以上において理解を易くするため特定の数値を入れ
て説明したが、これらの数値はいずれも単なる例であっ
てこれらに限定されるものでないことはいうまでもない
。例えばデューティ比は1であってもよい。又回路構成
についていえば、インバータ12は図とは異って入力信
号を遅延させない方の線路に設けてもよい。第4図は本
発明の他の実施例の構成回路を示した図であって、CA
Iは終点短絡長さLで特性インピーダンスRTの同軸ケ
ーブルであり、D,とD2はピーク検出用ダイオードで
ある。Note that although specific numerical values have been used in the explanation above to facilitate understanding, it goes without saying that these numerical values are merely examples and are not limited to these. For example, the duty ratio may be 1. Regarding the circuit configuration, the inverter 12 may be provided on the line that does not delay the input signal, unlike the figure. FIG. 4 is a diagram showing a configuration circuit of another embodiment of the present invention.
I is a coaxial cable with terminal short circuit length L and characteristic impedance RT, and D and D2 are peak detection diodes.
この同軸ケーブルにおいて終点短絡長さLは公伝達時間
がtdとなるように選んであり、第2図の回路と実質的
に同じ機能を有している。第5図は本発明による入力断
検出回路を用いたパルス光伝送用受信装置の構成の一例
をブロックで示した図である。In this coaxial cable, the terminal short circuit length L is selected so that the official transmission time is td, and it has substantially the same function as the circuit of FIG. FIG. 5 is a block diagram showing an example of the configuration of a receiving device for pulsed light transmission using the input disconnection detection circuit according to the present invention.
受信装置に入力された光信号はAPD21で電気信号に
変えられ、等化増幅回路22で所要の振幅まで増幅され
信号aとして出力される。この信号aは3方に分岐し、
その第1の信号は出力振幅検出回路23で検出され、A
PDバイアス用直流昇圧回路24を動作ごせて員帰還的
にAPDの増幅度を制御し、安定化増幅器22の出力振
幅を一定に保っている。次に第2の信号は信号断検出回
路25(第3図又は第4図の回路に相当)に入り、先に
説明したような動作によりタイミング抽出用信号ともい
うべき信号cおよび比較出力dを出力する。繰返し周期
がTである信号cはタイミング回路26に送られ、図に
は示してないが、ここで両波整流され、繰返し周波数1
/Tのフィル夕を通してクロツクeとして抽出され、識
別回路27を動作させる。比較出力dはスイッチ回路2
8に送られる。更に第3の信号はスイッチ回路28に直
接送られるが、このスイッチ回路は比較出力dが“ピー
ク振幅>Vrer”をあらわす出力、先の場合では符合
“1”、であるときは接続となり、“ピーク振幅>VM
f”をあらわす出力、先の場合では“0”、のときは断
となるような性質を持たせてあるので、入力信号aが断
であるかa2否であるかalに従って第3の信号はスイ
ッチ回路28のところで終るかこのスイッチ回路を通っ
て識別回路27に入力されるかする。識別回路はクロッ
クeで動作状態になるので、識別動作が行なわれる。以
上のようにしてパルス光伝送用受信装置の動作が行なわ
れる。上記の第5図の装置は入力信号aのパルス繰返し
周波数が400MH2に相当するものであるが、回路特
性を適当に選べば、800MHZ程度までは可能である
。すなわち本発明によればAPDから生ずる雑音の特性
と通常の信号の特性の相違を利用して十分余裕があり而
も高い周波数において動作する信号検出回路を得ること
ができる。The optical signal input to the receiving device is converted into an electrical signal by the APD 21, amplified to a required amplitude by the equalization amplifier circuit 22, and output as a signal a. This signal a branches into three directions,
The first signal is detected by the output amplitude detection circuit 23 and
By operating the PD bias DC booster circuit 24, the amplification degree of the APD is controlled in a feedback manner, and the output amplitude of the stabilizing amplifier 22 is kept constant. Next, the second signal enters the signal disconnection detection circuit 25 (corresponding to the circuit shown in FIG. 3 or 4), and by the operation described above, it generates a signal c, which can also be called a timing extraction signal, and a comparison output d. Output. The signal c with a repetition period of T is sent to the timing circuit 26, and although not shown in the figure, it is double-wave rectified here and has a repetition frequency of 1.
/T is extracted as a clock e, and the identification circuit 27 is operated. Comparison output d is switch circuit 2
Sent to 8th. Furthermore, the third signal is sent directly to the switch circuit 28, which is connected when the comparison output d is an output representing "peak amplitude>Vrer", which in the previous case is the sign "1", and " Peak amplitude > VM
Since the output representing "f", which in the previous case is "0", is set to be disconnected, the third signal is determined according to al, whether input signal a is disconnected or a2 is not. Either it ends at the switch circuit 28 or it passes through this switch circuit and is input to the identification circuit 27.The identification circuit is activated by the clock e, so the identification operation is performed. The operation of the receiving device is carried out.The device shown in Fig. 5 above corresponds to a pulse repetition frequency of 400 MHZ for the input signal a, but if the circuit characteristics are appropriately selected, it is possible to achieve a pulse repetition frequency of up to about 800 MHZ. According to the present invention, it is possible to obtain a signal detection circuit that has sufficient margin and operates at a high frequency by utilizing the difference between the characteristics of noise generated from an APD and the characteristics of a normal signal.
第1図は受信装置の入力信号が断になったときにAPD
から発生する雑音のスペクトル特性を示す図、第2図は
本発明の一実施例の回路構成をブロックであらわした図
、第3図は第2図の回路の動作を説明するためのタイム
チャート、第4図は本発明の他の実施例の回路構成をあ
らわした図、第5図は本発明による入力断検出回路を用
いたパルス光伝送用受信装置の構成の一例をブロックで
あらわした図である。
記号の説明:11は遅延回路、12は反転回路、13は
加算器、14はピーク振幅検出回路、15は比較回路、
21はアバランシ・フオトダィオード(APD)、22
は等化増幅回路、23は出力振幅検出回路、24はAP
Dバイアス用直流昇圧回路、25は信号断検出回略、2
6はタィミング回路、27は識別回路、28はスイッチ
回路をそれぞれあらわしている。
界1図
第2図
第3図
稀ム図
界5図Figure 1 shows the APD when the input signal to the receiver is cut off.
2 is a block diagram showing the circuit configuration of an embodiment of the present invention, and FIG. 3 is a time chart for explaining the operation of the circuit in FIG. 2. FIG. 4 is a diagram showing a circuit configuration of another embodiment of the present invention, and FIG. 5 is a block diagram showing an example of the configuration of a pulsed light transmission receiving device using an input disconnection detection circuit according to the present invention. be. Explanation of symbols: 11 is a delay circuit, 12 is an inversion circuit, 13 is an adder, 14 is a peak amplitude detection circuit, 15 is a comparison circuit,
21 is an avalanche photodiode (APD), 22
is an equalization amplifier circuit, 23 is an output amplitude detection circuit, and 24 is an AP
DC booster circuit for D bias, 25 is a signal disconnection detection circuit, 2
6 represents a timing circuit, 27 represents an identification circuit, and 28 represents a switch circuit. Figure 1 Figure 2 Figure 3 Figure 5
Claims (1)
として用い、前記アバランシ・フオトダイオードの増幅
度の温度などによる変化を受信増幅回路の出力の振幅を
一定にするように負帰還をかけて制御する形式のパルス
光伝送用受信装置における入力信号の断を検出する回路
において、前記出力にパルス繰返し周期に等しい遅延時
間を与える遅延回路と、遅延した出力の符号と原出力の
符号のいずれか一方を反転しこの反転した符号と他方の
符号を加算して加算信号を発生する手段と前記加算信号
の振幅のピーク値を検出するピーク振幅検出回路と、検
出した振幅のピーク値の大きさから前記入力信号の断を
検出する手段とを有することを特徴とする入力信号段検
出回路。1 A type of device in which an avalanche photodiode is used as an optical/electrical conversion element, and negative feedback is applied to control changes in the amplification degree of the avalanche photodiode due to temperature, etc., so that the amplitude of the output of the receiving amplifier circuit is constant. A circuit for detecting disconnection of an input signal in a receiver for pulsed optical transmission includes a delay circuit that gives the output a delay time equal to a pulse repetition period, and a delay circuit that inverts either the sign of the delayed output or the sign of the original output. means for generating an addition signal by adding the inverted sign and the other sign; a peak amplitude detection circuit for detecting the peak value of the amplitude of the addition signal; An input signal stage detection circuit comprising means for detecting a disconnection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55072172A JPS6041498B2 (en) | 1980-05-31 | 1980-05-31 | Input signal disconnection detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55072172A JPS6041498B2 (en) | 1980-05-31 | 1980-05-31 | Input signal disconnection detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56169443A JPS56169443A (en) | 1981-12-26 |
| JPS6041498B2 true JPS6041498B2 (en) | 1985-09-17 |
Family
ID=13481536
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55072172A Expired JPS6041498B2 (en) | 1980-05-31 | 1980-05-31 | Input signal disconnection detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6041498B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH044192U (en) * | 1990-04-26 | 1992-01-14 | ||
| JPH0443691U (en) * | 1990-08-17 | 1992-04-14 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE69932043T2 (en) * | 1999-07-02 | 2007-02-01 | Csem Centre Suisse D'electronique Et De Microtechnique S.A. | Adaptive matrix sensor and electrical circuit for this purpose |
-
1980
- 1980-05-31 JP JP55072172A patent/JPS6041498B2/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH044192U (en) * | 1990-04-26 | 1992-01-14 | ||
| JPH0443691U (en) * | 1990-08-17 | 1992-04-14 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56169443A (en) | 1981-12-26 |
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