JPS6041763B2 - small electronic equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a small electronic device capable of correcting data stored in a memory.

For example, data that is a pair of product name and unit price is useful. When data is electrically stored in a memory, there are two types of corrections: when incorrect input is noticed during registration and corrected, and when incorrectly registered data is recalled and corrected. Providing a correction key for each correction complicates the apparatus, or an unexpected correction may be made due to erroneous operation of the correction key.

A first input section for inputting information and a second input section for instructing rewriting.
an input unit having an input unit; and a first storage unit for storing the information; - storing the information input from the first input unit or the information in the first storage unit; a second storage means for visualizing the information in the second storage means; a first signal representing a state in which the information is being input to the second storage means; state storage means for storing a second signal representing a state in which information stored in the storage means is being checked; If the signal is stored, the information stored in the second storage means can be rewritten, and the second signal is stored in the state storage means in response to the instruction from the second input section. The first storage means has means for making the information stored in the first storage means rewritable when the information is stored therein.

Other objects of the present invention will become clear from the description of the embodiments given below in conjunction with the drawings.

In FIG. 1, a block diagram of one embodiment according to the invention is shown.

INPA is an input unit having an alphabet key α, a katakana key β, a write key W, a call key W1, a search key RET, etc., and generates a code signal corresponding to each key.

INPB is an input unit that has numerical keys and generates code signals corresponding to each numerical key.

DISA is a display section, which includes a display, a memory, etc., and stores and displays key information from the input section 1NPA. DISB
is a display section, which has a display, memory, etc., and an input section 1NPB
Store and display key information from.

(2) The debt suspension is a storage device in which item information from the input section 1NPA is stored as described later. MEMB is a storage device in which a plurality of numerical information from the input section 1NPA is stored as described later.

AD is an address counter that generates address information specifying the address of the storage device MEMA1.

One item information and one numerical information correspond to the above address information.

The CPU is a central processing unit that obtains key information from the input unit 1NPA via the signal line 4 and performs the following control.

When the read key R is pressed, the central processing unit CPU responds to this and sequentially applies address change commands to the address counter AD via the signal line 6, sets the flip-flop F2, and generates a signal.

The central processing unit also inputs code information corresponding to the operation keys of the input unit INP to the data control unit CONT, which will be described later.
When the search key RET is operated, the CPU issues an address change command via the signal line 6, sets the flip-flop F2, and generates a signal.

The CPU also outputs a signal to the signal line 7. Write key W
When is operated, the processing unit CPU applies an address change command to the address counter oil via the signal line 6, sets the flip-flop F3, and applies a signal to the signal line 3. When alphabet key α and katakana key β are operated, the CPU sets flip-flop F1, sends a signal to signal line 1, and presses write key W and call key R.
, when the search key RET is pressed, the flip-flop F1
Reset. CONT is a data control unit, and memory M
ll memory M2, comparison circuit CC and AND gate G5,
G6, or gate 0G1.

The data control unit CONT receives a signal from the central processing unit CPU to control the storage device MEMA. ．． Display MEMB contents in DI
SPA. ．． The code information from the input unit 1NPA is compared with the contents of the storage device MEMA. ．． The contents of MEMB are displayed on the display section DISPA. Transfer to DISPB.

KX is a correction key, and the push signal of this key is displayed on the display section DISA. ．． DIS
B or clear the memory device MEMA.B specified by the address counter. ．． Clear the contents of MEMB. The operation of the above configuration will be explained.

Storage device MEMA. When the alphabet key α or the katakana key β is operated to write key information to MEMB or to call up the contents of the storage device MEMB,
Information on the operation keys is transmitted to the central processing unit CPU via the signal line 4, and the flip-flop F1 is set.

Further, key information corresponding to the operation keys is stored in the memory of the display DISPA and displayed. In the above key operations,
When the correction key KX is operated when an erroneous key operation is performed, the signal of the correction key KX is sent to the display section DISPA. ．． A clear signal is applied to the memory in DISPB to clear the key information stored in the memory.

At this time, the central processing unit CPU then resets the flip-flop F1. Next, the storage device MEMA. is called up using the call key R1 search key RET. ．． MEM
When it is desired to correct the contents of B, for example, when the search key RET is repeatedly operated, the central processing unit CPU responds to the first key operation, resets the address counter AD to the initial state, and inputs the AND gate G5 via the signal line 7. , G6 is opened, and the storage device MEMA. ．． The stored contents are sequentially displayed on the display section D from the contents of the first address of MEMB via AND gates G5 and G6.
ISA. ．． Transfer to DISB. When the search key RET is pressed, the central processing unit CPU sets the internal flip-flop F2 and opens the AND gate G2. Therefore, when the search key RET is repeatedly operated and it is felt that the retrieved data needs to be corrected, the address counter AD has address information that requires the correction, so the correction key KX is operated. Then, press the correction key K.
The signal of X is sent to the memory device MEMA. M.E.
Applied to MB.

Therefore, the output of AND gate G2 is sent to address counter AD.
The output of clears the contents of the predetermined memory location. After the above-mentioned clear operation, new data can be input into the above-mentioned memory location by performing a predetermined key operation.

It should be noted that it is also possible to make corrections only in the display during writing and reading, and to make corrections in the storage device only during retrieval, which is easier than in the above embodiment.

Similarly, it is also extremely easy to correct one of the paired data. As described above, in the small electronic device according to the present invention, the operation of the rewriting instruction differs depending on the internal state of the device, so data is not unnecessarily corrected and information can be rewritten reliably. can do.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment according to the present invention. KX... Correction key, AD... Counter, F
l, F2, F3...Flip-flop.

Claims (1)

[Claims] 1. An input means having a first input section for inputting information and a second input section for instructing rewriting, a first storage means for storing the information, and a first input section for inputting information from the first input means. a second storage means for storing the information stored in the first storage means or the information in the first storage means; a visualization means for visualizing the information in the second storage means; and a visualization means for visualizing the information in the second storage means; a state storage means for storing a first signal representing a state in which information is being inputted and a second signal representing a state in which information stored in the first storage means is being checked; If the first signal is stored in the state storage means in response to the instruction from the second input section, the information stored in the second storage means is enabled to be rewritten; and means for making the information stored in the first storage means rewritable when the second signal is stored in the state storage means in response to the instruction.