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JPS6043682B2 - signal amplifier - Google Patents
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JPS6043682B2 - signal amplifier - Google Patents

signal amplifier

Info

Publication number
JPS6043682B2
JPS6043682B2 JP52149708A JP14970877A JPS6043682B2 JP S6043682 B2 JPS6043682 B2 JP S6043682B2 JP 52149708 A JP52149708 A JP 52149708A JP 14970877 A JP14970877 A JP 14970877A JP S6043682 B2 JPS6043682 B2 JP S6043682B2
Authority
JP
Japan
Prior art keywords
input terminal
amplifier
circuit
inverting input
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52149708A
Other languages
Japanese (ja)
Other versions
JPS5481760A (en
Inventor
隆一 喜岡
匡暢 篠田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP52149708A priority Critical patent/JPS6043682B2/en
Publication of JPS5481760A publication Critical patent/JPS5481760A/en
Publication of JPS6043682B2 publication Critical patent/JPS6043682B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181Low-frequency amplifiers, e.g. audio preamplifiers
    • H03F3/183Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
    • H03F3/187Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Multimedia (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Description

【発明の詳細な説明】 本発明は、差動増幅器を用いた信号増幅器、特に集積回
路に適した音響増幅器に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal amplifier using a differential amplifier, and in particular to an acoustic amplifier suitable for integrated circuits.

第1図は従来良く知られている差動入力音響増幅集積回
路の基本構成図で、入力信号は入力端子1を介して差動
増幅器を入力段とする増幅器12に加えられ、出力端子
2から出力を得ていた。
FIG. 1 is a basic configuration diagram of a conventionally well-known differential input acoustic amplification integrated circuit, in which an input signal is applied via input terminal 1 to an amplifier 12 whose input stage is a differential amplifier, and from output terminal 2. I was getting output.

入力端子1のバイアスは抵抗6、7のプリーダ回路によ
つて決定され、コンデンサー41は電源リップルが入力
に対して影響を与えないために設けてあるリップルフィ
ルター用外付コンデンサーである。負帰還回路は出力端
子2から抵抗9、10と外付コンデンサー11によつて
構成されている。上記の回路構成の差動入力音響増幅器
には、コンデンサー11、41が必要となる上、これら
コンデンサは交流インピーダンスを下げるためには大容
量のものが必要となり、この差動入力音響増幅器を半導
体集積回路化する場合、このコンデンサーは外付け部品
とならざるを得なかつた。本発明の目的は、コンデンサ
ー11、41を取り除くことにより、最低四端子にて集
積回路を構成できる差動増幅器を用いた信号増幅器を得
ることにある。本発明によれば、入力信号を非反転入力
端子に受ける差動入力増幅器と、この非反転入力端子に
バイアス電位を与える電源ライン間に直列接続れた複数
の抵抗と、差動入力増幅器の出力端子と反転入力端子間
に接続された帰還抵抗と、反転入力フ端子に一端が接続
された負帰還量設定用の抵抗と、非反転入力端子に与え
られるバイアス電位を入力し、出力を負帰還量設定用の
抵抗の他端に与える利得’’1’’の同相増幅器とを有
する信号増幅器を得る。
The bias of the input terminal 1 is determined by a leader circuit including resistors 6 and 7, and the capacitor 41 is an external ripple filter capacitor provided to prevent power supply ripple from affecting the input. The negative feedback circuit is constructed from the output terminal 2, resistors 9 and 10, and an external capacitor 11. The differential input acoustic amplifier with the above circuit configuration requires capacitors 11 and 41, and these capacitors must have a large capacity in order to lower the AC impedance. When creating a circuit, this capacitor had to be an external component. An object of the present invention is to obtain a signal amplifier using a differential amplifier that can configure an integrated circuit with at least four terminals by removing the capacitors 11 and 41. According to the present invention, a differential input amplifier receives an input signal at a non-inverting input terminal, a plurality of resistors are connected in series between power lines that apply a bias potential to the non-inverting input terminal, and an output of the differential input amplifier. A feedback resistor connected between the terminal and the inverting input terminal, a resistor for setting the amount of negative feedback with one end connected to the inverting input terminal, and a bias potential given to the non-inverting input terminal are input, and the output is set to negative feedback. A signal amplifier having an in-phase amplifier with a gain of ``1'' applied to the other end of the resistance for setting the quantity is obtained.

次に本発明の一実施例を第2図を用いて説明する。Next, one embodiment of the present invention will be described using FIG. 2.

第1図の差動入力音響増幅器と同じ部分は同一の参照数
字を用いてあり、差動増幅器を入力段とする音響増幅器
12の非反転入力端子には抵抗6,7の直列回路を電源
端子3と共通端子4との間に接続したプリーダ回路の中
点から抵抗8を介してバイアスが加えられるとともに入
力端子1から入力信号が加えられている。
The same reference numerals are used for the same parts as in the differential input acoustic amplifier in FIG. A bias is applied from the middle point of the reader circuit connected between 3 and the common terminal 4 via a resistor 8, and an input signal is applied from the input terminal 1.

一方、出力端子2は抵抗10を介して反非入力端子(帰
還入力端)に接続されており、この反転入力端子にはさ
らに抵抗9を介して、抵抗6,7,8の接続点の信号を
入力とする利得1倍の同相増幅器13の出力が加えられ
ている。上記の利得1倍の同相増幅器13の出力インピ
ーダンスをZOとし、抵抗9,10のそれぞれの抵抗値
をR9,RlOとすると、帰環率は(ZO+R9)/(
ZO+R9+RlO)で決定されるが、ZOはほとんど
無視出来る。
On the other hand, the output terminal 2 is connected to an inverted non-input terminal (feedback input terminal) via a resistor 10, and a signal at the connection point of the resistors 6, 7, and 8 is connected to this inverting input terminal via a resistor 9. The output of an in-phase amplifier 13 with a gain of 1 is added to the input. If the output impedance of the common-mode amplifier 13 with a gain of 1 is ZO, and the resistance values of the resistors 9 and 10 are R9 and RlO, then the return rate is (ZO+R9)/(
ZO+R9+RlO), but ZO can be almost ignored.

又R9をROだけ見込んで帰環率を決定するこも出来る
。電源リップルに対して、差動入力音響増幅器13から
受ける影響はプリーダ回路の出力端の電源リップルが入
力端子1に加わると同時に利得1倍の同相増幅器13と
抵抗9を介して負帰還入力端に加わるため、入力端子1
に現われる電源リップルは打ち消される。
It is also possible to determine the return rate by considering R9 and RO. The effect of the differential input acoustic amplifier 13 on the power supply ripple is that the power supply ripple at the output end of the leader circuit is applied to the input terminal 1, and at the same time, it is applied to the negative feedback input terminal via the common mode amplifier 13 with a gain of 1 and the resistor 9. Input terminal 1
The power supply ripple that appears in is canceled out.

そのため半導体集積回路において、外付コンデンサー1
1,41を取り去り、その代りとしてトランジスタ、抵
抗に置き換えて、集積回路化されたことは大きなメリッ
トとなる。次に第3図を用いて、本発明の具体的実施例
を述べる。
Therefore, in semiconductor integrated circuits, external capacitor 1
It is a great advantage to remove 1 and 41 and replace them with transistors and resistors to create an integrated circuit. Next, a specific embodiment of the present invention will be described using FIG.

抵抗6,7のプリーダ回路から抵抗8を介して、入力バ
イアス決定を行い、入力に差動回路21を用いその負荷
抵抗14より、極性反転のドラ.イブ用PNPトランジ
スタ24に入り、位相補償(発振防止)コンデンサー4
0をトランジスタ24のベースとコレクタ間に接続し、
終段NPNダーリントン接続トランジスタ26,27の
ベースに、ドライブ・トランジスタ24のコレクタを接
4続し、かかるトランジスタ24のコレクタからダイオ
ードチェーン35,36,37を介して、終段PNPダ
ーリントン接続トランジスタ28,29のベースに接続
され、終段はNPNとPNPトランジスタから成るコン
プリメンタリ回路となつている。トランジスタ23と抵
抗15は、差動回路の定電流源で、定電圧源(抵抗16
とダイオード33,34)より決定され、トランジスタ
25と抵抗17でアイドリング電流を決定し、ダイオー
ドチェーンは終段のバイアス回路であり、抵抗9,10
は負帰還回路で、出力端子2から抵抗10を介して差動
回路21の負帰還入力に入る。プリーダ回路(抵抗6,
7)の出力端から利得1倍の同)相増幅器差動回路22
の非反転入力端に入り、負荷抵抗19からトランジスタ
30に入り、トランジスタ30のコレクタと終段PNP
トランジスタ32のベースが接続され、トランジスタ3
0のコレクタからダイオードチェーン38,39を介し
て・終段NPNトランジスタ31のベースに接続され、
終段はNPN,.PNPトランジスタのコンプリメンタ
リ回路となり、このコンプリメンタリ回路の出力端から
差動回路の反転入力に全帰還されている。抵抗18は、
差動回路19の定電流源で、”抵抗20はアイドリング
電流の決定の定電流源で、ダイオード38,39は終段
のバイアス回路である。このように、本発明によれば電
源端子の外に入出力端子だけで負帰還回路を備えた音響
増幅器を実現でき、半導体集積回路化した時外付け素子
を必要とせず、極めて取り扱いやすい集積回路を得るこ
とができる。
An input bias is determined from a leader circuit of resistors 6 and 7 via a resistor 8, and a differential circuit 21 is used as an input, and a polarity-inverted driver. into the PNP transistor 24 for the drive, and the phase compensation (oscillation prevention) capacitor 4
0 is connected between the base and collector of the transistor 24,
The collector of the drive transistor 24 is connected to the bases of the final stage NPN Darlington connection transistors 26 and 27, and from the collector of the transistor 24, the final stage PNP Darlington connection transistor 28, The final stage is a complementary circuit consisting of NPN and PNP transistors. The transistor 23 and the resistor 15 are constant current sources of the differential circuit, and the constant voltage source (the resistor 16
and diodes 33, 34), the transistor 25 and resistor 17 determine the idling current, the diode chain is the final stage bias circuit, and the resistors 9, 10
is a negative feedback circuit, which enters the negative feedback input of the differential circuit 21 from the output terminal 2 via the resistor 10. Leader circuit (resistor 6,
7) In-phase amplifier differential circuit 22 with a gain of 1 from the output terminal of
It enters the non-inverting input terminal of
The base of transistor 32 is connected to
0 is connected to the base of the final stage NPN transistor 31 via diode chains 38 and 39,
The final stage is NPN, . This is a complementary circuit of PNP transistors, and the output terminal of this complementary circuit is fully fed back to the inverting input of the differential circuit. The resistor 18 is
In the constant current source of the differential circuit 19, the resistor 20 is a constant current source for determining the idling current, and the diodes 38 and 39 are the final stage bias circuit. An acoustic amplifier equipped with a negative feedback circuit can be realized using only input/output terminals, and when integrated into a semiconductor integrated circuit, no external elements are required, making it possible to obtain an integrated circuit that is extremely easy to handle.

また、この時半導体チップには外付け部品用の端子を必
要とせず、占有面積が小さくなるばかりでなく、容器も
四端子のもので良く、極めて安価に形成できる。その上
、半導体チップ上の電極と容器の電極とを接続するワイ
ヤーボンディングの数も少ないので信頼性、歩留り共に
良好な半導体集積回路を得ることができる。
Further, at this time, the semiconductor chip does not require terminals for external components, which not only reduces the occupied area, but also allows the container to be made with four terminals, making it extremely inexpensive to form. Furthermore, since the number of wire bondings connecting the electrodes on the semiconductor chip and the electrodes of the container is small, it is possible to obtain a semiconductor integrated circuit with good reliability and yield.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、従来の差動入力増幅器の基本回路図である。 第2図は、本発明に係る一実施例の基本回路図である。
第3図は、本発明を用いた具体的実施例の回路図である
。1・・・・・・入力端子、2・・・・・・出力端子3
・・・・・・電源端子、4・・・・・共通端子、5・・
・・・・負帰還入力端、21,22・・・・・・差動回
路、6,7,8,9,10,14,15,16,17,
18,19,20・・抵抗、11,41,40・・・・
コンデンサー、33,34,35,36,37,38,
39・・・・・・ダイオード、23,24,25,26
,27,28,29,30,31,32・・・・・・ト
ランジスタ、12・・・・・・差動入力音響増幅器、1
3・・・・・・利得1の同相増幅器。
FIG. 1 is a basic circuit diagram of a conventional differential input amplifier. FIG. 2 is a basic circuit diagram of an embodiment according to the present invention.
FIG. 3 is a circuit diagram of a specific embodiment using the present invention. 1...Input terminal, 2...Output terminal 3
...Power terminal, 4...Common terminal, 5...
... Negative feedback input terminal, 21, 22 ... Differential circuit, 6, 7, 8, 9, 10, 14, 15, 16, 17,
18, 19, 20...resistance, 11, 41, 40...
Capacitor, 33, 34, 35, 36, 37, 38,
39...Diode, 23, 24, 25, 26
, 27, 28, 29, 30, 31, 32...transistor, 12...differential input acoustic amplifier, 1
3... Common mode amplifier with a gain of 1.

Claims (1)

【特許請求の範囲】[Claims] 1 反転入力端子と非反転入力端子と出力端子とを有す
る差動入力増幅器と、電源ライン間に直列接続されて中
間接続点に前記非反転入力端子のためのバイアス電位を
得る複数の抵抗と、前記中間接続点に得られるバイアス
電位を前記非反転入力端子に加える手段と、前記出力端
子と前記反転入力端子との間に接続された第1の負帰還
用抵抗と、一端が前記反転入力端子に接続された第2の
負帰還用抵抗と、入力部に前記バイアス電位を受け、出
力部に前記第2の負帰還用抵抗の他端が接続された利得
が“1”の同相増幅器と、前記非反転入力端子に接続さ
れた信号入力端子と、前記出力端子に接続された信号出
力端子とを有することを特徴とする信号増幅器。
1. A differential input amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal; a plurality of resistors connected in series between power supply lines to obtain a bias potential for the non-inverting input terminal at an intermediate connection point; means for applying a bias potential obtained at the intermediate connection point to the non-inverting input terminal, a first negative feedback resistor connected between the output terminal and the inverting input terminal, and one end of which is connected to the inverting input terminal; a second negative feedback resistor connected to the in-phase amplifier; A signal amplifier comprising a signal input terminal connected to the non-inverting input terminal and a signal output terminal connected to the output terminal.
JP52149708A 1977-12-12 1977-12-12 signal amplifier Expired JPS6043682B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52149708A JPS6043682B2 (en) 1977-12-12 1977-12-12 signal amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52149708A JPS6043682B2 (en) 1977-12-12 1977-12-12 signal amplifier

Publications (2)

Publication Number Publication Date
JPS5481760A JPS5481760A (en) 1979-06-29
JPS6043682B2 true JPS6043682B2 (en) 1985-09-30

Family

ID=15481072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52149708A Expired JPS6043682B2 (en) 1977-12-12 1977-12-12 signal amplifier

Country Status (1)

Country Link
JP (1) JPS6043682B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5677710A (en) * 1979-11-30 1981-06-26 Chino Works Ltd Zero-point adjusting circuit
JPS58161510A (en) * 1982-03-19 1983-09-26 Matsushita Electric Ind Co Ltd amplifier circuit device
CN106301256A (en) * 2016-08-29 2017-01-04 江门市川琪科技有限公司 A kind of audio power amplifier circuit of power invariability

Also Published As

Publication number Publication date
JPS5481760A (en) 1979-06-29

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