JPS6044734B2 - Automatic gain control circuit for video signals - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic gain control circuit for video signals used in a magnetic recording/reproducing apparatus typified by a home video tape recorder.

In home video tape recorders (hereinafter referred to as VTRs), video signals are FM modulated and recorded on tape, but there are standards for frequency allocation when converting to FM signals, and in order to comply with these standards, the input video of the FM modulator is An automatic gain control circuit is provided to prevent the signal level from exceeding a certain value.

As an earlier invention related to this, JP-A No. 49-7796 &
There is Japanese Unexamined Patent Publication No. 49-126211 and U.S. Patent No. 3980816, but all of these are applicable to a synchronized signal in which the ratio of the synchronized video portion of the input end video signal deviates from the normal value of 0.3 to 0.7. There was a desire for frequency allocation to exceed standards.

The conventional problems will be explained below with reference to the drawings.

FIG. 1 is a block diagram of a conventional gain control circuit used in a VTR, and FIG. 2 shows waveforms of various parts in FIG. 1. The video signal applied to the input terminal 1 is amplified by the gain control circuit 2 and the synchronous peak is applied to the voltage V applied to the terminal 10 by the clamp circuit 3.

The waveform shown in FIG. 2A is clamped to the output terminal 4. A part of the output signal of the gain control circuit 2 is sent to the synchronous separation circuit 7.
The waveform shown in FIG. 2B is taken out and passed through the delay circuit 8 and pulse generator 9 to obtain the waveform shown in FIG. 2C. Waveform c is added to waveform A by an adder 5, resulting in a waveform as shown in FIG. 2D. The peak-to-peak amplitude of this waveform D is detected by an amplitude detector 6 and negatively fed back to the gain control circuit 2, thereby making the amplitude of the waveform D constant. The reason why a part of the output of the sync separation circuit 7 is applied to the clamp circuit 3 in FIG. 1 is because the sync pulse B is used as a key pulse to clamp the sync tip.

The problem here is that the amplitude of waveform C added to waveform A by adder 5 is constant, and the video signal level required at output terminal 4 is due to variations in the characteristics of the subsequent FM modulator. 5. It is not a constant value.

That is, in the case where a synchronized video signal is input and the sensitivity of the FM modulator is the highest, the carrier frequency of the white level will be much higher than the standard value, causing problems such as inversion during reproduction.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to provide an automatic gain control circuit designed not to exceed the FM allocation standard even when the sensitivity of the FN4 modulator increases with respect to a synchronized signal.

In the present invention, the difference between the synchronization peak potential and the pedestal potential is detected, and a pulse with an amplitude approximately (1+K.K) times this difference is added to the horizontal synchronization period with opposite polarity. The amplitude of the video signal can be kept within a certain value.

FIG. 3 is a block diagram showing one embodiment of the present invention, and FIG. 4 shows waveforms of various parts in FIG.

The differences between FIG. 3 and FIG. 1 are as follows. The operation of the clamp circuit 3 is different from that shown in FIG. 1 as a synchronous tip clamp, and in FIG. 3 as a pedestal clamp.

In FIG. 3, a differential amplifier 11 is used in place of the pulse generator 9 in FIG. 1, so that the pedestal potential is V. Waveform A in FIG. 4 is clamped to . The differential voltage C is taken out and gated by the gate 2 circuit 12 for the synchronizing signal period to create the waveform shown in FIG. 4D. As a result, the output waveform of the adder 5 is as shown in FIG. 2D in FIG. 1, whereas in FIG. 3 it is as shown in FIG. 4E.

3. That is, in FIG. 1, the pulse added from the pulse generator 9 has a constant amplitude regardless of the amplitude in FIG. 2A, whereas in FIG. A pulse with an amplitude of 0) is added to the synchronization section with opposite polarity. Therefore, the waveform in FIG. 4E is at the synchronizing signal level with respect to the pedestal potential. It can be a waveform calculated by pulses corresponding to the reference white of :. Using the present invention, the clamp circuit 3
Is the synchronization signal level relative to the pedestal regardless of the output level? ? Since the reference white pulse can be added, it is possible to keep the FM carrier frequency of the white level within the specified value without being affected by variations in the characteristics of the input voltage versus oscillation frequency of the FM modulator or synchronization compression of the input video signal. .

[Brief explanation of the drawing]

Figure 1 is a block diagram of a conventional automatic gain control circuit used in VTRs, Figure 2 is a waveform diagram of the main part of Figure 1, and Figure 3 is a block diagram of a conventional automatic gain control circuit used in VTRs.
This figure is a block diagram showing an embodiment of an automatic gain control circuit for a VTR using the present invention, and FIG. 4 is a waveform diagram of the main part of FIG. 3. 1... Video signal input terminal, 2... Gain control circuit,
3... Clamp circuit, 4... Output terminal, 5... Adder, 6... Amplitude detector, 7, 13... Synchronization separation circuit, 8... Delay circuit, 11... Differential amplifier, 12.
...Gate circuit.

Claims (1)

[Claims] 1 Synchronization between a gain control circuit to which a video signal is applied to the input terminal and the output signal of the gain control circuit A synchronization signal pulse having an amplitude approximately 3.3 times the differential voltage between the tip and the pedestal is output from the gain control circuit. An automatic for video signals, comprising a circuit for adding signals with opposite polarity, and a circuit for detecting the amplitude of the output signal of the adding circuit, and controlling the gain of the gain control circuit using the output signal of the detection circuit. Gain control circuit.