JPS6044828B2 - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPS6044828B2 JPS6044828B2 JP52157947A JP15794777A JPS6044828B2 JP S6044828 B2 JPS6044828 B2 JP S6044828B2 JP 52157947 A JP52157947 A JP 52157947A JP 15794777 A JP15794777 A JP 15794777A JP S6044828 B2 JPS6044828 B2 JP S6044828B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor device
- semiconductor
- semiconductor wafer
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
Landscapes
- Dicing (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置、特に外部接続端子配線がバンプ
形で成る構造のいわゆるバンプ型半導体装置とその製造
方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a so-called bump-type semiconductor device having a structure in which external connection terminal wiring is in the form of a bump, and a method for manufacturing the same.
従来のバンプ型半導体装置は、第3図に示すように、
バンプ電極9を有する多数の半導体素子を形成し裏面に
マウント用金属膜10を有するシリコンウェーハ基板1
を固定基板17上にはりつけ−材16ではりつけ、シリ
コンウェーハ基板1表面にスクライブキズを設けた後、
シリコンウェーハ基板1の厚さ全体に機械的分離溝を設
て、個々の半導体素子に破断分離していた。A conventional bump-type semiconductor device, as shown in FIG.
A silicon wafer substrate 1 on which a large number of semiconductor elements having bump electrodes 9 are formed and a metal film 10 for mounting on the back surface.
After gluing on the fixed substrate 17 with the material 16 and making scribe scratches on the surface of the silicon wafer substrate 1,
Mechanical separation grooves were provided throughout the thickness of the silicon wafer substrate 1 to separate the semiconductor elements into individual semiconductor elements.
このため個々の半導体素子の周縁に損傷不良18を受け
ている。このため、個片装置の外観形状不良あるいはボ
ンディング実装後のリード電極が該基板端の欠落部分て
接触して電気的回路動作不良を誘発させていた。又、別
の欠点として、上記装置の製造過程において個々の半導
体素子に破断分離前に、固定基板17にはりつけ材16
ではりつけ固定しているため、そのままの状態でバンプ
部9をボンディング実装すると、ボンディング時の熱と
圧力で個々の半導体素子間の溝をはりつけ材16がせり
上り19を生じて半導体素子表面部に到達し、ボンディ
ング実装接続不良や汚れによる電気的短絡不良を誘発さ
せていた。 本発明の目的は上記の欠点を除去し、個片
化装置基板の周縁部欠落のない半導体基板構造で且つボ
ンディング実装時にはりつけ材のせり上り不良のない製
造方法を提供することにある。 本発明のバンプ型半導
体装置は、半導体ウェハー基板の主面側から該基板厚さ
の途中厚さまで切断分離溝を設け、該ウェハー基板の所
定全領域に該分離溝を設ける工程と、粘着性はりつけシ
ートを該ウェハー基板の裏面又は両面に付着させる工程
と、該はりつけシートに固定したまま前記分離溝の基板
残り厚さをブレーキングする工程と、前記裏面はりつけ
シートに乗せたまま該個片化装置を連続的にボンディン
グ実装して該はりつけシートから離脱させる工程とを含
むことを特徴とする半導体装置の製造方法によつて製造
することができる。For this reason, damage defects 18 occur at the periphery of each semiconductor element. For this reason, the external shape of the individual device may be defective, or the lead electrode after bonding may come into contact with the missing portion of the substrate end, causing malfunction of the electrical circuit. Another drawback is that during the manufacturing process of the above device, the bonding material 16 is attached to the fixed substrate 17 before breaking and separating into individual semiconductor elements.
Since the bump part 9 is fixed by gluing, if the bump part 9 is bonded and mounted in that state, the gluing material 16 will rise up the groove between the individual semiconductor elements due to the heat and pressure during bonding, and the surface part of the semiconductor element will rise. This caused electrical short circuits due to poor bonding and mounting connections and dirt. SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks, and to provide a method for producing a semiconductor substrate structure in which there is no chipping of the peripheral edge of a singulation device board, and in which there is no rise-up defect of the gluing material during bonding mounting. The bump-type semiconductor device of the present invention includes the steps of: providing a cutting separation groove from the main surface side of a semiconductor wafer substrate to the middle of the thickness of the substrate; providing the separation groove over a predetermined entire area of the wafer substrate; and adhesive bonding. a step of attaching a sheet to the back side or both sides of the wafer substrate; a step of braking the remaining thickness of the substrate in the separation groove while being fixed to the gluing sheet; and a step of attaching the sheet to the back side gluing sheet and the singulation device. The semiconductor device can be manufactured by a method for manufacturing a semiconductor device, which includes the steps of successively bonding and mounting the semiconductor device and separating the semiconductor device from the bonding sheet.
本発明によると、その製造方法において、機械的切断を
基板途中厚さまで行い、残り厚さをブレーキング分離す
るため、例えばダイシング歯により従来のようにはりつ
け基板深くまで切り込む必要がないことから該基板端で
の欠落不良が解消でき、又はりつけ基板を必要とせず、
ブレーキングに用いたシートをそのままボンデイング工
程に移してボンデイング温度で硬化させることで粘着性
を劣化させて個々に分離ができるため、従来の欠点であ
るはりつけワツクス材等の汚染がなくなり、製品の品質
向上と製造歩留りの向上した装置になり得る。According to the present invention, in the manufacturing method, mechanical cutting is performed to the middle of the thickness of the substrate, and the remaining thickness is separated by braking, so that there is no need to cut deeply into the bonded substrate using, for example, dicing teeth as in the conventional method. Eliminates missing defects at the edges, or eliminates the need for a mounting board.
The sheet used for braking is directly transferred to the bonding process and cured at the bonding temperature, reducing its adhesiveness and allowing it to be separated individually. This eliminates the contamination of the wax material used in the past, and improves product quality. This can result in a device with improved manufacturing yield.
又完成した該種製品においても基板端に欠落部分がない
ためボンデイングリード電極が接触する不良がなくなり
製品の電気的信頼性が向上する。次に、本発明を図面を
用い、実施例により説明する。Moreover, since there is no missing part at the end of the substrate in the completed product of this kind, there is no defective contact between the bonding lead electrodes and the electrical reliability of the product is improved. Next, the present invention will be explained with reference to the drawings and examples.
尚、説明の都合上、二層配線回路構造のバンプ型半導体
装置の場合で示し、半導体基板内の素子電極の極性につ
いては省略した。第1図は本発明のバンプ型半導体装置
の1実施例の断面図である。For convenience of explanation, a case of a bump-type semiconductor device with a two-layer wiring circuit structure is shown, and the polarity of element electrodes in the semiconductor substrate is omitted. FIG. 1 is a sectional view of one embodiment of a bump-type semiconductor device of the present invention.
シリコン基板1の一主面にエピタキシヤル層2とSiO
2膜、Sl3N4膜等の絶縁膜3と拡散素子領域4を設
け、該主面へA1膜5とAl2O3膜6から成る下層配
線領域を設け、SiO2膜7で層間絶縁を施してTi−
Pt−Au膜8ふら成る上層配線領域を設け、厚いAu
膜9を設け、裏面にマウント用金属膜10例えばTiA
u,Cr−AuMO−Ni−Au等を−設ける。Epitaxial layer 2 and SiO are formed on one main surface of silicon substrate 1.
2 film, an insulating film 3 such as a Sl3N4 film, and a diffusion element region 4 are provided, a lower wiring region consisting of an A1 film 5 and an Al2O3 film 6 is provided on the main surface, interlayer insulation is provided with a SiO2 film 7, and a Ti-
An upper wiring region consisting of a Pt-Au film 8 is provided, and a thick Au
A film 9 is provided, and a metal film 10 for mounting, for example TiA, is provided on the back surface.
u, Cr-AuMO-Ni-Au, etc. are provided.
このバンプ端子型該シリコン基板1の側面部が段状構造
を有し、特に裏面部が主面部よりも突き出ていることが
特徴である。This bump terminal type silicon substrate 1 is characterized in that the side surface portions have a stepped structure, and in particular, the back surface portion protrudes more than the main surface portion.
例えばシリコン基板の厚さをちとし、該基板の裏面側の
付着金属膜を.含めた突き出し部の厚さを!、その突き
出し幅をW1とするとき、t1=−350μM,t2:
:200μM,wl+50μmの寸法で側面が段状構造
のバンプ型半導体装置を作ることができる。尚、該突き
出し部を含む側面は直立型でも傾斜型でも良く、上記T
l,・T2wlはそれぞれの実施例寸法に限定されるも
のではない。本実施例の構造によると、個片化分離に系
る装置基板周縁部での異常欠落が防げ、ボンデイング実
装時のリードと基板との電気的接触を防止させる効果が
ある。For example, the thickness of the silicon substrate is reduced, and the metal film deposited on the back side of the substrate is reduced. Including the thickness of the protruding part! , when the protrusion width is W1, t1=-350μM, t2:
:200 μM, a bump-type semiconductor device with a step-like structure on the side surface can be manufactured with dimensions of wl+50 μm. Incidentally, the side surface including the protruding portion may be of an upright type or an inclined type;
l, ·T2wl are not limited to the dimensions of each embodiment. The structure of this embodiment has the effect of preventing abnormal chipping at the peripheral edge of the device substrate associated with singulation and separation, and preventing electrical contact between the leads and the substrate during bonding mounting.
次に、本発明のバンプ型半導体装置の製造方法について
説明する。Next, a method for manufacturing a bump-type semiconductor device according to the present invention will be explained.
第2図a−eは本発明の半導体装置の1実施例の製造方
法を説明する断面図てある。FIGS. 2a to 2e are cross-sectional views illustrating a manufacturing method of one embodiment of the semiconductor device of the present invention.
シリコンウエハ一基板1の主面の絶縁膜2上にバンプ端
子配線3を施設し、裏面に所定のマウント用金属膜例え
ばMO−Ni−AulOを個片化分離・領域11に合せ
て設ける(第2図a)。Bump terminal wiring 3 is provided on the insulating film 2 on the main surface of the silicon wafer substrate 1, and a predetermined mounting metal film, such as MO-Ni-AulO, is provided on the back surface in alignment with the singulation/separation/region 11. Figure 2a).
次に、該主面の個片化分離領域11に沿つてシリコン基
板1の厚さt1の途中厚さまで切削して分離溝12を形
成させる。Next, the silicon substrate 1 is cut along the singulation separation region 11 on the main surface to a thickness halfway through the thickness t1 to form separation grooves 12.
この時ちキ350μmとするとL.::100〜150
μm位で良く、ダイシング法又はレーザースクライブ法
を用いると良い(第2図b)。続いて、分離溝12を有
する該ウエハ一基板の表面と裏面に粘着性のはりつけシ
ート13a,13bをはりつけ処理し、これに保持させ
たまま前記分離溝12尖頭部から割れ目14を入れて個
片装置に分離させる。At this time, if the width is 350 μm, L. ::100~150
It is sufficient to use a dicing method or a laser scribing method (Fig. 2b). Subsequently, adhesive gluing sheets 13a and 13b are pasted on the front and back surfaces of the wafer-substrate having the separation groove 12, and while the wafer is held thereon, a crack 14 is made from the pointed end of the separation groove 12 to separate the wafers. Separate into two pieces of equipment.
この時のはりつけシートは粘着性を有し、且つ、次工程
のボンデイング時の加熱条件で該シート材が熱硬化を生
じて該装置を離脱させ易すくすることが好ましく、例え
ば、0.3〜0.5μm位の厚いドライフイルム(デユ
ポン社製リストン膜)やシリコーン樹脂膜を5〜10p
m厚さで表面被覆したエポキシ樹脂膜であつても良い。
特徴として、柔らかい性質を有し、ウエハ一基板を個片
化装置にブレーキングさせ得られることである(第2図
c)。この状態で主面のシート材13aを剥がし取り実
装基板(リードフレーム)のリード電極15をバンプ端
子3にボンデイング実装させる。It is preferable that the bonding sheet at this time has adhesiveness, and that the sheet material is thermosetted under the heating conditions during bonding in the next step, making it easier to remove the device, for example, 0.3~ A thick dry film of about 0.5 μm (Liston film made by Dupont) or a silicone resin film of 5 to 10 p.
It may be an epoxy resin film coated on the surface with a thickness of m.
Its characteristic feature is that it has soft properties and can be obtained by braking a wafer-to-substrate singulation device (FIG. 2c). In this state, the sheet material 13a on the main surface is peeled off and the lead electrodes 15 of the mounting board (lead frame) are bonded to the bump terminals 3.
この時従来のようにワツクス材を用いていないため、は
りつけシートからのはりつけ材の汚れ、例えば、個片装
置側面をワツクスがせり上つて主面に付着する不良が解
消できる(第2図d)。最後に、ボンデイング済みのリ
ード電極15に接着したまま該個片装置を上方に引き抜
き、該操作を繰返し行つてウエハ一基板内の所定の個片
装を全て処理する(第2図e)。At this time, unlike in the past, wax material is not used, so it is possible to eliminate stains on the gluing material from the gluing sheet, such as wax rising up the side of the individual piece device and adhering to the main surface (Figure 2 d). . Finally, the individual piece device is pulled upward while still being adhered to the bonded lead electrode 15, and this operation is repeated to process all the predetermined individual pieces within one wafer substrate (FIG. 2e).
上記実施例に示したように、機械的切断を主面側から行
つても、該シリコン基板の全厚さ及び従来のように石英
板の如き硬質の固定基板を同時に切断することがないた
め切削歯の損傷が防げ、個片装置基板端部での欠落不良
を解消し、ボンデイングリードと基板部との電気的接触
を防止でき、はりつけ材としての低融点ワツクスの使用
がないので該ワツクスの汚れ防止にもなり、品質向上,
製造歩留りの向上省力化による生産性向上等を果すこと
ができる。As shown in the above embodiment, even if mechanical cutting is performed from the main surface side, the entire thickness of the silicon substrate and a hard fixed substrate such as a quartz plate as in the conventional method are not cut at the same time. Damage to the teeth can be prevented, defective defects at the edges of individual device boards can be eliminated, electrical contact between bonding leads and the board can be prevented, and low melting point wax is not used as a bonding material, so the wax can be easily contaminated. It also helps prevent, improves quality,
It is possible to improve productivity by improving manufacturing yield and saving labor.
本発明について、その構造と製法に一実施例を用いて説
明したが、半導体装置の種類、例えばMOS型、バイポ
ーラ型あるいは配線回路構造ボンデイング種類等に限定
されないものである。Although the structure and manufacturing method of the present invention have been explained using one embodiment, the present invention is not limited to the type of semiconductor device, such as MOS type, bipolar type, wired circuit structure, bonding type, etc.
第1図は本発明のバンプ型半導体装置の1実施例の断面
図、第2図a−eは本発明の半導体装置の1実施例の製
造方法を説明する断面図である。
第3図は従来のバンプ型半導体素子製造の一工程を示す
断面図である。1・・・・・シリコン基板、2・・・・
・・エピタキシヤル層、3・・・・・・SiO2又はS
i3N4膜、4・・・・・・拡散素子領域、5・・・・
・・A1配線、6・・・・・・Al.O3膜、7・・・
・・・SiO2膜、8・・・・・・Ti−Pt−Au膜
、9・・・・・・Auバンプ端子、10・・・・・・裏
面金属膜、11・・・・・・個片化分離領域、12・・
・・・・ダイング溝、13a,b・・・・・・粘着シー
ト、14・・・・・・ブレーキング部、15・・・・・
リード電極、W1・・・・・シリコン基板側面の突き出
し幅、ち・・・・・・シリコン基板の全厚さ、・・・・
・・シリコン基板の突き出し部の厚さ。FIG. 1 is a cross-sectional view of one embodiment of a bump-type semiconductor device of the present invention, and FIGS. 2 a-e are cross-sectional views illustrating a manufacturing method of one embodiment of the semiconductor device of the present invention. FIG. 3 is a cross-sectional view showing one process of manufacturing a conventional bump-type semiconductor device. 1...Silicon substrate, 2...
...Epitaxial layer, 3...SiO2 or S
i3N4 film, 4...diffusion element region, 5...
...A1 wiring, 6...Al. O3 membrane, 7...
...SiO2 film, 8...Ti-Pt-Au film, 9...Au bump terminal, 10...back metal film, 11...pieces Fragment separation area, 12...
... Dying groove, 13a, b ... Adhesive sheet, 14 ... Braking part, 15 ...
Lead electrode, W1...Protrusion width of the side of the silicon substrate,...Total thickness of the silicon substrate,...
・Thickness of the protruding part of the silicon substrate.
Claims (1)
を有する半導体素子を多数形成する工程と、前記半導体
素子間に前記半導体ウェーハの厚さより浅い分離溝を設
ける工程と、該分離溝の設けられた前記半導体ウェーハ
の表裏両面に熱硬化性を有しかつ粘着性をもつたはりつ
けシートを被覆する工程と、表裏両面にはりつけシート
を有する前記半導体ウェーハを前記分離溝の部分で破断
分離する工程と、前記破断分離後の前記半導体ウェーハ
の表面から前記はりつけシートを除去する工程と、裏面
がはりつけシートにはり付けられた前記破断分離された
前記半導体素子の前記バンプ電極に加熱しながら外部リ
ードを取り付けその後該半導体素子を前記裏面のはりつ
けリードから離脱せしめることを特徴とする半導体装置
の製造方法。1. A step of forming a large number of semiconductor elements having bump electrodes for leading out external electrodes on a semiconductor wafer, a step of providing a separation groove shallower than the thickness of the semiconductor wafer between the semiconductor elements, and a step of forming a separation groove shallower than the thickness of the semiconductor wafer between the semiconductor elements; a step of coating the front and back surfaces of the semiconductor wafer with a thermosetting and adhesive bonding sheet; a step of breaking and separating the semiconductor wafer having the bonding sheet on both the front and back surfaces at the separation groove; removing the gluing sheet from the front surface of the semiconductor wafer after the fracture separation; and attaching external leads to the bump electrodes of the fracture-separated semiconductor elements whose back surfaces are bonded to the gluing sheet while heating. A method of manufacturing a semiconductor device, characterized in that the semiconductor element is separated from the bonded leads on the back surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52157947A JPS6044828B2 (en) | 1977-12-28 | 1977-12-28 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52157947A JPS6044828B2 (en) | 1977-12-28 | 1977-12-28 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5491052A JPS5491052A (en) | 1979-07-19 |
| JPS6044828B2 true JPS6044828B2 (en) | 1985-10-05 |
Family
ID=15660938
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52157947A Expired JPS6044828B2 (en) | 1977-12-28 | 1977-12-28 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6044828B2 (en) |
-
1977
- 1977-12-28 JP JP52157947A patent/JPS6044828B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5491052A (en) | 1979-07-19 |
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