JPS6046906B2 - Baud rate remote setting method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a baud rate remote setting system, and more particularly to a baud rate remote setting system that enables setting of various baud rates of a data line from a remote station in a data transmission system.

In general, the speed of a data line, that is, the baud rate, depends on the characteristics of the line and the terminal equipment connected, for example, 9600 baud, 4800 baud, 2400 baud, etc.
Various values are taken.

Changing this baud rate is necessary, for example, in the following cases. In the remote use of electronic computers in laboratories, etc., there are terminal devices as multiple input/output devices, such as experimental data collection devices using keyboard printers and A/D converters.
For example, by using 00 baud to start a job, etc., and later reconnecting the connector, the above-mentioned experimental data collection device is used at 9600 baud, for example, to collect data online. In conventional data transmission equipment, such as modem equipment (MODEM), the speed of the data line is unique to the equipment and cannot be changed, and even if it can be set to various speeds, the data transmission equipment on the sending side and the receiving side In both types of data transmission equipment, it was common that settings had to be made manually using a setting switch or the like.

Therefore, even if the above-mentioned request for changing the baud rate can be satisfied, there are drawbacks such as being complicated and time-consuming. An object of the present invention is to provide a system for remotely setting the baud rate of a terminal-side slave station, which is a receiving side, from a center-side master station, which is a transmitting side, for example, in order to eliminate the above-mentioned complication of baud rate setting.

To this end, the baud rate remote setting method of the present invention includes a transmitting section and a receiving section that are connected to each other via a data transmission path and set at a transmission rate of 48KH2XN (N is an integer) on the data transmission path. In a data transmission system configured such that a clock oscillation source is provided on the transmitter side, and a clock extracted from the data transmission path is frequency-divided and used as a data line clock on the receiver side,
The transmitter side is provided with a processor that time-division multiplexes the data to be transmitted and the speed setting signal and sends it to the receiver, and the receiver side separates the speed setting signal and latches it once. The present invention is characterized in that a processing section is provided that changes the frequency division ratio of the extracted clock based on the output of the latch, and the baud rate on the receiving section side is remotely set from the transmitting section side. This will be explained below with reference to the drawings.
FIG. 1 shows an embodiment of the present invention in one direction only;
FIG. 2 shows a time chart in one embodiment of the present invention, in particular, A shows a time chart on the transmitting side, and B shows a time chart on the receiving side.

In the figure, 1 is a transmitting section, 2 is a receiving section, 3 is a basic clock generation circuit, 4 is a frequency dividing circuit, 5 is a data rate conversion circuit, 6 is a multiplexing circuit, 7 is a data transmission path, and 8 is a basic clock extraction circuit. 9 is a frame synchronization circuit, 10 is a speed setting signal latch circuit, 11 is a data speed conversion circuit, 12 is a frequency dividing circuit,
13 represents a speed setting signal terminal. On the side of the transmitter 1 shown in FIG. 1, the basic clock generation circuit 3 generates a clock signal of MxN.

Here, N is an integer, and usually takes a value such as N=1 or N=2. However, the N=1 field does not have the time redundancy to support a baud rate of 48K baud, so it can only support a baud rate smaller than that. The frequency divider circuit 4 divides the clock signal supplied from the basic clock generation circuit 3 by setting the frequency division ratio according to the speed setting signal supplied via the speed setting terminal 13, and divides the clock signal as shown in FIG. 2b. Generate a sampling clock for the transmitted data, such as: The data rate converting circuit 5 receives the transmitted data at the sampling timing determined by the sampling clock and converts the rate into burst data as shown in FIG. 2c. Of course, the transmission data is sent at a speed of 48K baud x N or less, that is, 48 (K baud) x N-M (M is an integer), and is converted to a speed of 48K baud x N. Therefore, the data rate conversion circuit 5 has a storage mechanism. The multiplexing circuit 6 time-division multiplexes the speed setting signal and the burst data outputted from the data rate conversion circuit 5, and uses the 48KHzXN clock outputted from the basic clock generation circuit 3 as shown in FIG. 2d. Data transmission line 7 outputs something like
It is sent to the receiving section 2 via the. On the other hand, receiving section 2
On the side, a basic clock is extracted from the received data by a basic clock extracting circuit 8 constituted by a PLL circuit or the like, and a frame synchronization circuit 9 performs frame synchronization.

By controlling this synchronization timing, that is, the timing shown in FIG. 2e for the speed setting signal and the timing shown in FIG. 2f for data,
The received data is separated into one speed setting signal and one data. The separated one speed setting signal and one data are latched and stored in separate memories, that is, a speed setting signal latch circuit 10 and a data rate conversion circuit 11, respectively. Further, the frequency dividing circuit 12 divides the basic clock extracted by the basic clock extraction circuit 8 using a frequency division ratio based on the information of the speed setting signal latched by the speed setting signal latch circuit 10. . The output of the frequency dividing circuit 12 obtained in this way has the same frequency as the sampling clock on the transmitter side. The output of this frequency dividing circuit 12 is as shown in FIG. 2, so this is used as the reception data timing.
sampling clock. By performing the processing as described above, input transmission data from, for example, a host computer on the transmitting section 1 side can be reproduced at an appropriate baud rate on the receiving section 2 side. As explained above, according to the present invention, the actual transmission speed on the data transmission path is 48K) (despite the ZXN, the transmission speed on the actual data transmission path is 48K) (despite the Bo x N-M
It becomes possible to send and receive data at any baud rate.

Furthermore, by setting the rebaud rate using a switch or the like on the transmitter side, it is possible to set the baud rate on the receiver side, which is a remote station. Therefore, conventionally, when reconnecting terminal devices operating at different baud rates at a remote station, for example, it was a cumbersome process that required setting switches on each data transmission device on the sending and receiving sides to be operated at the same time. Not only can the settings be made in the same place, the number of erroneous settings can be reduced, and data loss due to erroneous settings can also be reduced. In addition, the speed setting signal to the data transmission device on the transmitter side can be generated, for example, by program control by a computer connected to the transmitter side, without manual switching. In some cases, the settings can be set completely automatically, which is very effective.

Further, each circuit constituting the processing section of the present invention can be designed based on existing basic circuits that are inexpensive due to mass production effects, making it extremely economical.

[Brief explanation of drawings]

FIG. 1 shows the configuration of one embodiment of the present invention, and FIG. 2 shows a time chart in one embodiment of the present invention.

Claims (1)

[Claims] 1 A transmitting section and a receiving section are connected to each other via a data transmission path, and the transmission speed on the data transmission path is set to 48 KHz x N (N is an integer), and a clock oscillation source is provided on the transmitting section side. In a data transmission system configured such that the receiving section divides the frequency of the clock extracted from the data transmission line and uses it as a clock for the data line, the transmitting section receives the data and speed to be transmitted. A processing section is provided which time-division multiplexes the speed setting signal and sends it to the receiving section, and the receiving section separates and latches the speed setting signal, and uses the output of the latch to determine the frequency division ratio of the extracted clock. 1. A baud rate remote setting method, comprising: a processing unit for changing the baud rate, and configured to remotely set a baud rate from the transmitting unit side to the receiving unit side.