JPS6048769B2 - Loading method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a loading method used when loading externally provided microprogram information into a rewritable control storage unit.

Conventionally, when writing microprogram information stored on a floppy disk, magnetic tape, card, or other external storage medium to a rewritable control storage section, a circuit dedicated to this writing or a circuit provided for diagnosis has been used. A parity circuit was provided on the data bus for writing, and the written firmware data was guaranteed by this parity check. Furthermore, when reading the firmware data loaded into the control memory, an error detection and correction circuit performs error checking and correction of 1-bit errors based on the error correction code attached to the read data (1 microinstruction). Conventionally, when writing data from an external storage medium to a control storage unit, specific writing hardware including an error check mechanism is required. Write error detection is not performed for even-numbered bit errors, and the error is detected for the first time during the read operation of the control storage section, resulting in the inconvenience that the system goes down due to this error detection.
The present invention has been made in view of the above circumstances, and includes an error correction code and an error detection code attached to a microinstruction provided when reading the control storage section when microprogram information given from the outside is written to the control storage section. The configuration effectively utilizes the correction circuit to detect and correct errors in data written to the control storage unit, thereby simplifying the hardware and reducing costs associated with this, as well as improving reliability and The purpose is to provide a loading method that can improve system operating efficiency.

An embodiment of the present invention will be described below with reference to the drawings. In the figure, 101 is a rewritable control storage unit that stores microprogram information such as microprograms and microdiagnosis programs, and 102 is a control storage unit that stores microprogram information including error correction bit information read from an external storage medium. a control unit for controlling writing to 101;
103 is a decoder for decoding the control signal from the control unit 102; 104 is a microinstruction with an error correction code read from the control storage unit 101 or received by the control unit 102 based on the output of the decoder 103; A selector 105 for selectively outputting and controlling microinstructions with error correction codes is a microinstruction register that temporarily stores microinstructions with error correction codes selected by the selector 104. 106 is the error correction code stored in this microinstruction register 105 and the microinstruction register 105. ECC (E
ckingandC0rrecti0n) circuit,
A check bit generation circuit 107 that generates check bits from microinstruction data excluding error correction codes; a syndrome generation circuit 108 that generates a syndrome from the check bits generated by this check bit generation circuit 107 and the microinstruction; Generation circuit 10
A correction 3-bit generation circuit 109 that obtains correction bit information from the syndrome generated in step 8; an error correction circuit 110 that corrects error bits based on the correction bit information obtained from the correction bit generation circuit 109; It is composed of an error detection circuit 111 and the like.

Reference numeral 112 denotes a selector that selectively controls the output of the microinstruction stored in the microinstruction register 105 or the microinstruction corrected by the error correction circuit 110 based on the determination output of the error detection output circuit 111. The microinstruction selected by this selector 112 is then stored in the control storage unit 1.
When writing to 01, the data is sent to the input section of the control storage section 101, and when reading normally after the writing is completed, it is sent to a logic circuit group or CPU (central processing unit) under microprogram control. Furthermore, the error signal (ErrOr) output from the error detection circuit 111 is sent to the control section 102.
, the CPU, etc. The effect will be explained here.

When loading a microprogram into the control storage unit 101, when the microinstruction words with error correction bits stored in the external storage medium are read into the control unit 102 in units of word length, the control unit 102 reads A control signal is output to send this microinstruction to the microinstruction register 105, and the one-word length microinstruction read into the control unit 102 is set in the microinstruction register 105 based on this control signal. That is, each time the control unit 102 reads one word of a microinstruction from an external storage medium, it outputs a control signal for loading this microinstruction into the microinstruction register 105, and the output from the decoder 103 is based on this control signal. Accordingly, the selector 104 selects and outputs the output data from the control unit 102, that is, the microinstruction. As a result, the microinstruction in units of one word length read into the control unit 102 is stored in the microinstruction register 105. The microinstruction stored in the microinstruction register 105 is input to the check bit generation circuit 107 and the syndrome generation circuit 108 of the ECC circuits 1 to 6, and the syndrome generation circuit 108 generates a syndrome. Furthermore, this syndrome is caused by the correction bit generation circuit 109.
The signal is then sent to the error detection circuit 111, where error detection and correction bit detection operations are performed. That is, the error detection circuit 111 determines whether there is no error, a 1-bit error, or an error of 2 or more bits, and the correction bit generation circuit 10
At step 9, the bit position to be corrected is detected. Therefore, when a 1-bit error occurs, the correction bit generation circuit 109
Based on the output from the error correction circuit 110, error bits are corrected (inversion of ``1'' and ``0'').
Furthermore, when this 1-bit error occurs, the selector 112 selectively outputs the error-corrected microinstruction word based on the error signal from the error detection circuit 111. A microinstruction word is stored in the control storage unit 101 based on a write control signal from the control unit 102. Further, when no error is detected by the ECC circuit 106, the selector 112 selects and outputs the microinstruction word stored in the microinstruction register 105, and this microinstruction word is sent to the control unit 10.
The data is stored in the control storage unit 101 based on the write control signal from 2. Further, when an error of 2 bits or more is detected in the ECC circuit 106, this error state is detected by the control unit 102,
The PU etc. are notified and the microprogram loading to the control storage unit 101 is interrupted. In this way, the control storage unit 101
When loading a microprogram into the control storage unit 101, a microinstruction word to be stored in the control storage unit 101 is loaded into the ECC circuit 10 using an error correction code included in the microinstruction word.
After error detection and correction are performed in step 6, the data are sequentially stored in the control storage unit 101.

Further, during a normal microprogram reading operation after a predetermined microprogram load into the control storage unit 101 is completed, the selector 104 selects and outputs the microinstruction word read from the control storage unit 101. The microinstruction word read from the control storage unit 101 is stored in the microinstruction register 105 via the selector 104.

Further, the microinstruction word stored in the microinstruction register 105 is sent to the ECC circuit 106, where error detection and correction operations similar to those performed when loading the microprogram into the control storage section 101 described above are performed. When the ECC circuit 106 does not detect an error bit or when a 1-bit error is corrected, the microinstruction word after error correction is detected by the microprogram control logic circuit group or the CPU. etc., and the operation according to the microinstruction is executed. Furthermore, when an error of two or more bits is detected in the ECC circuit 106, the processing operation is interrupted to prevent malfunction. In the above embodiment, when loading the microprogram into the control storage unit 101, the EC
When a 1-bit error is detected in the C circuit 106, the error bit is corrected and then stored in the control storage unit 101. However, the present invention is not limited to this. For example, when a 1-bit error is detected, the error bit may be corrected. Instead, the microinstruction word with the 1-bit error may be stored in the control storage unit 101 as it is in the same manner as when no error is detected, and corrected by the ECC circuit 106 during reading.

As described in detail above, according to the present invention, when microprogram information is loaded into the control storage section, the microinstruction word to be stored in the control storage section is corrected by using the error correction code contained in the microinstruction word. By having a configuration in which errors are detected in the detection and correction circuit and then sequentially stored in the control storage section, highly reliable microprogram information loading can be performed with a simple and inexpensive configuration without adding a parity circuit. A loading method that can improve system operating efficiency can be provided.

[Brief explanation of the drawing]

The figure is a block diagram showing one embodiment of the present invention. 101... Control storage unit, 102... Control unit, 1F03... Decoder, 104, 112
... Selector, 105 ... Micro instruction register, 106 ... ECC circuit.

Claims (1)

[Claims] 1. A rewritable control storage section that stores microprogram information with an error correction code, a microinstruction register that temporarily stores microinstructions with an error correction code read from the control storage section, and a microinstruction register that stores microinstructions with an error correction code that are read from the control storage section. an error detection and correction circuit that detects and corrects errors in microinstructions that have been received based on error correction codes attached to the microinstructions; and controls to store microinstructions with error correction codes given from an external device in the control storage unit. an external device comprising a control section and a selection circuit for selecting which microinstruction should be stored in the microinstruction register from among the microinstructions received by the control section and the microinstructions read from the control storage section; A loading method characterized in that a microinstruction with an error correction code given by the microinstruction is written in the control storage unit after error detection and correction is performed by the error detection and correction circuit.