JPS6048786B2 - Signal input/output method for digital signal processing system - Google Patents

Description

Detailed Description of the Invention (1) Technical Field of the Invention The present invention relates to a general-purpose digital signal processing (DSP) system using a microprocessor, in which data is transferred between signal processing systems by instructions between each processing system. This paper relates to a signal input/output method for digital signal processing systems made possible by

(2) Problems with conventional technology Digital signal processing (D
In the SP) system, the data between the signal processing systems is
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For example, in the block diagram shown in Figure 1, the right side of the broken line is D.
The inside of the SP is shown, and the left side of the broken line shows the outside of the DSP.
Consider the case where data stored in a memory element (memory cell) inside a DSP is taken out to the outside of the DSP. When data is to be stored in a memory cell of the memory device MM, the address of the memory cell of the memory device MM is input into the input address register IAR, and the data to be stored is once input into the input data register IDR from outside the DSP. The switching of the changeover switch 4 and @ operates so that predetermined data can be selectively used in two registers. With the changeover switch Θ in the illustrated position, a storage operation is performed in a predetermined cell of the storage device MM under the control of the internal processing circuit MPU. Next, when the stored data is read out and sent to another location by access from outside the DSP, when an output request signal is input, the internal processing circuit MPU decodes it, and normally the specified data of the storage device MM is stored under program control. An address is generated, the changeover switch Θ is set to the opposite side as shown, and the memory device MM is read out, and data is stored in the output data register CDR. The device address outside the DSP to which data should be sent is stored in the output address register OAR. The address is input from outside the DSP or into the DSP in advance in the form of input data by command designation, etc., and is stored in the storage device MM. The address and data stored in each register are taken out and sent to the outside of the DSP. In the conventional signal input/output method described above, when the data is stored in the memory device MM and is to be output, it is complicated to generate a read address for specifying the address of the memory cell. Naturally, it was necessary to use a special access command to perform this processing.

(3) Purpose of the invention The purpose of the present invention is to improve the above-mentioned drawbacks,
It is an object of the present invention to provide a signal input method that enables inter-system data transfer in a DSP system by instructions between the systems even if input in the same format as a normal system input signal.

(4) Structure of the Invention The structure of the present invention includes means for inputting a data signal to be input and an address signal specifying a memory cell storing the input data signal, and a means for inputting a data signal to be output and an address signal for specifying a memory cell storing the input data signal, Outside the processing system. In a signal input/output method of a digital signal processing system having a means for outputting an address signal specifying a memory cell to be stored, when a signal in a predetermined format is input as an input address signal, the address signal indicates The content of the memory cell at the address is processed as an output data signal (and the input data signal or a signal obtained by updating a part of the input data signal is processed as the output address signal).

(5) Examples of the invention Embodiments of the present invention shown in the drawings will be described below.

FIG. 2 is a block diagram showing one embodiment of the present invention, and the same reference numerals as in FIG. 1 indicate the same elements. The input signal input to the input address register U uses the same input procedure and format as the input procedure during normal data storage. For example, a specific bit of the input address register IAR is assigned in advance as an operation identification bit of the present invention, and when the operation is data reading rather than data storage, the specific bit of the input signal is set to a predetermined value and input. Input to address register IAR and set register specific bit. Internal processing circuit ■When Kawa recognizes the setting status of the identification bit, the changeover switch Θ is left as it is,
Data is read from the memory device MM using the address stored in the input address register IAR. The read data becomes output data and is stored in the output data register 0DR. On the other hand, as an input signal, the address of the location where the read data is to be transferred is transferred from the input data register IDR to the changeover switch O to the output data register ODR. At this time, is the internal processing circuit MPU a selector switch? Switch in the opposite direction as shown. Therefore, the data stored internally can be used as output data using the same procedure as that for storing data internally, and data can be arbitrarily transferred between processing systems. In Figure 2, the input and output address registers are drawn separately, but it is also possible to share one register in time division, and if the format is to apply input signals to the processing system in parallel, even if the registers are not needed. good.

Further, the output address signal may be an output address signal using all predetermined bits from the input data signal, or a signal obtained by updating predetermined bits may be used as an output address signal. 6) Effects of the Invention In this way, according to the present invention, the circuit has a simple configuration, and an output address signal is applied from the outside in the same procedure as when writing to a storage device, and data is read from the storage device and transferred. It is possible to obtain an output that is unified with the signal that is spontaneously output from inside.

Furthermore, when processing systems having the same configuration are placed opposite each other, data can be easily exchanged using the same procedure. Brief Explanation of the Four Sides FIG. 1 shows the conventional structure, and FIG. 2 shows the structure of the embodiment of the present invention.

IAR...Input address register, IDR...
····input? - data register, MM...storage device, MCU...J section processing circuit, CAR...
...Output address register j)0DR...Output data register.

Claims (1)

[Claims] 1. Means for inputting a data signal to be input and an address signal specifying a memory cell in which the input data signal is stored, and a means for specifying a data signal to be output and a memory cell in which the output data signal is stored outside the processing system. In a signal input/output method of a digital signal processing system having means for outputting an address signal, when a signal in a predetermined format is input as an input address signal, the contents of the memory cell at the address indicated by the address signal are output. A signal input/output method for a digital signal processing system, which processes an input data signal or a signal obtained by updating a part of the input data signal as an output address signal as well as a data signal.