JPS6050334B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electrode structure of a semiconductor device, particularly a semiconductor device using a film carrier mounting method.

A film carrier mounting type semiconductor device is a semiconductor device having a metal protruding electrode and directly welding the electrode to a lead wire wired on a film for electrical and mechanical connection. The steps up to forming a conventional metal protrusion electrode will be explained with reference to FIG. As shown in FIG. 1, an oxide layer 3 is formed on the surface of a semiconductor substrate 1 on which a diffusion region 2 for taking out an electrode of a semiconductor element is formed, except for a portion that makes contact with the semiconductor element, and then an Al wiring 4 is formed. After forming the Al
A CVD (vapor phase growth) oxide film 6 is formed on the wiring 4, and then a barrier metal 7 consisting of a Cr layer and a Cu layer is sequentially deposited.
After forming a metal protrusion electrode 5 made of Au using Cr)Cu as an electrode and a photoresist as a mask,
The CrNCu (barrier metal) layer 7 is selectively etched using the photoresist as a mask. In this way the first
The semiconductor device shown in the figure is formed. FIG. 2 shows a portion of the electrode extraction diffusion region 2 and metal protrusion electrode 5 of the semiconductor element, that is, a schematic plan pattern of FIG. 1.

Al in the diffusion region 2 of the semiconductor element and the opening 13 of the oxide layer 3
Ohmic contact is made with the wiring pattern 4, and the Al wiring pattern 4 is connected to the Cr)Cu barrier metal pattern through the opening 16 of the CVD oxide film 6. A metal protrusion electrode 5 made of Au is formed thereon. By the way, the present inventors studied this structure and found that pinholes and cracks are likely to occur in the CVD oxide film 6 on the Al wiring pattern 4, and 19 cracks were found in the Al wiring pattern 4 and the CVD oxide film 6 on top. If there is, CrN
When selectively etching the Cu (barrier metal) layer 7, the relatively corrosive etching solution (for example, potassium ferricyanide:sodium hydroxide 3:1) is C
It has been found that the VD penetrates through the crack 19 in the oxide layer 6 and corrodes the amphoteric metal Al5, causing the Al wiring pattern 4 to break and become defective as shown at 20 in the worst case.

Therefore, in the structures shown in FIGS. 1 and 2, a decrease in yield due to this N corrosion has been a problem. Therefore, the present invention is directed to the above-mentioned Cr, . When the Cu (barrier metal) layer is selectively etched, the pattern of the barrier metal layer is left covering the AI wiring pattern 4, which is the wiring pattern, to prevent cracks in the CCVD oxide film 6. This prevents the etching solution from entering through the N wiring pattern 19, thereby preventing defects due to disconnection of the N wiring pattern 4 as described above.

Structural cross-sectional views of the manufacturing process of a semiconductor device according to an embodiment of the present invention are shown in FIGS. 3a to 3d, and a plan view thereof is shown in FIG.

Components in FIGS. 3 and 4 that are the same as those in FIGS. 1 and 2 are given the same reference numerals. As shown in Figure 3, n-type or p-type Si
A semiconductor element diffusion region 2 is formed on the main surface of a semiconductor substrate 1, and a first insulating layer (for example, an SjO2 layer) 3 is formed by high-temperature oxidation (at 1100°C in an oxygen atmosphere) to form an electrode of the semiconductor element. After forming the extraction opening 13, an Al layer of 0.8 μm is formed over the entire main surface of the semiconductor substrate 1 by electron beam evaporation or resistance heating evaporation.

Then, an N wiring pattern 4 is formed extending from the region 2 onto the first insulating layer 3 and connected to the diffusion region 2 through the electrode extraction opening 13 and extending onto the first oxide layer 3 .
Next, after sintering for three minutes at 500°C in a nitrogen atmosphere to form an ohmic contact between the diffusion layer 2 and the N wiring,
A second insulating layer (CVDSiO2) 6 formed by thermally decomposing SlH4 with 02 at a substrate temperature of 450 DEG C. is deposited to a thickness of 0.9 .mu.m on the semiconductor substrate. Next, Cr-
An opening 1 is made in the CVDSjO2 layer 6 on the A1 wiring in order to make contact between the Cu (barrier metal) layer and the A1 wiring.
form 6. Next, a Cr layer with a thickness of 1,000 A1 is applied to the entire surface by electron beam evaporation or resistance heating evaporation, followed by a Cu layer of 5,000 A in thickness.
A barrier metal layer 7'' is formed by evaporating A, and this Cr-C
The u (barrier metal) layer 7 is formed by forming a photoresist pattern 8 having an opening into which the opening 16 of the AO and CVDSiO2 layer 6 is inserted, which is used as a plating electrode, and then using the barrier metal layer 7'' as an electrode. Au plating is performed using the photoresist pattern 8 as a mask. 4 Metal protruding electrodes 5
Next, the photoresist pattern 8 is removed, and a photoresist pattern 9 that includes the N wiring pattern 4 and has the same shape as the pattern 4 or is larger than the pattern 4 is used to form the metal protrusion electrode 5 and the Cr-Cu ( Barrier metal) layer 7'' is masked C, Cu layer is ferrous chloride, Cr.
The layer is selectively etched with a mixture of potassium ferricyanide and sodium hydroxide.The electrode structure shown in FIG. 3d can thus be obtained.

According to the structure of the present invention, the barrier metal layer 7'' almost completely covers the A1 wiring pattern 4;
Even if there is a crack in the CVDSiO2 layer 6 on the acid line 4,
There is no possibility that an etching solution such as sodium hydroxide will enter and break the N wiring 4. Furthermore, Figure 3 d
Now, connect the A1 wiring 4 through the crack in the CVDSiO2 layer 6.
Even if the barrier metal layer 7'' is connected to the barrier metal layer 7'', the series resistance of the electrode metal only decreases, and no problem occurs in the circuit.Also, in the present invention, a Cr..Cu layer is used as the barrier metal, but in addition, a Ni. It goes without saying that the same effect can be obtained with a barrier metal layer such as .Ti..Pt..Au or a combination thereof.As described above, according to the present invention, the barrier metal layer can be etched by the etching solution. In this case, since the wiring such as A1 is not etched, the yield due to disconnection of the wiring can be significantly improved, and an excellent effect is exhibited in the manufacture of semiconductor devices having metal protruding electrodes.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a conventional semiconductor device having metal protruding electrodes, FIG. 2 is a schematic plan view of its main parts, and FIG. 3 is a-
d is a cross-sectional view of the manufacturing process of a semiconductor device according to an embodiment of the present invention, and FIG. 4 is a plan view of the embodiment. 1... Semiconductor substrate, 2... Diffusion region,
4...N wiring pattern, 3...First insulating layer, 13...Opening, 5...Metal protrusion electrode, 6...Nth 2 insulating layer, 16... opening, 7''... barrier metal layer.

Claims (1)

[Claims] 1. an electrode extraction impurity region selectively formed on a semiconductor substrate; a first insulating layer formed on the surface of the substrate and having a first opening above the impurity region; A first electrode wiring formed on the first opening and in contact with the impurity region at the first opening; and a first electrode wiring formed on the first insulating film and the first electrode wiring; a second insulating layer having a second opening on the first electrode wiring; a barrier metal layer deposited to substantially cover the pattern of the first electrode wiring; and a barrier in the second opening. A semiconductor device comprising a metal protrusion electrode formed on a metal layer.