JPS6050352B2 - semiconductor equipment - Google Patents
semiconductor equipmentInfo
- Publication number
- JPS6050352B2 JPS6050352B2 JP55110505A JP11050580A JPS6050352B2 JP S6050352 B2 JPS6050352 B2 JP S6050352B2 JP 55110505 A JP55110505 A JP 55110505A JP 11050580 A JP11050580 A JP 11050580A JP S6050352 B2 JPS6050352 B2 JP S6050352B2
- Authority
- JP
- Japan
- Prior art keywords
- envelope
- electrodes
- cap
- semiconductor device
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
この発明は３つ以上の外部引出し電極を必要とする半導
体装置に関するものてある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device that requires three or more external lead electrodes.
従来、３電極を有する半導体装置としては電極をリード
線によつて外囲器から外部へ引出すものが一般的であり
、この半導体装置を電子機器に組込む際には、一般にプ
リント基板の取付け穴にリード電極を挿入してはんた付
け等により接着する方法が採られていた。Conventionally, it has been common for semiconductor devices with three electrodes to lead the electrodes out from the envelope using lead wires, and when this semiconductor device is incorporated into electronic equipment, it is generally necessary to connect the electrodes to the mounting holes of the printed circuit board. The method used was to insert lead electrodes and adhere them by soldering or the like.
しかしながら、新しい電子機器の組立て方法として、電
子機器をプリント基板上の電極に位置決めし、リード線
を用いすに直接接着する方法が用いられるようになつて
来ている。However, as a new method for assembling electronic devices, a method is being used in which the electronic devices are positioned on electrodes on a printed circuit board and directly bonded to the board using lead wires.
この方法によるときは、組立て工程が簡略化てきると共
に細線ホンディングを使わないため信頼性が著しく向上
し、また組立工程の自動化が容易である等の利点を有す
る。この発明の目的は、リード線を用いることなしに外
部回路に接着することが可能な３つ以上の電極を有する
半導体装置を提供することにある。This method has advantages such as the assembly process is simplified, reliability is significantly improved because thin wire bonding is not used, and the assembly process can be easily automated. An object of the present invention is to provide a semiconductor device having three or more electrodes that can be bonded to an external circuit without using lead wires.
このような目的を達成するためにこの発明による半導体
装置は、柱状の外囲器の両端にそれぞれキャップ状の電
極を装着し、これらのキャップ状電極にそれぞれ第１お
よび第２の外部引出し電極”を接続し、かつ第３番目以
降の電極を外囲器の中央部からそれぞれに引出して該外
囲器の周囲に帯状に巻きつけたものである。以下、図面
を用いてこの発明による半導体装置を詳細に説明する。
図はこの発明による半導体装置をトランジスタ装置に適
用した場合の一実施例を示す斜視図である。同図ｃにお
いてトランジスタ装置１は円筒状の外囲器２を有し、そ
の両端部にはそれぞれ第１の外部引出し電極３およ第２
の外部引出し電極４が接続された第１および第２のキャ
ップ状電極５、６が嵌められている。またこの外囲器２
の長手方向中央部の外周面を第３の外部引出し電極７が
帯状に取り巻いている。このような構成を有するトラン
ジスタ装置を製造する場合、同図ａに示すように、トラ
ンジスタチップ８を第３の外部引出し電極にボンディン
グし、かつ第１および第２の外部引出し電極３、４とリ
ード線９、１０によつて電気的に接続する。次いでこの
トランジスタチップ８を円筒形に樹脂封止して外囲器２
を形成する。この外囲器２の長手方向中央部の外周面に
は帯状の条溝２ａが設けられている。次いで外囲器２の
両端部に第１および第２のキャップ状電極５，６を嵌め
込む。この第１および第２のキャップ状電極５，６に該
第１および第２の外部引出し電極３，４をはんだによつ
て接続し、第３の外部引出し電極７を外囲器２の外周面
に設けられた前記条溝２ａに沿つて巻きつける。こ場合
、両キャップ状電極５，６の側面と第３の外部引出し電
極７の外周面とはほぼ同一平面上に並設された態となる
。このようにトランジスタ装置１の３つの電極を、外囲
器２の両端部にかぶせたキャップ状電極５，６およよび
外囲器に巻きつけた帯状の電極の形て該外囲器２から外
部に取り出しているため、これらの電極配置に係合する
ように設けられた外部回路の接続端子に直接接続するこ
とが可能となる。In order to achieve such an object, the semiconductor device according to the present invention has cap-shaped electrodes attached to both ends of a columnar envelope, and first and second external lead-out electrodes are attached to these cap-shaped electrodes, respectively. The third and subsequent electrodes are respectively drawn out from the center of the envelope and wound around the envelope in a band shape.Hereinafter, referring to the drawings, a semiconductor device according to the present invention will be described. will be explained in detail.
The figure is a perspective view showing an embodiment in which the semiconductor device according to the present invention is applied to a transistor device. In the figure c, the transistor device 1 has a cylindrical envelope 2, and a first external extraction electrode 3 and a second external extraction electrode 3 are provided at both ends of the envelope 2, respectively.
First and second cap-shaped electrodes 5 and 6 to which an external extraction electrode 4 is connected are fitted. Also, this envelope 2
A third external extraction electrode 7 surrounds the outer peripheral surface of the central portion in the longitudinal direction in the form of a band. When manufacturing a transistor device having such a configuration, as shown in FIG. Electrical connection is made by lines 9,10. Next, this transistor chip 8 is resin-sealed into a cylindrical shape to form an envelope 2.
form. A band-shaped groove 2a is provided on the outer circumferential surface of the envelope 2 in the longitudinal center thereof. Next, first and second cap-shaped electrodes 5 and 6 are fitted into both ends of the envelope 2. The first and second external extraction electrodes 3 and 4 are connected to the first and second cap-shaped electrodes 5 and 6 by solder, and the third external extraction electrode 7 is connected to the outer peripheral surface of the envelope 2. Wrap it around the groove 2a provided in the groove 2a. In this case, the side surfaces of both cap-shaped electrodes 5 and 6 and the outer circumferential surface of the third external extraction electrode 7 are arranged in parallel on substantially the same plane. In this way, the three electrodes of the transistor device 1 are connected from the envelope 2 in the form of cap-shaped electrodes 5 and 6 that cover both ends of the envelope 2 and a band-shaped electrode that is wrapped around the envelope. Since it is taken out to the outside, it is possible to directly connect to a connection terminal of an external circuit provided to engage with these electrode arrangements.
その際、外部回路の接続端子ははんだ付けする方法ても
、また該接続端子をばね状の接片によつて構成しておき
、そこにこのトランジスタ装置１を挿入して機械的応力
によつて接続する方法でも、リード線を用いずに接続で
きる。特に外囲器２が円筒形であり、かつ前記３電極が
該外囲器２の側面をとり巻いていることにより、接続す
る際に該外囲器２の長手方向に沿つて位置合わせするの
みで、該長手方向の中心線を軸とするトランジスタ装置
１の回転は考慮する必要がない。従つて組立作業の能率
を向上させることが可能である。なお、上述した実施例
においては第１およよび第２の外部引出し電極を第１お
よび第２のキャップ状電極に接続する際にはんだ付けに
よつたが、この発明はこれに限定されるものではなく、
両者の接続は例えば機械的応力によつても可能であるこ
とは勿論である。また、上述した実施例においては外囲
器を円筒形に構成したが、円形以外の横断面を有する外
囲器を用いても同様にリードレスの構成が可能である。At this time, the connection terminals of the external circuit may be soldered, or the connection terminals may be configured with spring-like contacts, and this transistor device 1 may be inserted therein to apply mechanical stress. The connection method also allows connection without using lead wires. In particular, since the envelope 2 is cylindrical and the three electrodes surround the sides of the envelope 2, only alignment is required along the longitudinal direction of the envelope 2 when connecting. Therefore, there is no need to consider the rotation of the transistor device 1 about the longitudinal center line. Therefore, it is possible to improve the efficiency of assembly work. In addition, in the above-mentioned embodiment, soldering was used to connect the first and second external lead-out electrodes to the first and second cap-shaped electrodes, but the present invention is not limited to this. not,
Of course, the connection between the two can also be achieved by, for example, mechanical stress. Further, in the above-described embodiments, the envelope is configured in a cylindrical shape, but a leadless configuration is also possible by using an envelope having a cross section other than circular.
更に、上述した実施例においてはトランジスタ装置に適
用した場合についてのみ説明したが、この発明はこれに
限定されるものではなく、３つ以上の電極を有する半導
体装置一般に適用可能てあることは勿論である。Furthermore, although the above-mentioned embodiments have been described only in the case where the present invention is applied to a transistor device, the present invention is not limited thereto, and is of course applicable to semiconductor devices in general having three or more electrodes. be.
以上説明したように、この発明による半導体装置によれ
ば３つ以上の電極を、柱状の外囲器の両端部にかぶせた
キャップ状電極および外囲器に巻きつけた帯状の電極の
形で取り出すことにより、リード線を用いずに外部回路
に直接接続することが可能である。As explained above, according to the semiconductor device according to the present invention, three or more electrodes are taken out in the form of a cap-shaped electrode that covers both ends of a columnar envelope and a band-shaped electrode that is wrapped around the envelope. This allows direct connection to an external circuit without using lead wires.
従つて細線ボンディングを使わないため信頼性が著しく
向上すると共に作業能率が改善され、また組立工程の自
動化も容易である等の種々優れた効果を有する。Therefore, since thin wire bonding is not used, reliability is significantly improved, work efficiency is improved, and the assembly process can be easily automated, among other excellent effects.
図はこの発明による半導体装置の一実施例を示す斜視図
である。
１・・・・・・トランジスタ装置、２・・・・・・外囲
器、３，４・・・・・・第１、第２の外部引出し電極、
７・・・・・・第３の外部引出し電極、８・・・・・・
トランジスタチップ。The figure is a perspective view showing an embodiment of a semiconductor device according to the present invention. DESCRIPTION OF SYMBOLS 1...Transistor device, 2...Envelope, 3, 4...First and second external extraction electrodes,
7...Third external extraction electrode, 8...
transistor chip.
Claims (1)
柱状の外囲器に収容した半導体装置において、それぞれ
該外囲器の端部を覆う第１および第２のキャップ状電極
を設け、該半導体チップの第１および第２の外部引出し
電極をそれぞれ該第１および第２のキャップ状電極に接
続し、該半導体チップの他の外部引出し電極を該第１お
よび第２のキャップ状電極に挾まれた該外囲器の外周面
に巻きつけたことを特徴とする半導体装置。 ２ 外囲器の中央部の外周面に外部引出し電極が嵌合す
る条溝を設けたとこを特徴とする特許請求の範囲第１項
記載の半導体装置。[Claims] 1. In a semiconductor device in which a semiconductor chip having three or more external extraction electrodes is housed in a columnar envelope, first and second cap-shaped electrodes each cover an end of the envelope. , the first and second external lead electrodes of the semiconductor chip are connected to the first and second cap-shaped electrodes, and the other external lead electrode of the semiconductor chip is connected to the first and second cap-shaped electrodes. 1. A semiconductor device characterized in that the device is wound around the outer peripheral surface of the envelope which is sandwiched between shaped electrodes. 2. The semiconductor device according to claim 1, wherein a groove into which an external lead electrode fits is provided on the outer peripheral surface of the central portion of the envelope.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55110505A JPS6050352B2 (en) | 1980-08-09 | 1980-08-09 | semiconductor equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55110505A JPS6050352B2 (en) | 1980-08-09 | 1980-08-09 | semiconductor equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5734351A JPS5734351A (en) | 1982-02-24 |
| JPS6050352B2 true JPS6050352B2 (en) | 1985-11-08 |
Family
ID=14537465
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55110505A Expired JPS6050352B2 (en) | 1980-08-09 | 1980-08-09 | semiconductor equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6050352B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6196080A (en) * | 1986-04-03 | 1986-05-14 | Nippon Steel Corp | Separating agent for annealing for grain-oriented electrical steel sheet |
| JPH0775250B2 (en) * | 1988-05-25 | 1995-08-09 | 三菱電機株式会社 | Resin-sealed semiconductor device |
-
1980
- 1980-08-09 JP JP55110505A patent/JPS6050352B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5734351A (en) | 1982-02-24 |
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