JPS6053493B2 - Automatic switchboard time call activation method - Google Patents

Description

[Detailed description of the invention] The present invention relates to a time call activation method for an automatic switchboard.

Generally, time calls etc. are made by inputting the specified time from an extension line, central office line relay board, or specific operation console.
One of these services is a wake-up call at a hotel, etc., by having an automatic exchange call a designated extension at a designated time. Conventionally, a high-speed, high-capacity processing device such as a minicomputer was connected to an automatic switchboard to control the registration, activation, cancellation, etc. of time calls.

This processing device is fast, but in automatic exchanges with a large number of lines, it is useful for checking the clock circuit connected to the processing device with the time registered for each extension, or for scanning extensions when deleting a registration. This method requires a considerable amount of processing time, and has the disadvantages that the processing equipment is large, complicated, and expensive. SUMMARY OF THE INVENTION An object of the present invention is to provide a time call activation method for an automatic exchange that eliminates the above-mentioned drawbacks, has a simple circuit configuration, shortens processing time, is inexpensive, and operates stably. The time call activation method of the present invention includes a clock circuit that counts the time and outputs time information in the central control circuit, and specifies the first and last of the extension groups to make a time call at that time corresponding to the time. a time call index information storage memory that stores control information necessary for the time call index information storage memory, a control circuit that controls the time call index information storage memory, and a time that specifies the calling order of a group of extensions at which time calls are to be called. A call order information storage memory, a control circuit for controlling the time call order information storage memory, and output information of the clock circuit from the time call index information storage memory control circuit and the time call order information storage memory control circuit. By providing a verification circuit for verifying the output information of the system and connecting it to a central control circuit, it shortens processing time, simplifies the circuit configuration, and provides stable operation at low cost. It is.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a central processing unit, a collation circuit, a storage memory, and a control circuit according to an embodiment of the present invention.

In the figure, a central control circuit 100 of an automatic exchange is connected with an extension group 101, a central office relay board 103, a specific operation console 102, and a verification circuit 104, and a clock circuit 11 is connected to the verification circuit 104.
1. Time call index information storage memory 107;
Memory control circuit 105, gate circuit 106, time call order information storage memory 110, memory control circuit 109,
A gate circuit 108, a startup information latch register 112, and a registration information latch register 113 are connected.

For time calls, first call the relevant extension, central office line relay board 103,
Alternatively, input from the specific operation console 102. As a result, the central control circuit 100 sends the accommodation position information of the corresponding extension and the designated time of the time call to the registration information latch register 113, and sends the time call registration detection information to the verification circuit 104. When this collation circuit 104 receives the time call registration information, it sends the time call index information corresponding to the designated call time received from the central control circuit 100 to the time call index information storage memory control circuit 105 and the time call order information storage memory control circuit 109. Makes a read request for order information. The memory control circuits 105, 10
9 controls gate circuits 106 and 108 to read time call index information and order information from time call index information storage memory 107 and time call order information storage memory 110, and outputs them to collation circuit 104. The collation circuit 104 uses the time call index information received from the storage memories 107 and 110. and the sequence information, and add the designated calling time and accommodation placement information of the calling extension received from the central control circuit 100 to the extension group to be called corresponding to the corresponding time. In other words, verification circuit 1
In 04, a new order is added to the extension information received from the central control circuit 100! Edit the given time call order information and index information. The matching circuit 104 sends the edited index information and order information to memory control circuits 105 and 109.
is controlled and written into the time call index information storage memo I month 07 and the time call order information storage memory 110. These time call index information storage memory 107 and time call order information storage memory 11
The configuration of 0 is as shown in FIGS. 2 and 3, respectively.

Shown in Figure 2. The time call index information storage memory is made up of accommodation position information of the first and last extensions among the extension groups to which a time call is to be made at that time, corresponding to the time. Therefore, if three extensions are registered in the order of A, B, and C at a certain time, the accommodation position information of A as the first extension and C as the end extension is registered in the time call index information storage memory. ing. Also, when registering, you only need to change the ending extension, and when reading, you only need to change the starting extension. On the other hand, the time call order information storage memory 110 shown in FIG. configured.

Therefore, if extensions A, B, and C are registered in the order of A, B, and C at a certain time, the order memory for extension B will contain A as the previous extension in the calling order, and A as the next extension in the calling order. The accommodation position of C is registered as an extension. According to this method, even if a certain extension is deleted from the time call order information, it can be easily removed from the calling extension group. Further, in FIG. 1, the verification circuit 104 periodically checks the clock circuit 111.
The time call index information is read out from the time call index information storage memory 107 by controlling the memory control circuit 105, and the time call index information is compared with the time information.

As a result of the verification, if there is a registration at the relevant time, the verification circuit 10
4 controls the memory control circuits 105 and 109 to read the accommodation position information of the activation extension from the time call index information storage memory 107 and the time call order information storage memory 110, sets the activation information in the latch register 112, and then reads the storage position information of the corresponding extension. After reducing the order information from the time call index information storage memory 107 and the time call order information storage memory 110, a time call activation request signal is sent to the central control circuit 100. This central control circuit 100
When receiving the time call activation request signal, the time call activation request signal is read out from the activation information latch register 112 to accommodate the accommodation position information of the extension requesting time call activation, and if the extension is empty, ringing is started for the extension. Although extension accommodation position information is used as the time call index information and order information in this embodiment, extension numbers or the like may also be used as the index information and order information.

As explained above, the present invention simplifies the circuit configuration by providing a clock circuit information storage memory control circuit and a collation circuit that collates the output information of the clock circuit with two storage memories, thereby shortening and stabilizing the processing time. A time call activation method is obtained.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing an embodiment of the present invention, FIG. 2 is a configuration diagram of the time call index information storage memory shown in FIG. 1, and FIG. 3 is a configuration diagram of the time call order information storage memory shown in FIG. 1. It is. 100...Central control circuit, 101...Extension group, 102...Specific operation console, 103...
...Station line relay stand, 104...Verification circuit, 105
... Time call index information storage memory control circuit, 106 ... Gate circuit, 107 ...
...Time call index information storage memory, 108
...Gate circuit, 109... Time call order information storage memory control circuit, 110...
Time call order information storage memory 111...Clock circuit, 112...Start information latch register,
113...Registration information latch register.

Claims (1)

[Claims] 1. In an automatic switchboard, a clock circuit outputs time information to a control circuit, and a control circuit necessary to specify the first and last of the extension groups to make a time call at that time according to the time. A time call index information storage memory for storing, a control circuit for controlling the memory, a time call order information storage memory for specifying the calling order of a group of extensions for calling time calls at that time, and the time call order information storage. a control circuit that controls memory;
A verification circuit is provided for verifying the output information from the clock circuit and the output information from the two storage memory control circuits, and when the time information and the output information from the memory control circuit match in the verification circuit; A time call activation method for an automatic switchboard, which is characterized in that a time call is activated when the time call is activated.