JPS6053966B2 - josephson logic gate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Josephson logic gate of directly connected opposite electrode type which allows the number of output terminals to be increased.

As is well known, a Josephson junction is a junction between two
It has two superconductors in contact and has voltage V and current I characteristics as shown in Figure 1.

In other words, even if the voltage V across this junction is 0, a current flows (more specifically, the superconducting current i flowing at this time is i.sin(θ
. −θ, ), so the phase difference between both superconductors θ,
, θ. ), and if a current is passed through this junction from an external power source to make it more than the critical Ic, the superconducting current i mentioned above is not enough, so a normal current will also flow, and the voltage will increase across the junction. occurs. This critical value Ic increases or decreases depending on the magnetic field. Therefore, as shown in Figure 1a, a bias current I is applied to the Josephson junction J by a constant current source (not shown).
Considering the situation where B is supplied, a signal current IH is passed through the signal line, and the magnetic field generated by the current is applied to the Josephson junction J, if IH 0, 1B<1c, then as shown in Figure 1. The voltage V appearing across the junction is 0, but when a signal current IH is applied and a magnetic field is applied to lower Ic to Ic', it becomes 1.
B>1c', the operating point jumps to point P along the load straight line indicated by the dotted line, and a voltage is generated at junction J. IH20 Therefore, even if IB is increased to IB' while Ic remains unchanged, the result is the same, the operating point becomes p', and a voltage is generated. The above is an overview of the operation of Josephson logic gates. In a normal Josephson logic gate, the Josephson junction J circuit and the signal current IH circuit are separated and independent, but in this type, it has a multilayer structure (the Josephson junction has a three-layer structure, and an insulating layer If the signal line is attached through the 5-layer structure, a ground plane and an insulating layer are added to effectively apply the magnetic field to the junction J, resulting in a 7-layer structure), but there are manufacturing difficulties such as disconnection. .

Therefore, the applicant first developed a counter-electrode direct connection type in which a signal line was directly connected to one superconductor (counter electrode) of the Josephson junction (the counter electrode itself was used as a signal line), and the counter electrode was directly connected to the ground plane. He devised the Josephson logic gate. This is explained in Japanese Patent Application No. 55-20214, and its outline is explained in Figure 1 C and d. 10 is a ground plane, 12, 14, and 16 are superconductors forming a Josephson junction, and tunneling is possible. 18 is an insulating layer. In the Josephson logic gate of the counter-electrode direct connection type, the counter electrode 16 is extended and a signal current (2) is generated from the extension 16a. The other end 16b is dropped to the ground plane 10, and the output voltage is taken out from the other electrode (base electrode) 12. Therefore, the equivalent circuit is as shown in FIG. 1a. This type of Josephson logic gate saves two layers in the signal line portion, and is effective in preventing disconnection and improving yield. Furthermore, the signal current circuit and the output current circuit are separated by a junction J, so there is no problem of input current leaking to the output circuit. However, in this direct connection type, since the counter electrode is connected to the ground plane (if it is not connected and a resistor is inserted in this part, a voltage drop will occur in the resistor due to the signal current, this will change the output terminal potential and eventually the signal (current will leak into the output circuit), the outputs must all be in parallel as shown in Figure 2.

In FIG. 2, Rl and R2 indicate the signal current circuit of the Josephson element in the next stage. In a normal Josephson logic gate, in which the signal current circuit is separated from the junction, all the signal circuits are connected in series, and the final connection is grounded, so even if multiple gates are driven, only one output terminal is required. If there are n output terminals, the output current will be reduced to 1/n, resulting in a problem of a lack of driving ability. In other words, the output current is biased.
This is supplied by the current h, but as mentioned above, this h has a limit such as IH = 0 and IB < Ic, and it cannot be increased arbitrarily, so this can be further reduced to 1/n. It is said that with Shimatsuta, it is impossible to drive the next stage gate sufficiently. A situation arises. The present invention aims to improve the above points and obtain a Josephson element with a direct connection to a common electrode and a series circuit of a resistor and a Josephson junction with a direct connection to a common electrode. A required number of series circuits of other Joe-Sefson junctions and resistors are connected in parallel to each other, a bias current is supplied to each Josephson junction from the parallel connection point, and an input signal current is supplied to the Josephson junction of the directly connected opposite electrode type. , the output current is taken out from the parallel connection point.

Next, this will be explained with reference to the embodiment shown in FIG. In Figure 3, Jl, J2 are Josephson junctions, Rl, r2
is a resistor for distributing the bias current 1B.

Junction J1 constitutes a Josephson logic gate with a direct connection to the counter electrode, and is supplied with an input signal current of 1H, but junction J2 does not require a signal current circuit, so it may be a direct connection to the counter electrode or one without a signal current circuit.ノ is also good. To explain the operation, as an example, if r1=R2, the junctions Jl, J
2, equal currents 11 and 12 flow, which are kept smaller than the critical current 10 when IH=0.

The bias current 18 in this circuit is 11+I2, which is twice that in the case of one junction J. Still, since it is an 11, 12 comb, junctions Jl and J2 are in a no-voltage state, and Rl,
R2) Since Rl and r2 are set, the output current is about zero. Flow the input signal current 1H to lower the Ic of junction J1 to 1
1>, the junction J1 is in a voltage state, and Rl, r
2 below the normal resistance of the junction (the load line is h
) and the current 1
Most of 1 flows to the junction J2 side and increases the bias current of the junction J2. As a result, 12>Ic, the junction J2 also becomes a voltage state, and the bias current 18 flows out to the output circuit. If the resistances Rl and R2 of the output circuit are R1=R2, the output current is divided into two equal parts, and IB is twice that of the case with one junction as described above, so the current of each output circuit is equal to the junction and fanout. Both are equal to one case. In this way, according to the present circuit, a Josephson logic gate with twice the driving capability can be obtained. Of course, the third and fourth connections and resistances.

and R3, J4 and R5 are r1 and Jl, r2 and J2 in Figure 3.
The output current may be tripled or quadrupled by connecting it in parallel with a parallel circuit. However, if the number of parallel junctions is too large, the current increase in other junctions will not be significant when junction J1 is put into a voltage state, and it will be difficult to switch those junctions into a voltage state. To increase the output current, of course, use a high gate, and since the current on the J1 side is superimposed on the booster gate J2 side when switching, use a gate with a larger Ic than J1, and adjust the values of Rl, r2, and h accordingly. It is also effective to select the Moreover, although the case where a single junction is used has been described above, similar results can be obtained using a quantum interference type Josephson element composed of two or more junctions.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a Josephson logic gate of the counter electrode directly connected type, in which a is an equivalent circuit diagram, b is a voltage-current characteristic diagram, c is a sectional view showing the structure, and d is a plan view thereof. FIG. 2 is an equivalent circuit diagram of the gate in the case of fan-out 2, and FIG. 3 is an equivalent circuit diagram showing an embodiment of the present invention. In the drawing, J1 is a Josephson junction of the counter-electrode direct connection type, J2 is another Josephson junction, Rl and r2 are resistors, IB is a bias current, IH is a signal current, and 0ut1 and 0ut2 are output circuits.

Claims (1)

[Claims] 1. A Josephson junction consisting of a base electrode for outputting an output, a counter electrode, and a thin layer sandwiched between these electrodes. One end of the counter electrode is extended to serve as a signal current input end, and the other end is In a series circuit of a Josephson element and a resistor connected directly to the opposite electrode connected to the ground plane on which the Josephson junction is attached via an insulating layer, in a series circuit of another Josephson junction and a resistor, and in a series circuit of another Josephson junction and a resistor, Connect the required number of series circuits of junctions and resistors in parallel, supply bias current to each Josephson junction from the parallel connection point,
The Josephson logic gate is characterized in that an input signal current is applied to the Josephson junction directly connected to the counter electrode, and an output current is taken out from the parallel connection point.