JPS6055786B2 - Multifunctional electronic clock device - Google Patents

Description

[Detailed Description of the Invention] In addition to the time display function, this invention also provides a stopwatch,
The present invention relates to a multifunctional electronic timepiece device having functions such as an alarm and a timer.

Various types of electronic timepieces have been proposed in which the time display section is configured in a digital manner. By counting the clock signals, a time signal for time display is obtained.

This time counting circuit is composed of a combination of counting circuits corresponding to the units of "seconds and minutes" and "hours", and counts the carry signals obtained from the counting circuits of the "hour" units, for example, every time. With this, it is possible to count "days" and also "months". In other words, in the time counting section,
Count up to the time of "hour and minute" and the date of "month and day",
The digital display section allows for appropriate switching and display. Such electronic clock devices can basically display the time and date as described above, but especially when carried as a wristwatch, they can also be used to display other functions such as stopwatches, alarms, timers, etc. If it has multiple functions, it can be used more effectively.

However, in this case, a switch corresponding to each function is required, making the operation complicated. This invention was made in view of the above points,
To provide a multifunctional electronic timepiece device which has a plurality of functions independent of the time display function in addition to the normal time display function, and which can easily control the operation of each function with a small number of switches. It is something. An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of the basic clock section. Reference numeral 11 is a clock oscillator that oscillates a reference clock signal. The clock signal from this oscillator 11 is appropriately frequency-divided by a frequency dividing circuit 12 to give a frequency of 1 second per second. It is a pulse (1PI1S) time measurement clock signal. This timekeeping clock signal is transmitted by decimal, hexadecimal, w-adic, hexadecimal, and decimal counting circuits 13 and 1 arranged in series.
4, 15, 16, and 17, and the count values of counting circuits 13 and 14 correspond to the unit of "second" of time, and the count values of counting circuits 15 and 16 correspond to the unit of "minute". In the counting circuit 17, the units of "hour" are counted as clocks. That is, the counting circuits 13 to 17 constitute a time counting circuit 18, and the count value signals of the counting circuits 15 to 17 for "minutes" and "hours" are sent to a digital display via a display switching circuit 19. It is coupled to device 20 and adapted to digitally display the time. In this case, the signal from the functional counter shown in FIG. 2 is also coupled to the display switching circuit 19, and by switching and driving the switching circuit 19 with the display switching signal, the count value of the functional counter is displayed on the display device 20. be made to be done. In addition, the counting circuit 15
~17 count value signals are also coupled to the comparator circuit 21, and the second
The count signals from the counters of the alarm function shown in the figure are compared, and when they match, a match signal is output. Further, a correction signal is coupled to the counting circuits 15 and 17 so that a time adjustment operation can be performed.

Figure 2 shows the configuration of the functional counting section for the above-mentioned clock counting section. For example, when providing the functions of an alarm, a stopwatch, a long time unit measurement, a time difference clock, and a timer, it is necessary to Counter 22 which is a functional operating means
a, 22b, 22c, 22d, and 22e are provided.

These counters 22a to 22e are respectively connected to the counting circuit 1.
W-base, hexadecimal, and decimal counting circuit 23 corresponding to 5 to 17
a to 23e, 124a to 24e, 125a to 25e, and the count signal of each of the counters 22a to 22b is taken out via gate groups 26a to 26e, respectively, and guided to the display switching circuit 19 shown in FIG. It's becoming like that. The gate groups 26a to 26e each receive signals A, B, C, D, and E related to function selection, which will be described later.
The gate will be opened by In addition, this functional counting section is provided with control switches Sl and S2, from which an electric signal is taken out when they are turned on, and these switches Sl and S2 are operated by push buttons, etc., respectively. It is something.

The signal from switch S1 is AND circuit 27a and 2
8a, the neutral n signal obtained during normal clocking operation is coupled to the AND circuits 27a to 27c, and the 1PI1S pulse signal is coupled to the AND circuits 27a and 27b. . Further, the signal when the switch S2 is turned on is the AND circuit 27b and 2
8b and which obtains an output signal when both switches Sl and S2 are turned on, the output signal of the AND circuit 29 is connected to the AND circuit 27c, and the output signal of the inverter 30 connected to the output side of the AND circuit 29 is connected to the AND circuit 27a. , 27b
supply to. That is, if the switch S1 is operated in a state where the signal n is obtained, the output of the inverter 30 is "1" in this state, so the signal of 1PI1S is taken out from the AND circuit 27a while the switch S1 is turned on.

Moreover, if only the switch S2 is operated, the AND circuit 27b
A signal of 1PI1S is extracted from the AND circuits 27a and 27b, and the signals from the AND circuits 27a and 27b are sent to the counting circuit 1 of FIG.
5, 17 as a correction signal, the time "
You can modify the units of minutes and hours. By operating the switches Sl and S2 at the same time, an output signal is obtained from the AND circuit 27c, and if this signal is used as a reset signal for the frequency dividing circuit 12 and counting circuits 13 and 14 in FIG. The unit of "second" is cleared,
It becomes possible to control the setting of the correct start time of the corrected time. Further, to the AND circuits 28a and 28b, the output signal of the OR circuit 31 to which the signals C, D, and E corresponding to the function selection are combined is applied as a gate signal, and the signal of 1PI1S is also combined. .

Then, when the switch S1 is turned on with any of the signals C, D, and E present, the AND circuit 28a outputs 1P.
The I1S signal is taken out, and when the switch S2 is turned on, the 1PI1S signal is taken out from the AND circuit 28b. The signal when the switch S1 is operated is also coupled to the ternary counter 32 as a counting step signal.

This counter 32 is set to ``0'' for each signal from the switch S1.
It is configured to sequentially generate count value signals of J, "1", and "2", and is reset by the timing of the leading edge of the signal from the OR circuit 33 connected to signal A, and the count value "0" state. Next, the counter 22
To explain the related configurations of each of a to 22e, first, in the counter 22a, the counting circuits 23a, 2
The count signals 4a and 25a are coupled as comparison signals to the comparison circuit 21 shown in FIG.

Further, the AND circuits 28a, 28b are coupled to the counting circuits 23a, 25a, and the signals from the AND circuits 34a, 34b whose gates are opened by the signal C are coupled as a "+1" signal, and the switches Sl, S2 By this operation, the count value of the counter 22a can be set. This counter 22a is set to have an alarm function, and the count value of the counter 22a is set to the time at which an alarm is desired to occur. The match signal from the comparison circuit 21 is supplied to an AND circuit 35 whose gate is opened by signal C, and the output signal from this AND circuit 35 is supplied to an OR circuit 36.
The signal is led to a notification signal circuit (not shown) through the circuit to issue an alarm notification. The counter 22b has a stopwatch function, and when the counter 32 counts "0", the AND circuit 37 to which the signal A is coupled resets the counting circuits 23b, 24b, 25c, and the counter 32 counts "1". ” The 1PI1S signal is taken out through the AND circuit 38 whose gate is opened during counting, and the 1P/1S signal is
AND circuit 39 whose gate is opened by receiving the 1S signal as signal A
is coupled to the counter 22b as a counting step signal.

The counter 22c performs long-term unit measurement, and is connected to an AND circuit 41 that combines the "0" count signal of the counter 32, and the signal from the inverter 40 to which the signals B and b are combined.
The counting circuits 23c, 24c, and 25c are reset by this signal.

In addition, the signal is output in long-term units, that is, one pulse per minute (1PI1M), through an AND circuit 43 whose gate is opened by the signal from the inverter 42 to which the "1" count signal of the counter 32 is supplied.
This 1PI1M signal is supplied as a counting step signal to the counter 22c via an AND circuit 44 whose gate is opened by signal b. Counter 2
2d has a time difference clock function, and takes out the signal of 1PI1M through an AND circuit 45 whose gate is opened by the signal e, and controls the counting step with this signal. Time counting circuit 15,
It is counted and driven in synchronization with 16 and 17.

Also, AND circuits 46a and 4 whose gates are opened by signal E
6b is used to combine the signals from the AND circuits 28a and 28b, set the count values of the counting circuits 23d, 24d, and 25d, and set the counter 22d to the local time in any region with a time difference. Further, the counter 22e has a timer function, and the AND circuit 47a to which the signal D is coupled,
The signals from the AND circuits 28a and 28b are taken out via the AND circuits 28a and 28b, and the signals are output from the counting circuits 23e and 28b by the switches Sl and S2.
24e and 25e are set to count, and the timer setting time is set to count.

Then, this counter 22e counts down by "-1" by the 1PI1S signal taken out from the AND circuit 48 whose gate is opened by the signal d, and detects the state of the count value "0" of the counter 22e as "0". It is detected by the device 49. The detection signal of this "0" detector 49 is supplied to the OR circuit 36 via an AND circuit 50 whose gate is opened by the signal d, thereby generating a notification signal. FIG. 3 shows the configuration of a function selection command unit that generates signals A and ae, which are coupled to the function counter as signals related to function selection. Equipped with
When the switches SA and SB are operated, the AND circuits 51 and 5
2, a one-shot pulse output can be obtained.

The one-shot pulse outputs from the AND circuits 51 and 52 are supplied as counting increment signals to hexadecimal counters 53 and 54, respectively, which obtain count value output signals of "0" to "5". When the counter 53 counts ``0'', the neutral n signal is generated on the signal A in each count state of ``1'' to ``5''. counter 53
, 54 are coupled to AND circuits 55a to 55e and 56a to 56e.
2, the one-shot pulse from AND circuits 56a to 5
The one-shot pulses from the AND circuit 51 are supplied as gate signals to the AND circuits 55a to 6e, respectively.
The output signal of 55e is sent to the counter 54 via the OR circuit 57.
The output signals of the AND circuits 56a to 56e are output to the OR circuit 5.
8 to the counter 53 as a reset signal.

Then, the output signals of the AND circuits 55a to 55e set the flip-flop circuits 59a to 59e, and the output signals of the AND circuits 56a to 56e set the flip-flop circuits 59a to 59e.
59e, and the signals a-e are taken out from the output terminals of the flip-flop compensation circuits 59a to 59e when they are set. This flip-flop circuit 5
The set output signals from each of 9a to 59e are coupled to AND circuits 60a to 60e, and these AND circuits 60a to 60e are connected to the inverter 61a connected to the counting output terminals of "1" to "5" of the counter 53. ~61e is gated. And these AND circuits 60a to 60e
The output signals are supplied to the function display device 63 via OR circuits 62a to 62e, respectively, and the display elements 63a to 63 correspond to the stopwatch, long time unit measurement, alarm, timer, and time difference clock (world clock). Controls the lighting of 63e. Further, on the signal A corresponding to the count of "1" to "5" of the counter 53, the AND circuits 64a to 64, respectively
4e as a gate signal, and this AND circuit 64a
The 1PI1S signal coupled to 64e is selectively extracted and supplied to the OR circuits 62a to 62e, respectively. That is, in the timepiece device configured as described above, the time counting circuit 18 counts the reference clock pulses from the oscillator 11 and performs time counting. The time is displayed on the display device 20.

When no function other than time display is used, the counter 53 is set to count "0" and a signal n is generated. That is, in FIG. 2, gate signals are applied to the AND circuits 27a to 27c, so that the time can be adjusted as appropriate by operating the switches Sl and S2 as described above.
This time counting operation is continued regardless of other function selections to ensure accurate time counting operation.
In this timepiece device, when the stopwatch function is to be performed, the counter 53 is set to count "1" by operating the switch SA, and the signal A is generated.

When this signal A is generated, the display element 63a of the function display device 63 blinks in response to the signal from the AND circuit 64a, and a gate signal is applied to the AND circuits 37 and 39 and the gate group 26b in FIG. , the counter 32 is reset to a counting state of "0" at the timing of the leading edge of the signal A. By applying the gate signal A to the gate group 26b, the count value signal of the counter 22b is coupled to the display switching circuit 19, and by coupling the display switching signal to the display switching circuit 19 at the same time as the signal A is generated, counting is performed. The count value of the counter 22b comes to be digitally displayed on the display device 20. At this time, the counter 22b is reset by the output signal from the AND circuit 37 when the counter 32 counts "0". In this state, when the switch S1 is further operated and the counter 32 is incremented to count "1", the gate of the AND circuit 38 is opened, and the signal of 1PI1S is passed through the AND circuit 39 whose gate is open to the counter 22b. The time elapsed since the switch S1 was operated is counted and displayed on the display device 20. Then, when the switch S1 is further operated and the counter 32 is incremented to count "2", the AND circuit 38
gate is closed, the counting step of the counter 22b is stopped, and the elapsed time is displayed on the display device 20 in units of "seconds".Furthermore, by operating the switch S1, the counter 32 is set to " By restoring the count to 0, the initial state is restored. That is, stopwatch time measurement is performed by operating the switch S1. Here, when the switch SB is operated with the counter 53 counting "1" and the stopwatch function designated, the flip-flop circuit 59a is set by the output signal from the AND circuit 55a.

When the signal A disappears, the gate of the AND circuit 60a is opened, and the display element 63a is lit to indicate that the stopwatch function has been selected and used. However, this stopwatch function is a short-time function and does not need to be continuously operated even during normal time display like a timer or an alarm, so it does not particularly require function memory operation by the flip-flop circuit 59a. . Next, when the counter 53 is set to count "2" by the switch SA, the signal B is generated, and the display element 63b of the long-term unit measurement of the function display device 63 starts blinking.

That is, in FIG. 2, AND circuit 41, gate group 2
6c is opened, the count value of the counter 22c is displayed on the display device 63, and the counter 32 is reset, so that the AND circuit 41
The counter 22c is reset by the output. Also,
Since the inverter 42 is in the output “1” state, the 1PI1M signal is coupled to the AND circuit 44 via the AND circuit 43. When the switch S8 is operated in this state, the flip-flop circuit 59b is set by the output of the AND circuit 55b and a signal b is generated.
c, 1PI1M signals are counted, and time measurement over a long period of time is started.

At this time, since the gate of the AND circuit 41 is closed due to the generation of the signal b, a reset command is not given to the counter 22c. This long-term time measurement continues until the switch S1 is pressed and the counter 32 increments to ``1'', and long-term unit measurement is performed. In the case of such a long-term unit measurement, if the count value of the counter 22c is coupled to the display device 20 during the measurement period, the essential time display function cannot be used for a long time.

Therefore, in the case of long-time unit measurement, the count value of the counter 53 should be moved or reset to a state of "0" counting after the measurement has started, and the signal B should be cut off. good. Then, when it is desired to check the measurement time, it is sufficient to set the counter 53 to a state of counting "2". During this measurement period, the flip-flop circuit 59b
This storage state is displayed on the display element 63b. This flip flop 5
9b is reset by setting the counter 54 to a count of "2" using the switch SB and operating the switch S^. Further, when selecting the alarm function, this is done by setting the counter 53 to a count value of "3", and in the case of the tire function, it is also done by setting the count value to "4".
This is done by setting the count value.

In addition, in the case of a time difference clock (world clock), the counter 53
is set to count "5" and generates a signal E. This signal E opens the gates of the AND circuits 46a and 46b, and the switches Sl and S2 set the counter 22d to count at the time set by the time difference. It is something. Then, the gate of the AND circuit 45 is opened by the signal e set by the flip-flop circuit 59e, and the counter 22d is operated for counting.
5" can be read on the display device 20. Figure 4 shows an example of the display panel of the above-mentioned clock device.
Two-digit numerical display section 65a corresponding to hour and minute.
, 65b are set, and this numerical display section 65a,
65b selectively displays the counted values of the counters 22a to 22e.

Display elements 63a to 63e for displaying functions are arranged above the numerical display sections 65a and 65b. Alternatively, the function type may be digitized and the function displayed on the numeric display 66 as shown in Figure B.

In the above embodiment, the time counting circuit 18, the counters 22a to 2
2e was constructed by a combination of multiple counting circuits, but
The counting circuit 18 and the counters 22.a to 22e can also be constructed by shift registers. for example,
As shown in FIG. 5, a shift register 67 is set for counting the basic time, and a shift register 68 is set for counting various functions.
．． 7, 68, the transfer control circuit 69, adder section 7
A circular circuit through 0 is set up. Then, the read signal from the shift register 67 or 68 obtained via the transfer control circuit 69 is made to be displayed on the display device 20 via the display buffer 71. Further, the oscillation signal from the oscillator 11 that obtains the reference clock signal is added to the clock pulse generation circuit 72 to generate clock pulses φ1 and φ2 for driving shift registers 67 and 68, etc., and this signal is further sent to the frequency dividing circuit 73. The frequency is divided and supplied to the adder section 70 as an addition signal.

A carry control circuit 74 is attached to the adder section 70, so that the count value of each digit of the shift registers 67, 68 is controlled to be carried to 1 base, 6 base, 12 base, etc. Further, a command from the correction control circuit 75 to which the switch signals Sl, S2, and S3 are combined is supplied to the adder section 70 for correcting or clearing the count value for a designated digit. Furthermore, basic time display selection payment TFL function selection SF
Function information such as
In addition to 6, commands are given to the transfer control circuit 69 and the adder section 70. The frequency dividing circuit 73 includes shift registers 67 and 68.
It also functions as a timing signal generation circuit for controlling digit timing, word timing for each function, etc., and the timing signal is generated by an adder section 70, a carry control circuit 7, a correction control circuit 75, and a function control circuit. circuit 76
etc. The shift register 67 used here,
68 is configured as shown in A and B in FIG. 6, for example.

That is, the inside of the shift register 68 is divided into a plurality of unit digits, and in the shift register 67, the signal from the frequency dividing circuit 73 coupled to the adder section 70 is further divided in the frequency division stage section to create a 1PI1S signal. This is then further incremented by a carry signal to the unit digits corresponding to the units of ``1 second'', ``W seconds'', ``1 minute'', ``1 minute'', and ``hour''. That is, by configuring a counting circuit for each unit digit section, the time display information of the basic clock can be obtained by reading out the shift register 67. It is something that is made possible. Further, the shift register 68 is roughly divided into two parts, and a plurality of unit digits are set in each divided part, and the counters of the above embodiment are arranged in series. This is to make it compatible with world clocks and stopwatches.
In other words, by specifying the timing, the specified digits of the shift registers 67 and 68 are caused to perform counting operations, etc., and multifunctional operations similar to those described in the previous embodiment can be arbitrarily selected. be.

The shift register 68 may be arbitrarily set as shown in A to D in FIG. 7 depending on the type and number of functions required.

Note that the functions such as the alarm, timer, and world clock described above are not limited to these, and any other functions added to the clock device may be used, such as a counter that counts numbers. Of course, the point is that various applications can be considered without departing from the gist of the present invention. As described above, according to the present invention, in addition to the normal time display function, a plurality of functions such as an alarm function, a stopwatch function, a long time measurement function, a time difference clock function, and a timer function are incorporated, and the functions are switched and displayed on the time display section. Regardless of whether or not they are displayed on this display, the alarm function, long-time measurement function, time difference clock function, and timer function, which require continuous operation, each have a storage means. The function is configured to be executed based on the contents of this storage means, so the above function continues to operate even if it is not actually displayed on the display. can do.

Moreover, the above-mentioned multiple functions can be freely controlled with a small number of switch elements, and these multiple functions can be operated simultaneously and in parallel, especially when configured as a wristwatch. It is highly effective.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the basic parts of a timepiece device according to an embodiment of the present invention, Fig. 2 is a block diagram illustrating a multi-functional section combined with the device shown in Fig. 1, and Fig. 3 is a block diagram showing the above-mentioned embodiment. FIG. 4 is a diagram illustrating an example of the function selection means, FIG. 4 is a diagram illustrating an example of the display panel section, FIG. 5 is a configuration diagram showing another embodiment of the present invention, and FIGS. FIG. 2 is a diagram illustrating a configuration example of a shift register section according to an embodiment. 11... Oscillator, 12... Frequency divider circuit,
18...Time counting circuit, 19...Display switching circuit, 20...Display device, 22a to 22e
...Counter, 26a-26e...Gate group, 32, 53, 54...Counter, 63.
...Function display device.

Claims (1)

[Claims] 1. A clock oscillator 11 that oscillates a reference clock signal, a time counting means 18 that obtains time information by counting the reference clock signal obtained from this clock oscillator, and a time that displays the time information obtained by this time counting means. A display device 20, a plurality of functional operating means 22a, 22c, 22d, and 22e that are provided independently of the time counting means and obtain functional information different from the time information, and the functions of each of the plurality of functional operating means. a single external operation switch SA that selects and specifies information to be switched and displayed on the time display device; a plurality of storage means 59c, 59b, 59e, and 59d provided for the plurality of function operating means; An operation command switch SB that sets the contents of the storage means corresponding to the function operation means selected and designated by the operation switch, and a corresponding function operation means based on the storage contents of the storage means set by the operation command switch. Operation control means 35, 44, 45, 48 for controlling the operation of
, 50. A multifunctional electronic timepiece device comprising: .