JPS6055987B2 - Blow card inspection equipment - Google Patents
Blow card inspection equipmentInfo
- Publication number
- JPS6055987B2 JPS6055987B2 JP3444680A JP3444680A JPS6055987B2 JP S6055987 B2 JPS6055987 B2 JP S6055987B2 JP 3444680 A JP3444680 A JP 3444680A JP 3444680 A JP3444680 A JP 3444680A JP S6055987 B2 JPS6055987 B2 JP S6055987B2
- Authority
- JP
- Japan
- Prior art keywords
- probe
- resistance
- contact
- probe card
- reference surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000007689 inspection Methods 0.000 title claims description 3
- 239000000523 sample Substances 0.000 claims description 76
- 239000004020 conductor Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 2
- 238000001514 detection method Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000012360 testing method Methods 0.000 description 4
- 238000006073 displacement reaction Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06794—Devices for sensing when probes are in contact, or in position to contact, with measured object
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】
本発明は特に半導体ウェハーの電気的特性試験に用いる
プローブカードの検査装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention particularly relates to a probe card testing device used for testing the electrical characteristics of semiconductor wafers.
従来この種の装置はプローブカーードと平行平面内に位
置した電気的良導体、例えば金等によつてメッキされた
基準面に対し、前記プローブカードを平行移動し、プロ
ーブカード内の探針を基準面に接触させ、接触抵抗があ
る基準以下になつた場合にラーノプ等で作られた接触表
示装置によつて接触した探針を表示するものてあつた。Conventionally, this type of device moves the probe card parallel to a reference surface plated with an electrically conductive material such as gold, which is located in a plane parallel to the probe card, and uses the probe in the probe card as a reference. When the probe was brought into contact with a surface, and the contact resistance fell below a certain standard, a contact display device made by Rahnop et al. was used to display the contacting probe.
しカル接触抵抗の基準値が一種類でしかも低く設定して
ある為、各探針先端の高さのバラツキが原因になつて接
触表示装置が各探針の接触状態を表示しているのか、又
は各探針先端の表面状態、例えばよごれ等によつて接触
抵抗が高くなつていることが原因で接触表示装置が各探
針の接触状態を表示しているのか判断出来なかつた。い
いかえれば、従来のこの種の装置においては接触表示装
置が探針と基準面の非接触を表示しているとしても、探
針の高さが原因で実際に非接触状態なのか、あるいは探
針は接触しているが探針先端のよごれによつて非接触状
態になつているかの判断が出来ないものであつた。本発
明はこれらの欠点を解決する為接触抵抗の基準値を高抵
抗、低抵抗の2抵抗値とし、各探針と基準面間の接触抵
抗を比較し結果を表示するものである。Since there is only one standard value for contact resistance and it is set low, I wonder if the contact display device is displaying the contact status of each probe due to variations in the height of each probe tip. Alternatively, it was not possible to determine whether the contact display device was displaying the contact state of each probe because the contact resistance was increased due to the surface condition of the tip of each probe, such as dirt. In other words, in conventional devices of this type, even if the contact display device indicates that the probe is not in contact with the reference surface, it is difficult to know whether the probe is actually in a non-contact state due to the height of the probe, or if the probe is not in contact with the reference surface. Although they were in contact, it was not possible to determine whether they were in a non-contact state due to dirt on the tip of the probe. In order to solve these drawbacks, the present invention sets the reference value of contact resistance to two resistance values, high resistance and low resistance, compares the contact resistance between each probe and the reference surface, and displays the results.
したがつて、高抵抗基準値と比較することによつて各探
針先端の高さのバラツキを検出することが出来、低抵抗
基準値と比較することによつて各探針先端のよごれ等を
検出することが出来る。本発明は例えば、電気的良導体
より成る基準面に対し平行な平面内にプローブカードを
保持し、任意に該基準面との距離を可変出来、かつ該変
位・量を計測出来る手段と、前記プローブカード内の複
数の探針先端の電気的特性のバラツキを、前記基準面と
該探針との電気的接触抵抗を測定することによつて検査
する手断と、あらかじめ設定された高抵抗値及び低抵抗
値の2値の基準抵抗と前記門電気的接触抵抗とを前記探
針毎に比較し、これら比較結果を表示する手段とを具備
したことを特徴とするプローブカード検査器である。Therefore, by comparing with the high resistance reference value, it is possible to detect variations in the height of each probe tip, and by comparing with the low resistance reference value, it is possible to detect dirt, etc. at the tip of each probe. Can be detected. The present invention provides, for example, means for holding a probe card in a plane parallel to a reference plane made of a good electrical conductor, arbitrarily varying the distance from the reference plane, and measuring the displacement/amount, and the probe Manual cutting involves inspecting variations in the electrical characteristics of a plurality of probe tips in the card by measuring the electrical contact resistance between the reference surface and the probes, and a preset high resistance value and The probe card tester is characterized by comprising means for comparing a low-resistance binary reference resistance and the gate electrical contact resistance for each probe, and displaying the comparison results.
以下図面にしたがつて詳細に説明する。A detailed explanation will be given below with reference to the drawings.
第1図は本発明の実施例におけるプローブカード検査器
の機構部を表わす。FIG. 1 shows a mechanical section of a probe card tester according to an embodiment of the present invention.
図中1は被検査プローブカード、2は探針、3は基準面
、4は基準面上下操作部、5はプローブカード固定部材
、6はプローブカード支持部材、7はコネクターである
。被検査プローブカード1はプローブカード固定部材5
によつてカード支持部材6に固定される。プローブカー
ド支持部材6は常に被検査プローブカード1を基準面3
に対し平行平面内に保つ〜
基準上下操作部4は基準面3を常に被検査プローブカー
ド1に対し平行平面内に保ちつつ被検査プローブカード
1との距離を可変出来る機構を有する。In the figure, 1 is a probe card to be inspected, 2 is a probe, 3 is a reference plane, 4 is a reference plane up/down operation section, 5 is a probe card fixing member, 6 is a probe card support member, and 7 is a connector. The probe card to be tested 1 is a probe card fixing member 5
It is fixed to the card support member 6 by. The probe card support member 6 always keeps the probe card 1 under test on the reference surface 3.
The reference up/down operation unit 4 has a mechanism that can vary the distance from the probe card 1 to be tested while always keeping the reference plane 3 in a plane parallel to the probe card 1 to be tested.
基準面3は被検査プローブカード1の探針2と接触する
ことにより電気的導通を得る目的で電気的良導体て作ら
れている。コネクター7は機構部の基準面3及び各探針
2を後述する測定表示部と電気的に接続する為のもので
ある。第2図は本発明の実施例におけるプローブカード
検査器の測定表示部の主要回路を表わす。The reference surface 3 is made of a good electrical conductor in order to obtain electrical continuity by contacting the probe 2 of the probe card 1 to be tested. The connector 7 is for electrically connecting the reference surface 3 of the mechanism section and each probe 2 to a measurement display section to be described later. FIG. 2 shows the main circuit of the measurement display section of the probe card tester according to the embodiment of the present invention.
図中1は被検査プローブカード、2は探針、3は基準面
、7はコネクターであり以上は機構部に含まれる。8は
定電流電源、9a19b19c19nはリレー、10a
,10b,10c,10nは高抵抗比較回路、11a,
11b,11c,11nは低抵抗比較回路、12a,1
2b,12c,12nは高抵抗保持回路、13a,13
b,13c,13nは低抵抗保持回路、14a,14b
,14c,14nは高抵抗表示回路、15a,15b,
15c,15nは低抵抗表示回路、16は高抵抗基準電
圧、17は低抵抗基準電圧、18はリレー駆動回路、1
9はリセット回路、20はスタートスイッチ、21はス
トップスイッチである。In the figure, 1 is a probe card to be inspected, 2 is a probe, 3 is a reference plane, and 7 is a connector, which are included in the mechanism section. 8 is a constant current power supply, 9a19b19c19n is a relay, 10a
, 10b, 10c, 10n are high resistance comparison circuits, 11a,
11b, 11c, 11n are low resistance comparison circuits, 12a, 1
2b, 12c, 12n are high resistance holding circuits, 13a, 13
b, 13c, 13n are low resistance holding circuits, 14a, 14b
, 14c, 14n are high resistance display circuits, 15a, 15b,
15c and 15n are low resistance display circuits, 16 is a high resistance reference voltage, 17 is a low resistance reference voltage, 18 is a relay drive circuit, 1
9 is a reset circuit, 20 is a start switch, and 21 is a stop switch.
定電流電源8の出力はリレー9a,9b,9c,9nを
それぞれ経由してコネクター7を介し被検査プローブカ
ード1に接続される。尚リレー!9a,9b,9c,9
nは被検査プローブカード1の探針2と1対1の関係で
接続される。各リレー9a,9b,9c,9nはリレー
駆動回路18によつてまずリレー9aが接点を閉じ、一
定時間後接点を開き、つぎにリレー9bが接点を閉じ、
一定時間後接点を開き、同様にしてリレー9c,9nも
接点を閉関すると云う様に順番に動作を行う。スタート
スイッチ20はリレー駆動回路18の動作開始をうなが
すものであり、ストップスイッチ21が働くまで前述の
動作をくりかえす。リレー9a,9b,9c,9nは被
検査プローブカード1に接続される一方高抵抗比較回路
10a,10b,10c,10n及び低抵抗比較回路1
1a,11b,11c,11nに接続される。高低抵比
較回路10a,10b,10c,10nは、定電流電源
8から供給される一定電流が被検査プローブカード1の
探針2と基準面3との接触抵抗によつて生ずる電圧と高
抵抗基準電圧16の基準)電圧とを入力として比較し、
高抵抗基準電圧16の基準電圧が高い場合のみ高抵抗保
持回路12a,12b,12c,12nに出力を出す。
低抵抗比較回路11a,11b,11c,11nは、定
電流電源8から供給される一定電流が被検査プローブカ
ード1の探針2と基準面3との接触抵抗によつて生する
電圧と低抵抗基準電圧17の基準電圧とを入力として比
較し、低抵抗基準電圧17の基準電圧が高い場合のみ低
抵抗保持回路13a,13b,13c,13nに出力を
出す。いいかえれば高抵抗比較回路10a,10b,1
0c,10nは探針2と基準面3との接触抵抗がある基
準値、例えば数kΩ以下となつた時にはじめて出力を出
し、低抵抗比較回路11a,11b,11c,11nは
探針2と基準面3との接触抵抗がある基準値、例えば数
Ω以下になつた時にはじめて出力を出すようになつてい
る。高抵抗保持回路12a,12b,12c,12n1
低抵抗保持回路13a,13b,13c,13nは高抵
抗比較回路10a,10b,10c,10n1低抵抗比
較回路11a,11b,11c,11nのそれぞれの出
力をリセット回路19からのリセット信号を受けるまで
保持するものである。例えば高抵抗保持回路12aは、
リレー9aが閉じている時の高抵抗比較回路10aの出
力状態を、次にリレー9aが再び閉じる瞬間にリセット
回路19から出力されるリセット信号を受けるまての間
保持するものである。高抵抗保持回路12a,12b,
12c,12nの出力は高抵抗表示回路14a,14b
,14c,14nに、低抵抗保持回路13a,13b,
13c,13nの出力は低抵抗表示回路15a,15b
,15c,15nに各々入力され探針2と基準面3の接
触状態の表示が行われる。以上が図面の説明である。つ
ぎに本発明装置における実施例について使用方法を述べ
る。検査者は被検査プローブカード1を第1図に示した
ようにプローブカード検査機構部に装着する。The output of constant current power supply 8 is connected to probe card 1 to be tested via connector 7 via relays 9a, 9b, 9c, and 9n, respectively. Nao relay! 9a, 9b, 9c, 9
n is connected to the probe 2 of the probe card 1 to be tested in a one-to-one relationship. Each of the relays 9a, 9b, 9c, and 9n is controlled by the relay drive circuit 18 so that the relay 9a first closes its contacts, then opens its contacts after a certain period of time, and then the relay 9b closes its contacts.
After a certain period of time, the contacts are opened, and in the same way, relays 9c and 9n also close their contacts, and so on. The start switch 20 prompts the relay drive circuit 18 to start operating, and the above-described operation is repeated until the stop switch 21 is activated. Relays 9a, 9b, 9c, 9n are connected to probe card 1 to be tested, while high resistance comparison circuits 10a, 10b, 10c, 10n and low resistance comparison circuit 1
1a, 11b, 11c, and 11n. The high/low resistance comparator circuits 10a, 10b, 10c, 10n are connected to a high resistance reference voltage that is generated by the contact resistance between the probe 2 of the probe card 1 to be tested and the reference surface 3, and the constant current supplied from the constant current power supply 8. Voltage 16 reference) Voltage is compared as input,
An output is output to the high resistance holding circuits 12a, 12b, 12c, and 12n only when the reference voltage of the high resistance reference voltage 16 is high.
The low resistance comparison circuits 11a, 11b, 11c, and 11n compare the constant current supplied from the constant current power supply 8 with the voltage generated by the contact resistance between the probe 2 of the probe card 1 to be tested and the reference surface 3, and the low resistance. The reference voltage of the reference voltage 17 is input and compared, and only when the reference voltage of the low resistance reference voltage 17 is high, an output is output to the low resistance holding circuits 13a, 13b, 13c, and 13n. In other words, high resistance comparison circuits 10a, 10b, 1
0c and 10n output only when the contact resistance between the probe 2 and the reference surface 3 reaches a certain reference value, for example, several kΩ or less. It is designed to output an output only when the contact resistance with the surface 3 falls below a certain reference value, for example, several ohms. High resistance holding circuits 12a, 12b, 12c, 12n1
The low resistance holding circuits 13a, 13b, 13c, and 13n hold the respective outputs of the high resistance comparison circuits 10a, 10b, 10c, and 10n1 and the low resistance comparison circuits 11a, 11b, 11c, and 11n until they receive a reset signal from the reset circuit 19. It is something to do. For example, the high resistance holding circuit 12a is
The output state of the high-resistance comparator circuit 10a when the relay 9a is closed is held until a reset signal output from the reset circuit 19 is received the next time the relay 9a closes again. High resistance holding circuits 12a, 12b,
The outputs of 12c and 12n are high resistance display circuits 14a and 14b.
, 14c, 14n, low resistance holding circuits 13a, 13b,
The outputs of 13c and 13n are low resistance display circuits 15a and 15b.
, 15c, and 15n, respectively, and the contact state between the probe 2 and the reference surface 3 is displayed. The above is the explanation of the drawings. Next, a method of using an embodiment of the device of the present invention will be described. The tester attaches the probe card 1 to be tested to the probe card testing mechanism section as shown in FIG.
基準面上下操作部4を操作し、基準面3を探針2に近づ
けながらスタートスイッチ20を操作する。探針2のう
ち基準面3に一番接近している探針がます基準面3に接
触すると、高抵抗表示回路14a,14b,14c,1
4nのうち接触した探針に対応するものが表示を行う。
検査者はこの表示によつて探針が基準面3に接触したこ
とを判断出来る。さらに基準面上下操作部4を操作し基
準面3を探針2に近つけて行くと全探針に対応する高抵
抗表示回路か探針2と基準面3の接触を表示する。基準
面上下操作部4によつて基準面3の変位置が読み取れる
為上述の操作中に各探針先端の高さのバラツキを測定す
ることが出来る。又高抵抗表示回路が探針と基準面3の
接触を表示してからさらにある規定量基準面3をプロー
ブカードに接近させると、探針先端のよごれ等により接
触抵抗が減少しない探針に対応する低抵抗表示回路は表
示を行わないが、探針先端が清浄で接触抵抗の減少した
探針に対応する低抵抗表示回路は表示を行う。したがつ
て本発明装置を用いれば、プローブカード検査の検査者
は各探針先端の高さのバラツキが測定出来るばかりでな
く各探針先端のよこれについても検出することが簡単に
行える為、プローブカードの補修に適切な処置を行うこ
とが出来る。The start switch 20 is operated while the reference plane up and down operation section 4 is operated to bring the reference plane 3 closer to the probe 2. When the probe 2 closest to the reference surface 3 contacts the square reference surface 3, the high resistance display circuits 14a, 14b, 14c, 1
Among 4n, the one corresponding to the probe that made contact performs the display.
The inspector can judge from this display that the probe has contacted the reference surface 3. Furthermore, when the reference surface up and down operation section 4 is operated to move the reference surface 3 closer to the probe 2, the high resistance display circuit corresponding to all the probes displays the contact between the probe 2 and the reference surface 3. Since the displacement position of the reference surface 3 can be read by the reference surface up/down operation section 4, the variation in height of each probe tip can be measured during the above-mentioned operation. Also, after the high resistance display circuit indicates contact between the probe and the reference surface 3, if the reference surface 3 is brought closer to the probe card by a specified amount, it corresponds to a probe whose contact resistance does not decrease due to dirt on the tip of the probe, etc. A low resistance display circuit that corresponds to a probe with a clean tip and a reduced contact resistance does display. Therefore, by using the device of the present invention, an inspector conducting a probe card inspection can not only measure the variation in the height of each probe tip, but also easily detect the other side of each probe tip. Appropriate measures can be taken to repair the probe card.
第1図は本発明装置の一実施例における機構部を示す斜
視図である。FIG. 1 is a perspective view showing a mechanical section in an embodiment of the device of the present invention.
Claims (1)
数の探針と接触され電気的良導体からなる基準面をもつ
面部材と、この面部材の基準面に対して平行な面内に前
記プローブカードを保持する保持手段と、この保持手段
と前記基準面との間隔を調整しかつ測定する間隔調整手
段と、前記基準面と前記探針との電気的接触抵抗を電圧
として検出する抵抗検出手段と、この抵抗検出手段から
の出力と所定の高抵抗値および低抵抗値に対応する電圧
と比較する比較手段と、この比較手段の出力を表示する
表示手段とを備えることを特徴とするプローブカードの
検査装置。1. A surface member having a reference surface made of an electrically conductive material that is in contact with a plurality of probes of a probe card to be brought into contact with electrodes of a semiconductor substrate, and holding the probe card in a plane parallel to the reference surface of this surface member. a distance adjusting means for adjusting and measuring the distance between the holding means and the reference surface; a resistance detecting means for detecting the electrical contact resistance between the reference surface and the probe as a voltage; A probe card inspection device comprising: comparison means for comparing the output from the resistance detection means with voltages corresponding to predetermined high and low resistance values; and display means for displaying the output of the comparison means. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3444680A JPS6055987B2 (en) | 1980-03-18 | 1980-03-18 | Blow card inspection equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3444680A JPS6055987B2 (en) | 1980-03-18 | 1980-03-18 | Blow card inspection equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56130937A JPS56130937A (en) | 1981-10-14 |
| JPS6055987B2 true JPS6055987B2 (en) | 1985-12-07 |
Family
ID=12414466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3444680A Expired JPS6055987B2 (en) | 1980-03-18 | 1980-03-18 | Blow card inspection equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6055987B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61206238A (en) * | 1985-03-08 | 1986-09-12 | Nippon Maikuronikusu:Kk | Automatic semiconductor wafer prober |
| JPS6239021A (en) * | 1985-08-14 | 1987-02-20 | Toshiba Corp | Probe testing process |
| JPH02290035A (en) * | 1989-11-30 | 1990-11-29 | Tokyo Electron Ltd | Semiconductor wafer measuring equipment |
-
1980
- 1980-03-18 JP JP3444680A patent/JPS6055987B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56130937A (en) | 1981-10-14 |
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