JPS6057173B2 - cold electron emission cathode - Google Patents
cold electron emission cathodeInfo
- Publication number
- JPS6057173B2 JPS6057173B2 JP54000613A JP61379A JPS6057173B2 JP S6057173 B2 JPS6057173 B2 JP S6057173B2 JP 54000613 A JP54000613 A JP 54000613A JP 61379 A JP61379 A JP 61379A JP S6057173 B2 JPS6057173 B2 JP S6057173B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- type
- type semiconductor
- type epitaxial
- epitaxial semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 41
- 239000000758 substrate Substances 0.000 claims description 11
- 239000010409 thin film Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052792 caesium Inorganic materials 0.000 description 2
- TVFDJXOCXUVLDH-UHFFFAOYSA-N caesium atom Chemical compound [Cs] TVFDJXOCXUVLDH-UHFFFAOYSA-N 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Cold Cathode And The Manufacture (AREA)
Description
【発明の詳細な説明】
PN接合半導体におけるP型層の表面をセシウムと酸
素とて活性化して負の電子親和力とすることにより冷電
子放出陰極が得られる。DETAILED DESCRIPTION OF THE INVENTION A cold electron emitting cathode can be obtained by activating the surface of a P-type layer in a PN junction semiconductor with cesium and oxygen to give it negative electron affinity.
このような冷電子放出陰極を例えば撮像管の走査用電子
ビームの発生源等として用いる場合等は電子流の制御桜
構を必要とする。従つて本発明は電力を消費することな
く、かつ低い電圧をもつて放出電子流を容易に制御する
ことのできる冷電子放出陰極を提供するものである。
第1図は本発明の実施例υ、復断面図で、N型シリコン
半導体基板1の裏面にオーミック接触の金 属薄膜2を
設け、また表面には中央に円形の欠除部3を有するP型
半導体層4を形成してある。When such a cold electron emitting cathode is used, for example, as a source of a scanning electron beam for an image pickup tube, a control mechanism for electron flow is required. Accordingly, the present invention provides a cold electron emitting cathode in which the emitted electron flow can be easily controlled without consuming power and with a low voltage.
FIG. 1 is a cross-sectional view of Example υ of the present invention, in which an ohmic contact metal thin film 2 is provided on the back surface of an N-type silicon semiconductor substrate 1, and a P layer having a circular cutout 3 in the center is provided on the front surface. A type semiconductor layer 4 is formed.
このP型半導体層4は基板1の表面から適宜の不純物を
拡散することによつて形成したものであるが、更にその
上にN型エピタキシャル半導体層5とP型エピタキシャ
ル半導体層6とを順次成長させてある。上述の半導体に
おけるエピタキシャル層5、6の周縁部をエッチングに
より削り取つてP型半導体層4およびP型エピタキシャ
ル半導体層6の周縁部にそれぞれオーミック接触の金属
薄膜7および8のような導電膜を環状その他適宜の形状
に被着し、基板1に被着した薄膜2および上記薄膜7、
8をそれぞれ端子9、10、11に接続してある。この
ような半導体装置を真空容器中に収容してP型エピタキ
シャル半導体層6に陽極12を対設し、かつ上記半導体
層6の表面にセシウムおよび酸素を吸着させて活性化す
ることにより負の電子親和力をもつた電子放出面13を
形成してある。また前記端子9と陽極12および端子・
11の間にそれぞれ電圧源14、15を接続すると共に
端子9と10の間に可変電圧源16を接続してある。す
なわちN型半導体基板1に対して、陽極12に充分高い
正電位を与えると共にP型エピタキシャル半導体層6に
は適当な正電位を与・え、かつP型半導体層4には負電
位を与えて、その電位を任意に調整し得るようにしたも
のである。上述の装置において、N型およびP型のエピ
タキシャル半導体層5,6で形成されるPN接合には順
方向電圧が加わるから、N型の半導体基板1からN型エ
ピタキシャル層5を介してP型エピタキシャル層6に電
子が注入される。This P-type semiconductor layer 4 is formed by diffusing appropriate impurities from the surface of the substrate 1, and furthermore, an N-type epitaxial semiconductor layer 5 and a P-type epitaxial semiconductor layer 6 are sequentially grown thereon. I have let you. The peripheries of the epitaxial layers 5 and 6 in the semiconductor described above are etched away, and conductive films such as ohmic contact metal thin films 7 and 8 are formed on the peripheries of the P-type semiconductor layer 4 and the P-type epitaxial semiconductor layer 6, respectively, in an annular shape. In addition, the thin film 2 and the above-mentioned thin film 7 are deposited in an appropriate shape and deposited on the substrate 1;
8 are connected to terminals 9, 10, and 11, respectively. Such a semiconductor device is housed in a vacuum container, an anode 12 is provided opposite to the P-type epitaxial semiconductor layer 6, and cesium and oxygen are adsorbed onto the surface of the semiconductor layer 6 to activate it, thereby generating negative electrons. An electron emitting surface 13 having affinity is formed. In addition, the terminal 9 and the anode 12 and the terminal
Voltage sources 14 and 15 are connected between terminals 9 and 11, respectively, and a variable voltage source 16 is connected between terminals 9 and 10. That is, with respect to the N-type semiconductor substrate 1, a sufficiently high positive potential is applied to the anode 12, an appropriate positive potential is applied to the P-type epitaxial semiconductor layer 6, and a negative potential is applied to the P-type semiconductor layer 4. , the potential can be adjusted arbitrarily. In the above-mentioned device, since a forward voltage is applied to the PN junction formed by the N-type and P-type epitaxial semiconductor layers 5 and 6, the P-type epitaxial Electrons are injected into layer 6.
かつP型半導体層4はこの注入電子流に対して絶縁層と
して作用するから、N型基板1の広い範囲から上記P型
半導体層の欠除部3に注入電子が集中して、P型エピタ
キシャル層6に注入された電子が負の電子親和力をもつ
た表面13から矢印で示したように真空中へ放出されて
陽極12に捕促される。この場合上記P型半導体層4に
端子10から負の電位を与えておくと、その欠除部3の
周縁に空乏層17が形成されて注入電子が制限される。
また上記負電位を増大すると空乏層17の生ずる範囲が
次第に拡大して、ついには欠除部3の全面に拡がるから
、注入電子は完全に遮断される。従つて可変電圧源16
の調整によつてN型半導体基板1からN型エピタキシャ
ル半導体層5に注入されて、P型エピタキシャル半導体
層6の表面から放出される電子の量を制御し得ると共に
電力の消費を伴わないもので、上記電圧源16によつて
P型半導体層4に加える負電圧をe、放出される電子流
をiとすると、第2図のような制御特性を得ることが−
できる。また上述の空乏層17は円形の欠除部3の周縁
から次第に中心に向つて拡大するから、放出電子流1が
制御されると同時にその径dが変化する。すなわち電子
流の密度はあまり変化することなく、その径の変化によ
つて電子流の制御が行.われるもので、このため撮像管
等の分解能の調整等にも利用することができる。なお前
記実施例においてはP型半導体層4の欠除部3の形状を
円形としたが、これを正方形、矩形その他所望の形状と
することができることは明白である。また図面において
はN型エピタキシャル半導体層5およびP型のエピタキ
シャル半導体層6が上記欠除部3の外方まで広い範囲に
形成されているが、これを更に拡大することも縮小する
・こともできる。しかし何れにしても上記欠除部におけ
るN型半導体基板上にはエピタキシャル半導体層5,6
が形成されていることを必要とするものである。このよ
うに本発明の冷電子放出陰極は簡単な構造をもつて電力
の消費を伴うことなく放出電子流並びにその断面の大き
さを制御し得るものである。このため例えは撮像管ある
いはブラウン管等の走査電子ビーム源等として用いる場
合に、電子銃の電極構造を簡単にすることができると共
に電極組立の寸法誤差にもとづくビームの径の拡大等も
防止される。In addition, since the P-type semiconductor layer 4 acts as an insulating layer for this injected electron flow, the injected electrons are concentrated in the cutout part 3 of the P-type semiconductor layer from a wide range of the N-type substrate 1, and the P-type epitaxial layer is Electrons injected into the layer 6 are emitted from the surface 13 having a negative electron affinity into the vacuum as shown by the arrows and captured by the anode 12. In this case, if a negative potential is applied to the P-type semiconductor layer 4 from the terminal 10, a depletion layer 17 is formed around the periphery of the cutout 3, and the injected electrons are restricted.
Furthermore, as the negative potential is increased, the area where the depletion layer 17 is formed gradually expands and eventually spreads over the entire surface of the cutout 3, so that the injected electrons are completely blocked. Therefore variable voltage source 16
The amount of electrons injected from the N-type semiconductor substrate 1 into the N-type epitaxial semiconductor layer 5 and emitted from the surface of the P-type epitaxial semiconductor layer 6 can be controlled by adjusting the amount of electrons, and does not involve power consumption. , when the negative voltage applied to the P-type semiconductor layer 4 by the voltage source 16 is e, and the emitted electron flow is i, it is possible to obtain the control characteristics as shown in FIG.
can. Furthermore, since the depletion layer 17 described above gradually expands from the periphery of the circular cutout 3 toward the center, its diameter d changes at the same time as the emitted electron flow 1 is controlled. In other words, the density of the electron flow does not change much, and the electron flow is controlled by changing its diameter. Therefore, it can also be used for adjusting the resolution of an image pickup tube, etc. In the above embodiment, the shape of the cutout 3 of the P-type semiconductor layer 4 was circular, but it is obvious that it can be square, rectangular, or any other desired shape. Furthermore, in the drawing, the N-type epitaxial semiconductor layer 5 and the P-type epitaxial semiconductor layer 6 are formed in a wide range outside the cutout 3, but this can be further expanded or reduced. . However, in any case, epitaxial semiconductor layers 5 and 6 are formed on the N-type semiconductor substrate in the above-mentioned cutout.
This requires that a As described above, the cold electron emitting cathode of the present invention has a simple structure and can control the emitted electron flow and the size of its cross section without consuming power. For example, when used as a scanning electron beam source such as an image pickup tube or a cathode ray tube, the electrode structure of the electron gun can be simplified and the beam diameter can be prevented from expanding due to dimensional errors in electrode assembly. .
第1図は本発明実施例の縦断面図、第2図は本発明実施
例の陰極における特性曲線である。FIG. 1 is a longitudinal cross-sectional view of an embodiment of the present invention, and FIG. 2 is a characteristic curve of the cathode of the embodiment of the present invention.
Claims (1)
が形成されてその欠除部における上記N型半導体基板上
にN型のエピタキシャル半導体層とP型のエピタキシャ
ル半導体層とが順次設けられてPN接合を形成し、上記
P型エピタキシャル半導体層の表面が電子放出面となり
、かつ前記N型半導体基板に対して上記P型エピタキシ
ャル半導体層に正電位を与えると共に前記中央の欠除さ
れたP型半導体層に放出電子流制御用の負電位を与える
ためのオーミック接触導電膜が上記N型半導体基板とP
型エピタキシャル半導体層並びにP型半導体層にそれぞ
れ形成されていることを特徴とする冷電子放出陰極。1. A central P-type semiconductor layer is formed on an N-type semiconductor substrate, and an N-type epitaxial semiconductor layer and a P-type epitaxial semiconductor layer are sequentially provided on the N-type semiconductor substrate in the cutout part. to form a PN junction, the surface of the P-type epitaxial semiconductor layer becomes an electron emitting surface, and a positive potential is applied to the P-type epitaxial semiconductor layer with respect to the N-type semiconductor substrate, and the center An ohmic contact conductive film for applying a negative potential for controlling the emitted electron flow to the P-type semiconductor layer is connected to the N-type semiconductor substrate and the P-type semiconductor layer.
A cold electron emitting cathode characterized in that it is formed in a type epitaxial semiconductor layer and a P type semiconductor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54000613A JPS6057173B2 (en) | 1979-01-10 | 1979-01-10 | cold electron emission cathode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54000613A JPS6057173B2 (en) | 1979-01-10 | 1979-01-10 | cold electron emission cathode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5593627A JPS5593627A (en) | 1980-07-16 |
| JPS6057173B2 true JPS6057173B2 (en) | 1985-12-13 |
Family
ID=11478579
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54000613A Expired JPS6057173B2 (en) | 1979-01-10 | 1979-01-10 | cold electron emission cathode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6057173B2 (en) |
-
1979
- 1979-01-10 JP JP54000613A patent/JPS6057173B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5593627A (en) | 1980-07-16 |
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