JPS6059810B2 - Phase comparison relay device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase comparison relay device, and more particularly to a phase comparison relay device used for power transmission line protection.

When a conventional phase comparison relay device is applied to a system that handles a variable power supply at both ends, it can (1) shut off only the power supply end, (2) shut off both ends by transfer, or (3) connect fixed power supplies to both electrical stations.
Two sets of phase comparison relay devices that handle variable power supplies were installed to cope with systems that handle variable power supplies at both ends.

By the way, in case (1) above, the non-power terminal cannot be shut off, and in case (2), a separate transfer channel is required.
Moreover, there is a disadvantage that the operation time is delayed, and in the case of (3), two sets of devices and twice the number of transmission channels are required, which is not economically advantageous. The present invention aims to eliminate the above-mentioned disadvantages and provide a phase comparison relay device that can be disconnected at both ends in the event of an accident within the protected area, regardless of the power supply conditions at both electrical stations. It is something to do.

Embodiments of the phase comparison relay device according to the present invention will be described below with reference to the drawings. FIG. 1 shows a phase comparison relay for one electrical station.

Such phase comparison relays are similarly installed at other electrical stations across the protection zone. In this figure, the current value of the power system 1 is detected by a current transformer 2 and applied to a level detector 4 via an input transformer 3. This level detector 4 includes an overcurrent detection element (1), a detection element SLH that outputs when the instantaneous value of the current is equal to or higher than the positive polarity side level, and a detection element SLL that outputs when the instantaneous value of the current is equal to or higher than the negative polarity side level. These outputs are AND gates 5 and 6.
Then, it is sent out as a transmission signal S via the 0R gate 7 to the phase comparison relay at the other electrical station. On the other hand, the received signal RS from the other electric station is amplified by the received signal amplifier 8 and then passed through the AND gates 9 and 10 to the phase comparison circuit 11.
added to. This phase comparator circuit 11 uses detection elements PHH and PHL to determine whether the signal from the other party is at a positive polarity level (hereinafter referred to as SLH level) or a negative polarity side level (hereinafter referred to as SLL level). have. These detection elements PHH and PHL each consist of an on-delay timer and an off-delay timer for signal continuity. Note that the positive side set level SLH is originally used for a terminal into which a large current flows, and the level detector 4 outputs a "1" signal for phase comparison only during the time when the current value exceeds this level. In addition, the negative side setting level SLL is used at a weak power supply terminal where current does not flow regardless of an internal fault, and the level detector 4 outputs a ゜゜1゛ signal for phase comparison only for the time when this level exceeds the current value. The relationship between the allowable period Tp during which the "1" signal is output and the lock period TL during which signal output is prohibited is always TP<T for SLH, and always Tp>T for SLL. . For this reason, SLH (5SLL
The relationship between the absolute values of is as follows. Here ζ is the tolerance and is 1.
A value between 2 and 1.5 is selected, where the latter is the internal charging current.
Further, the relationship among the SLL level, overcurrent 0C level, and SLH level is SLL<x<SLH. The elements SLH of the level detecting device 4, . The output of the SLL is also applied to AND gates 9 and 10 via a transmission delay compensation circuit 12, and the output of the amplifier 8 is determined by a received signal determination circuit 13, and is applied to an AND gate 14.
added to. The output of this AND gate 14 is the element PHL. of the phase comparison circuit 11. It is applied to the AND gate 15 along with the output of , and taken out as the output 0UT (L). On the other hand, the output of the element PHH is transmitted to the level detector 4.
It is applied to the AND gate 16 together with the overcurrent detection signal and taken out as the output 0UT (H). Next, the operation of the above embodiment will be explained.

Figure 2 shows a case where an accident occurs within the protection zone between terminals A and B, and the current 1A at terminal A and the current h at terminal B are at the detection level of overcurrent detection element 0 (hereinafter referred to as (1
) is referred to as a setting level). That is, at terminal A shown in FIG.
However, the output of the SLL is blocked by the output of (1), and the output of the SLH is ultimately transmitted as the transmission signal C via the 0R gate 7. On the other hand, the signal at the other end B is input as a received signal RS, which is amplified by a received signal amplifier 8 and applied to AND gates 9 and 10. That is, as shown in Figure 2B, the SL at terminal A
The AND of the H output signal and the SLH output signal at terminal B is added to the phase comparison circuit 11, and as a result, AN
An output 0LrI' (H) appears on the output side of the D gate 16.
This causes the phase comparison relay to trip. Similarly, a trip operation is performed at terminal B as shown in FIG. 2C. FIG. 3 shows an accident between terminals A and B, where the current at terminal A is below level (1) and the current at point B is above level 0. If IA is below level (1) as shown in FIG. 3A, the output of detection element SLL is N
1 gate 6 and 0R gate 7, it is output as a transmission signal S.

On the other hand, the received signal RS from the other end is input to the AND gate 10, where the output of the detection element SLL is added together, so element PL4 of the phase comparator circuit 11 is activated, and A
An output 0UT (L) is output via the ND gate 15.
On the other hand, at terminal B, the output is 0U as shown in Figure 3C.
T(H) is output, and each of these trips the phase comparison relay. Figure 4 shows the case where an accident occurs outside between terminals A and B, and the current at each terminal A and B is 1A,
The case where IB is greater than (1) level is shown. As shown in FIG. 4A, the current 1A at terminal A exceeds the 0 level, so the output of the detection element 0C of the level detector is RlJ
The output of element SLH is sent out as a transmission signal S via AND gate 5 and 0R gate 7, and is applied to gate 9 of M at the same time. However, S at terminal B
The phase of the LH signal and the SLH signal at terminal A is approximately 1.
Since they differ by 800, they do not match, and their logical product becomes 0. Therefore, nothing appears on the outputs 0UT (H) and 0UT (L). Similarly, there is no output at terminal B and both phase comparison relays are not tripped. FIG. 5 shows an accident in a section other than terminals A and B, where the current values 1A and IB at each end A and B are below the 0 level.

In this case, as shown in FIGS. 5B and 5C, both phase relays do not trip. As explained above, according to the above embodiment, the phase comparison relay can be tripped only in the case of an accident within the section, and the power transmission system can be protected from the accident. FIG. 6 shows an example of the configuration of the received signal determination circuit used in the above embodiment.

As can be seen from this figure, the received signal determination circuit 13 has N
It consists of an OT gate 20, an on-delay timer T1, and an off-delay timer T2, and detects the detection element SLL depending on the width of the high level period and the low level period of the received signal.
It is determined whether the output is the output of the SLH or the output of the SLH. That is, as shown in FIG. 7A, when the received signal is an SLL output, the period of Rlj inverted by the NOT gate 20 is shorter than the period of ROJ, and as a result, the output of the on-delay timer T1 becomes ROJ. , the final output will also be RO. On the other hand, in the case of the output from the detection element SLH, the output of the NOT gate 20 which inverts the received signal has a longer period of r1, and the output of the on-delay timer has a longer period of R1. ．． Therefore, the final output will also be RlJ. This therefore makes it possible to determine the received signal. FIGS. 8 and 9 show other embodiments of the invention.

In FIG. 8, the detection element x is not provided, and the SLH level is treated as it is, the same as the 0C level in the above embodiment, and when it is above the SLH level, the output of SLH is sent to the transmission signal S1 phase comparison signal, and when it is below the SLH, The output of the element SLL is used as the phase comparison signal of the transmitted signal S1 to determine the received signal from the partner terminal. Note that on the output side of element SLH,
An off-delay timer T3 is provided, through which the AN
The SLH output is added to one end of the D gate 5. This embodiment also provides the same effect as the case of FIG. 1. FIG. 9 shows the phase comparison circuit 11 as elements PHH, PHL. Here is an example of one element instead of one element.

The effect in this case is the same as in the case of FIG. As described above, according to the present invention, it is possible to obtain a phase comparison relay device that can disconnect both ends if an accident occurs within the protected area, no matter how the power supply conditions at both ends change.

[Brief explanation of the drawing]

FIG. 1 is an embodiment of the phase comparison relay device according to the present invention, and is a block diagram showing the configuration of one terminal side, and FIG.
, B, and C are explanatory diagrams showing the case where there is an accident within the section and the current at both ends is higher than the (1) level. Figure 3 A, B, and C are the case where there is an accident within the section and only the current at one end is higher than the 0C level. Figure 4 A, B, and C are explanatory diagrams showing the case where the current at both ends is larger than the 0C level due to an out-of-section accident. Figure 5 A, B, and C are explanatory diagrams showing the case where the current at both ends is higher than the 0C level due to an out-of-section accident. Explanatory diagram showing the case where is smaller than the 0C level, No. 6
The figure is a block diagram showing the specific configuration of the received signal determination circuit in the embodiment, FIG. 7 is a waveform diagram showing its operation, and FIG.
9 and 9 are block diagrams showing other embodiments. 4... Lebel detector, 5, 6, 9, 10, 14... AN
D gate, 7...0R gate, 11...7 phase comparison circuits, 1 and 3...received signal determination circuit.

Claims (1)

[Scope of Claims] 1 Phase comparison relays are provided at both ends of the protection zone, and each relay side compares the phase of the signal from the other end with the signal from its own end to determine whether or not there is an accident within the zone. In the electrical equipment, each phase comparison relay receives a first level signal indicating that the instantaneous current value at its own end exceeds the positive set level and a negative set level that is smaller in absolute value than the positive set level. a level detection circuit that outputs a second level signal indicating that the current is detected in accordance with the detected current at the own end, and a phase comparison circuit that compares the phases of the first and second level signals and the received signal from the opposite end. and,
a received signal determination circuit that determines whether the received signal from the other end is the first or second level signal based on the width of the high level period and the low level period of the received signal; and the self-end current. is larger than a predetermined value, outputs a first level signal of the phase comparison circuit and prohibits output of a second level signal of the phase comparison circuit by inhibiting output of the received signal determination circuit. and an output circuit that outputs the second level signal according to the output of the received signal determination circuit when the magnitude of the self-end current is smaller than a predetermined value. Relay device. 2. The phase comparison relay device according to claim 1, wherein the predetermined value has a value intermediate between the first level and the second level. 3. The phase comparison relay device according to claim 1, wherein the predetermined value is the same value as the first level.