JPS606092B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor devices having electrical interconnections, and more specifically, the present invention relates to semiconductor devices having electrical interconnections, and more particularly, to electrically bond semiconductor devices to wiring layers on a non-woven substrate using a tape carrier method. The present invention relates to a semiconductor device connected to a semiconductor device.

Recent trends in semiconductor technology are toward the miniaturization of semiconductor devices in order to achieve higher operating speeds, lower manufacturing costs, and higher component reliability.

However, regardless of the method in which ultra-miniaturized semiconductor devices are made, electrical connections must be made between each semiconductor device and a supporting substrate, extending from the substrate to the desired circuit portion of each semiconductor element. This creates technical problems in providing reliable external electrical conductors. As a result, the inability to find a solid and reliable connection method between semiconductor devices and supporting substrates has hindered their use in electrical equipment that requires high reliability, such as computers. . One technique for conventional semiconductor devices is to make a through hole in a flexible insulating film 2 and connect a semiconductor element 3 to a lead 1 extending through the hole, as shown in FIGS. 1 to 4. , then cut lead 1 in the through hole,
This is a method in which the lead piece 1' is molded and then mounted on a ceramic substrate 5 or the like.

A disadvantage of this technique is that the cord 1 must be long, extending over the through-hole in the film. As shown in FIG. 4, the cable piece 1' connected to the electrode 4 on the top surface of the semiconductor device 3 is connected to the wiring layer 6 at the same height as the bottom surface of the device, so that it does not become twisted and inevitably becomes long. . As a result, lead piece 1'
Misalignment occurs during the bending process, reducing manufacturing yield. Furthermore, when fixing the semiconductor element 3 to the metal layer 7 on the ceramic substrate 5, the tip of the lead piece 1' must be aligned so that it matches the connection position of the wiring layer 6, which reduces work efficiency. Significantly lower. Another drawback of this technique is that the connected cable piece 1' and the edge of the semiconductor element 3 may come into contact and cause an electrical short circuit.

This is contrary to the above-mentioned social demand for higher reliability of semiconductor devices. One method to overcome this drawback is to mold the L lead piece 1' so as to lift it, as shown in FIG.

However, in this method, the length of the lead bridge that can be lifted must be lengthened, which reduces the manufacturing process by that amount, which goes against the previously mentioned requirement of reducing manufacturing costs.

The object of the present invention is to provide a wire cord formed on an insulating film.

By increasing the pattern manufacturing process and reducing the number of man-hours required for mounting semiconductor devices, we have also reduced manufacturing costs and enabled highly reliable mounting by preventing contact between lead pieces and the edges of semiconductor devices. An embodiment of the present invention is shown in FIG. ' is connected, and this semiconductor element 3
The ceramic substrate 5 supporting the semiconductor element 3 is provided with a recess 8 that is slightly larger than the outer periphery of the semiconductor element 3 and deeper than its thickness. At the bottom of this recess 8 is a t semiconductor element 3.
A metal layer is provided to bond the semiconductor element 3 and the ceramic substrate 5 so that the back surface of the semiconductor element 3 is fixed and the height of the surface of the semiconductor element is lower than the wiring surface on the ceramic substrate 5. Further, a wiring layer 6 is provided on the ceramic substrate around the recess 8 so as to match the lead piece 1', and the terminal end of the lead piece 1' is connected to the wiring layer 6. As a result, the surface of the semiconductor element 3 to which the lead piece 1' is connected by the tape 8 carrier method is lower than the wiring surface on the ceramic substrate 5. After pressing the connected semiconductor element on the bottom surface of the recess of the ceramic substrate and fixing it with the metal layer, the other end of the lead piece can be connected to the wiring layer.The above semiconductor device will be implemented using the drawings below. An example will be explained in detail.FIG. 7 shows a state in which a lead pattern is formed on an insulating film 2 provided with through holes, and a semiconductor element 3 is connected to the tip of the lead piece.

The lead pattern can be formed with an accuracy of several microns to several tens of microns by PR exposure and etching. There are various ways to connect the electrode 4 on the semiconductor element 3 to the lead 1. For example, the lead is plated with tin and the electrode 4 is connected to the lead 1.
If it is made of gold, it can be easily and quickly connected by thermocompression bonding.Next, as shown in FIG. 8, the lead wire is cut inside the through hole while the semiconductor element 3 is still connected.

The lead piece 1' having the cut free end may have the minimum necessary length so that it can be connected to the wiring layer on the ceramic substrate later. FIG. 9 shows how the semiconductor element 3 having the cut-off wire piece 1' is fitted into the recess 8 of the ceramic substrate.

It is preferable that the size of the recess 8 be slightly larger than the outer periphery of the semiconductor element 3 and as small as possible to the extent that work efficiency is not affected. The bottom surface of the recess 8 is coated with gold paste in advance, and these metal layers 7 can be easily removed by pressing the semiconductor element 3 onto the bottom surface while sandwiching the gold 4 silicon metal pieces while heating the metal paste to 340 to 3500°C. It can be fixed to the ceramic substrate 5 via. Or ~ Epoxy resin with low heat resistance “For example, A
If BLEBOND826-1 or the like is used, the elements can be fixed more easily. After the semiconductor element is fixed, the lead piece 1' may be connected to the wiring layer 6 on the substrate 5 outside the recess 8, as shown in FIG. Alignment between the lead piece 1' and the corresponding wiring layer 6 can be almost unnecessary by appropriately selecting the distance between the semiconductor element 3 and the inner wall of the recess 8 and the lead piece pitch interval. The lead piece and the wiring layer can be connected by, for example, ultrasonic bonding. Further, since the height of the wiring layer 6 on the substrate 5 is higher than the height of the electrode 4 of the element 3, the free end of the lead piece 1' is lifted up and connected. As stated above, ``According to the present invention, since the length of the lead piece can be shortened, the misalignment of the leads that occurs during manufacturing is reduced, and cost reduction can be expected due to improved yield.

Furthermore, by making the recesses on the ceramic substrate slightly larger than the outer periphery of the semiconductor element, there is no need to align the lead pieces and the wiring layer, which improves work efficiency and reduces manufacturing costs.

Furthermore, the free end of the lead piece connected to the electrode of the semiconductor element is lifted upward when the element is inserted into the recess of the ceramic substrate, so there is a great possibility that the green end of the element will come into contact with the lead piece. ``It is possible to obtain extremely highly reliable semiconductor devices.

Furthermore, the present invention does not impair the manufacturing automation, large lead connection strength, and high-density implementation, which are the advantages of the tape carrier manufacturing method, and also provides low manufacturing costs, high reliability, and high reliability of semiconductor devices. It responds to social demands for high operating speed.

[Brief explanation of drawings]

Figures 1 to 4 show the conventional manufacturing method using the tape carrier method, and Figure 5 shows an improved example of the method.
FIG. 6 is a perspective view showing an embodiment of the present invention, and FIG.
The figures up to FIG. 0 show an example of a method for manufacturing a semiconductor device according to the present invention. DESCRIPTION OF SYMBOLS 1... Lead, 1'... Lead piece, 2... Insulating film, 3... Semiconductor element, 4... Electrode, 5... Ceramic substrate, 6... Wiring layer L 7... Metal layer, 8...・D recess. Hair 1 Figure 2 Atsushi 3 Figure 4 Aoi 5 Figure Cold 6 Figure Qin 7 Figure 8 Brush? hair lo figure

Claims (1)

[Claims] 1. A method for manufacturing a semiconductor device in which a semiconductor element is fixed to an insulating substrate and wired using a tape carrier method, in which a recess for positioning is provided in the insulating substrate, deeper than the thickness of the semiconductor element and large enough to fit the semiconductor element, A semiconductor element having a lead piece having one end connected to a semiconductor element electrode and the other end being a free end is fitted into the recess and fixed to the bottom surface,
A method of manufacturing a semiconductor device, comprising connecting a wiring layer formed on an insulating substrate surface around a recess and a free end of the lead piece protruding above the wiring layer.