JPS60775B2 - Test method for semiconductor integrated circuit devices - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of testing a semiconductor integrated circuit device by applying a predetermined input signal to the device using an electron beam.

Conventionally, in order to test a semiconductor integrated circuit device, particularly a logic circuit, a binary signal is provided as an input signal, and the state of its output is detected and tested.

In this case, a signal is input or output by setting up a probe on a pad on the semiconductor chip. However, one chip of recent integrated circuit devices has 80 pins, that is, 80 pads, and it is quite difficult to test by placing the probe on all of them. In particular, ``When an integrated circuit device has not yet reached the stage of completion, for example, when the chips are still on a wafer and not all chips have been separated,'' it is difficult to carry out tests like the one I mentioned before, even though all the wiring has not yet been completed. The need to perform such tests at the wafer stage is great for, for example, wafer memories that are currently being put into practical use, that is, memories that are constructed entirely from one wafer. In wafer memory, wiring must be formed between each chip, but if you do not select and connect only chips that operate normally, the entire wafer will be defective, so each chip must be connected in advance. It is really useful to test and confirm that it works properly.The present invention is useful when testing a semiconductor integrated circuit device while it is still a semi-finished product. This allows a test signal to be input to the device and its output to be detected without having to set up the system, and this will be explained in detail below.

The basic principle of the present invention is to apply an input signal or extract an output signal by irradiating an electron beam instead of setting up a probe on a pad of an integrated circuit device.

An electron beam exposure device may be used. In this case, it is much easier to accurately irradiate a desired location with an electron beam than by performing phosphorylation. The figure is a block diagram of main parts for explaining the case where an input signal is applied to an integrated circuit device.

In the figure, M is the main area of the logic circuit to be tested, and P
, ~Pm~Pn are pads of main area M, C is a capacitor,
Q, and Q2 are P channel M which is a switching element.
An OS transistor, P81 and PB2 are pads for electron beam irradiation, R and R2 are resistors, -V is a power supply, and EB and EB2 are electron beams, respectively.

In the illustrated example, the pad Pm has a high (H) level or
To give an input signal of (L) level, do as follows.

For example, pad PB is irradiated with electron beam BB, transistor Q is made conductive, and power supply -V is connected to capacitor C.
A current is applied to the battery to charge it, and the accumulated voltage is used to generate an L-level input signal.

Of course, at this time, the transistor Q2 is in the non-conducting Z state. Contrary to the above, if the transistor Q is made non-conductive and the pad PB2 is irradiated with an electron beam to make the transistor Q2 conductive, the charge stored in the capacitor C will be released. This makes it possible to create an H level input signal.

These same day level or L level input signals are input to pad Pm.
is given to the main area M via.

Apply these operations to all pads P, ~Pn, give them a predetermined binary signal as an input signal, perform logical processing in the main area M, take out the result as an output signal, and confirm that the main area M is normal. You can test whether it works.

If the logic circuit main area M is composed of MIS transistors, its input impedance is high, so the capacitor C
Even if a small-area, small-capacity device is used, it is possible to obtain a time constant such that the input signal level remains approximately constant until all pads are successively irradiated with an electron beam and a test output is obtained.

To extract the output signal, for example, a pad where the output signal should appear is irradiated with an electron beam, the secondary electrons are detected, and energy analysis is performed to detect the potential of that portion.

That is, for example, a grid is arranged through slits, a part of the secondary electrons is taken out, a magnetic field is applied to this, the secondary electrons are deflected, and then the secondary electrons are guided to the scintillator through the second slit, and the secondary electrons are A detection system configured to detect the amount of electron irradiation in a photographic manner can be used.In this case, the amount of deflection changes depending on the energy distribution of the secondary electrons from the pad,
Since the amount of secondary electrons passing through the second slit changes depending on the potential of the pad, it is possible to detect that the potential of the pad is at the H level or L level based on the detection level from the photo. , by looking at the results as a whole, one can immediately determine whether the main area M is good or bad.

Of course, this determination can be easily made using a central processing unit (CPU). In the illustrated example, MOS field effect transistors are used as the transistors Q, Q2, but if the main region M is composed of bipolar transistors, bipolar transistors may be used. Any device may be used as long as it is capable of the switching required by the present invention and can be incorporated into an integrated circuit device.

In addition, pads PB・, PB2 are pads P. ~ Unlike Pn, there is no need to pass a large current or wire bonding, so it only needs to be a relatively small area.
[Mountain m] It is enough to have a mouth. Incidentally, after the test is completed, the circuit including the capacitor C and the transistors Q, Q2, etc. can be separated from the pad Pm so as not to interfere with the operation of the main region M. As you can see from the above explanation,
According to the present invention, even when it is desired to test whether or not the main area of a semiconductor integrated circuit device operates normally, even when the wafer or wiring is not completely completed,
For one input terminal, a circuit is formed that combines at least two switching elements, one capacitor, two electron beam irradiation pads, etc., and by irradiating the electron beam, it can be set to H level or L level. A binary signal can be generated and added to the main area, and the result of logical processing of the added signal is irradiated with an electron beam to the desired location where the signal appears, and the energy of the generated secondary electrons is analyzed. In particular, it can be easily detected.

Since these operations do not require any probe to be placed on the integrated circuit device, the test can be carried out easily and reliably. Therefore, it is particularly effective in devices such as wafer memories where only good semiconductor chips must be selected and connected in advance.

[Brief explanation of the drawing]

The figure is a block diagram of essential parts of an embodiment of the present invention.

Claims (1)

[Claims] 1. Make a switching element conductive by irradiating it with an electron beam, charge the capacitive element by flowing a current through the switching element, and use the charging voltage as an input signal, or by irradiating it with an electron beam. A semiconductor integrated circuit characterized in that the switching element is made conductive, the charge in the capacitive element is released through the switching element, and the voltage at the terminal of the capacitive element is applied as an input signal to the input end of the main region. Equipment testing methods.