JPS609376B2 - Program reservation device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is a device that is used in a broadcast receiving device such as a television receiver and is programmed in advance to select a predetermined channel at a predetermined time or to stop the reception operation. Regarding this, it is an attempt to provide a bag counterfeit with improved operability when setting a reservation.

EMBODIMENT OF THE INVENTION Hereinafter, the present invention will be described in detail with reference to the drawings showing one embodiment thereof.

FIG. 1 shows its overall configuration, where 1 is a television receiver (hereinafter simply referred to as television), and the remaining parts are a program reservation circuit.

The television 1 includes a tuner 2, a channel selection circuit 3 for controlling the reception channel, a channel switching switch group 4 for switching the reception channel, a channel display circuit 5, a VIF circuit 6, a detection circuit 7, a video circuit 8, a cathode ray tube 9, Power supply circuit 1
0, an audio circuit 30, etc., of a general configuration. The program reservation circuit part mainly includes a memory 12 having 12 addresses for storing 12 types of program reservation information, and the 12 types of addresses A are stored at the time of program setting.
-L, a write address switching circuit 13 that switches which of the reservation information is to be written, and an encoder 14 that inputs channel information and image reception stop information of the reservation information.
A writing day setting circuit 15 for inputting day of the week information and a writing time setting circuit 16 for inputting time information are provided as writing means.

Further, there is also provided a switching circuit 17 for reading reservation information stored in each memory address while switching the readout mode IJ addresses A to L at high speed from the memory 12, and a high switching pulse for switching the switching circuit 17. an information separation circuit 19 that separates and distributes the read reservation information for each piece of information; an actual day of the week generation circuit 20 that generates information on the day of the week currently in progress; A real time generating circuit 21 that generates information compares the day of the week information and time information of the reservation information read from the memory 12 with the actual day of the week information and real time information, and outputs a match signal when the two match. A comparison circuit 22, a latch circuit 23 that latches the reservation information read from the memory 12 when the matching signal is generated, and a latch circuit 23 that identifies the content of the latched reservation information and generates a channel cutoff signal and a power cutoff signal. The identification circuit 24 is provided as a detection means.

Further, a channel switching circuit 25 is provided which controls the channel selection circuit 3 of the television 1 in accordance with the channel switching signal from the identification circuit 24 to switch the selected channel to a reserved channel, and a channel switching circuit 25 which controls the channel selection circuit 3 of the television 1 in accordance with the channel switching signal from the identification circuit 24, and which controls the television 1 in accordance with the power cutoff signal. A power cutoff circuit 26 for cutting off the image receiving operation and stopping the image receiving operation is provided as a control means.

27 is a day of the week display device, 28 is a time display device, 2
9, 32, and 33 are switches for switching between reservation setting time a and reservation execution time b; 31 is a switch for write address sliding sliding door 2;
4 is a switch for inputting reception operation stop information.

Next, the operation in the above configuration will be explained.

First, the operation when writing reservation information will be explained.

At this time, switch 29 to side a and memory 1
Enables application of a write control signal to 2. Next, the switch 31 is operated to switch the switching circuit of the write address switching circuit 13 to designate the address to be written. The write address switching circuit 133 may be a ring counter or the like which is switched each time the switch 31 is operated and sequentially generates a write control voltage at each of the output terminals A to L.
Which address is designated to be in the write state is determined by the four light emitting diodes 13A to 13A that are lit by the control voltage output.
It is displayed as 13L etc. When a write address is designated in this manner, only the designated memory address among memory addresses A to L in the memory 2 becomes writable. In the case of the figure, memory address B is in a writable state. Therefore, the writing day of the week setting circuit 15 is operated to set the day of the week to be reserved.

This can be done by selecting any one day of the week from Sunday to Saturday, or by making a reservation for all days of the week (that is, every day). The user also operates the write time setting circuit 16 to set the time to reserve. The set reserved day of the week information and reserved time information are written to memory address B designated for writing. At the same time, during writing, switches 32 and 3
3 is also switched to the a side, so the set reservation day and time are displayed on the day of the week display device 27 and the time display device 28.
and will be displayed. Further, the user operates the channel selection switch 4 for the channel selection circuit 3 of the television 1 to set a reserved channel, or operates the stop setting switch 34 to set that the image reception operation should be stopped. The set reserved channel information or image reception stop information is converted into a predetermined signal format by the encoder 4, and then written to memory address B, which is also designated for writing. At this time, in this device, the reserved channel is set using the channel switching switch 4 for the TV channel selection circuit 3, and the channel selection circuit 3
Since the selected channel is detected by the encoder 14 and inputted by the encoder 14, the channel selection circuit 3 is also controlled at the same time as the reserved channel is set, so that the selected channel on the TV is changed to that channel. TV 1 shows which channel has been reserved.
This is immediately determined by the screen and channel display circuit 5.

Furthermore, when the switch 34 that schedules the stopping of the image receiving operation at a predetermined time is set, the planking signal generation circuit 35 operates the channel cut-off switch 4 for a certain period of time thereafter or next time. A planking signal is generated during the period until the TV 1 is turned on, thereby interrupting the signal system of the television 1, such as the video circuit 8.

In this way, when the viewer inputs the reservation information to stop the reception operation by operating the switch 34,
When the video signal system of the television 1 is cut off, the screen on the cathode ray tube 9 is erased, and by looking at the screen, the viewer can be sure that the reception stop reservation information is input into the memory 2. You can see that it has been written correctly. At this time, if the television 1 is used as a broadcast receiving device as shown in the figure, a blanking signal is applied to its video circuit 8 to cut off the video signal system and make the screen blank, while the audio circuit By leaving 30 operating as it is, it is possible to clearly distinguish that the reservation setting input operation is in progress, which is different from when the power is actually turned off (no video or sound). Further, this planking signal may be added to the channel display circuit 5 so that the channel display operation is also cut off when a reservation setting for stopping the reception operation is input.

In this way, once the writing of reservation information such as day of the week information, time information, channel/stop information, etc. to one memory address B in the memory 12 is completed, the switch 31 is further operated to change the writing specified address in the memory 12. At the same time, reservation information is written to each memory address using the same operating means.

In the illustrated embodiment, the memory 12 is provided with 12 slots A to L, so that up to 12 types of reservation information in total can be written. Once you have finished writing the necessary amount of reservation information,
The switch 29 is switched to the b side to place the memory 12 in a non-writable state, that is, the holding state, and the switches 32 and 33 are switched to the b side.
is also switched to side b to display the actual day of the week and actual time. Next, the operation of controlling the television 1 based on the reservation information written and stored in the memory 12 as described above will be explained.

At this time, first, the reservation information stored in each memory address A to L of the memory 12 is sequentially read out by the readout switching circuit 17 which is switched by the high distance switching pulse from the switching pulse generation circuit 18. Such a read switching circuit 17
The ring counter sequentially generates outputs to 12 output terminals each time a switching pulse from the switching pulse generation circuit 18 is applied, and read signals from memory addresses A to L are sequentially taken out by the output of the ring counter. It may be configured by, for example, a gate. Further, it is preferable that the reading cycle be as short as possible to read out one memory address A to L within several seconds, but it may be arbitrarily determined depending on the operating frequency limit of the memory 12 and each circuit to be used. The reservation information from the memory addresses A to L that has been sent one after another in this way is separated into day of the week information and time information and channel/stop information by the information separation circuit 19, and the day of the week information and time information are sent to the comparison circuit 22. In addition, channel/stop information is added to the latch circuit 23.

On the other hand, the real time generating circuit 21 generates a real time signal indicating the currently progressing moment by moment by dividing the commercial power supply frequency or the reference oscillation frequency, and the real time generating circuit 20 generates a real time signal indicating the current advancing time. An actual day-of-the-week signal indicating the day of the week of the current day is generated by counting the signals generated every two-doku time.

Then, a comparing circuit 2 compares the reserved day of the week information and reserved time information separated from each memory address A to L of the memory 12 by the setting information separation circuit 19 with the actual day of the week information and the actual time information.
2, and when the two match - that is, when there is reservation information that is reserved for the current day of the week and time, and when that day of the week and time has been reached, a match output is generated from the comparison circuit 22. Then, the channel/stop information of the reservation information is latched in the latch circuit 23. Of course, when the reserved day of the week information indicates that all days of the week (that is, every day) are reserved, a matching output is generated and latched at the reserved time of every day of the week. Then, the reserved channel/stop information read out from the memory 12 and latched in the latch circuit 23 is identified by the identification circuit 24, and if the reserved information specifies channel switching, the channel switching circuit 25 is driven. The channel selection circuit 3 of the television 1 is switched and controlled to receive the designated channel.

The switching means may be of any type as long as it has the same effect as when the channel switching switch 4 is operated. on the other hand,
If the reservation information specifies stopping the image receiving operation, the power cutoff circuit 26 is driven to control the television 1 to be turned off. As the switching means, a stepping relay or the like that disconnects the power supply circuit of the television 1 can be used. However, for safety reasons, it is desirable that this power supply be switched only to disconnection, and that it is not possible to turn on the power by reservation. The operations of reading the reservation information from the memory 12, comparing it with the actual day of the week and real time, latching the reservation information, identifying it, and switching channels or turning off the power based on the identification output are repeated, and the memory 12
Switching of the selected channel and power cut-off are automatically controlled according to a reservation program written in advance.
Note that when this reservation program is executed, the switch 32,
33 is also switched to the b terminal side, and the current actual day of the week and actual time are displayed on the day of the week display device 27 and the time display device 28.

Next, an example of a channel selection method applied to this device will be described, and an overview of channel number input will be explained.

From now on, we will discuss a TV receiver with 12 channel positions, and the channels are numbered "1", "2", "3", etc. in order from the top, "12".
This will be explained as follows. First, the basic tuning circuit 3 will be explained with reference to FIG.

Transistor switch QI inside the integrated circuit for channel selection 35
From Q12, one of the transistors is turned on by the control section 36, and the voltage at the movable terminal of the preset volumes VRI to VR12 connected to it is applied to the tuner 2 as a tuning voltage through the diodes DI to D12, and the voltage is applied to the tuner 2 as a tuning voltage. Tune to the corresponding frequency. Next, transistor switches QI to Q in the channel selection IC 35 correspond to the operated channel selection key switches SWI to SW12.
The part that makes 12 conductive will be explained. When a positive voltage is applied to the terminal P13, the transistor Q13 becomes conductive and this is inputted to the control unit 36, which causes the 4-bit reversible counter 37 to count and convert it into binary -la.
This is a terminal for decoding by the Hayabusa decoder 38 and moving the appropriate transistor in the order of QI→Q2→Q3→...→Q12. Now, transistor switch QI
If the channel selection key switch SW3 is pressed in a state where the
is "off", voltage is applied from the power supply 10B to the intersection point P14 (common side of the tuning keyswitches SWI to SW12) through the preset volume VR3 and the switch SW3, and is divided by the resistors 39 and 40 to the terminal of the IC35. P
13, and the transistor Q13 is turned on.

When this happens, the 4-bit reversible counter 37 counts the clock pulses, and the internal state changes from "1" to "2" in hexadecimal notation.
” → “3”. When it becomes “3”, the transistor switch Q3 becomes conductive and the terminal P3 becomes the ground potential, and the IC
35's input terminal P13 also becomes the ground potential, transistor Q13 is turned off, the 4-bit reversible counter 37 no longer counts, and the transistor switch Q3 is stabilized in a conductive state. Next, terminal P15
is a terminal for incrementing the counter 37 every time a positive pulse is applied here, and shifting the closed transistor switch in the direction of QI→Q2→Q3...→Q12.

The pulse added here is called a channel down pulse. In addition, the terminal P16 decrements the counter 37 every time a positive pulse is applied here, and the transistor switch that closes is Q12→QII→...QI.
This is a terminal for moving in the direction of. The pulse applied here is called a channel up pulse.Next, we will discuss an embodiment in which information on which channel to reserve is input into the program reservation device shown in FIG. 1 using the above-mentioned channel selection circuit. As shown in the figure.

The basic principle of this input circuit is to set one of the 12 selected channels as a reference position and detect how many positions it takes to reach the reference position from the currently set selected channel. The purpose of this is to find out the number of the position.

Now, at TI, as mentioned above, the channel selection key switch SWI ~
IC connected to the switch when SW12 is pressed
35 transistor switches QI to Q12 (e.g. SW
When Q3) connected to P3 is in the "off" state, a positive voltage is generated at the common side intersection P14 of the tuning key switch as shown in the time chart b of FIG.

Then, at T2 when the transistor switch connected to the tuning key switch becomes conductive, the tuning by the tuning key switch is completed. Once this channel selection is completed, the process of inputting the channel number into the program reservation device is started. Note that a indicates T5 from TI when the channel selection key switch is pressed. A channel number input command is issued by setting a set/reset flip-flop (abbreviated as RS-FF) using a negative pulse c obtained by differentiating the output of the key switch b.

That is, a buffer amplifier 41 receives the key switch output and differentiates it between a capacitor 42 and a resistor 43. This waveform is C. The RS-FF 44 is set by a negative differential pulse and its output becomes high level as shown in d. This-F
When the output of F44 becomes high level, the channel up pulse e is sent from the pulse generation circuit 45 to the output terminal P16 of the channel selection IC 35. until it is detected that the transistor switch QI in the reference position is suitable. At this time, whether the child's channel up pulse is generated or not is stored in EI'46,
This is assumed to be data for channel reservation number 0. If this continues, channel down pulses "1" will be received, so the same number of channel down pulses as up pulses are generated, as shown in g, after a certain period of time after the transistor switch QI at the reference position is turned on. Next, in path h, RS-F
Reset F44 and complete the series of input operations. In addition, in the time chart, T3 while pressing the channel selection key switch
Between T4 and T4, the selection-switch intersection P14 is reached as shown in b.
The reason for the voltage being generated is that the transistor switch connected to the channel selection switch being pressed is turned on or off due to the application of an external up/down command signal to the IC35.

The transformer 47 is used to ground the terminal P13 so that the transistor Q3 of the integrated circuit 35 does not become conductive even if three voltages are applied to the intersection P14 between /T2 and T4. Input the reserved channel information as explained above; according to the law, when the channel selection key switches SWI to SW12 are made authentic and the reserved channel number is changed; it is necessary to input the reserved channel information; As shown in the chart, the falling point of the key switch output (output at the point of intersection P14) is at the second timing, and therefore the RS-FF 44 is set with a negative differential pulse.

However, in this channel selection circuit, there is an inconvenience in that when the channel selection F switch currently being selected is pressed again, no voltage is generated at the intersection point P14. In other words, the voltage of
This does not occur whenever the channel selection keyswitches SWI to SW12 are pressed, but only when a wing station key switch of a channel other than the currently selected channel is pressed. Therefore, even if the channel selection key switch of the same channel number as the one currently selected is pressed and input, the intersection point P
No voltage is generated in the channel 14, which causes inconvenience when a channel is reserved after a power-off reservation is made.
That is, as mentioned earlier, when the power is scheduled to be cut off, both the screen and the channel indicator are planed, and at this time the tuning circuit 3 is configured to select the channel number "1" at the reference position. ing. That is, the transistor switch QI is "on". At this time, the channel number “1” is set after power-off reservation.
When trying to change the channel selection key switch to reserve
Even if you press WI, since this is the same channel as the previously selected channel number "1", no voltage is generated at the intersection point P14, so RS-FF44 is not set, and the program reservation device does not set the channel. This means that it will not be possible to detect that the reservation with number "1" has been input. The present invention provides a device capable of detecting such cases, and one embodiment thereof is shown in FIG.

This is the same as the buffer amplifier 41 in FIG. 3, in which an inverter 47 and a NAND gate 48 are used, and a transistor 49, diodes 50, 51, resistors 52 to 54, a capacitor 55, and a NAND gate 56 are added. One end of the diode 50 is the tuning key switch SWI~S
It is connected to the common side intersection P14 of W12, and the voltage of the power supply to which the resistors 52 and 53 are connected is V. Here, the intersection of the resistor 52 and the diodes 50 and 51 is designated as P17. First, the condition for both transistor 49 and transistor Q13 to be "on" when the tuning key switch SWI is open is that if the voltage at intersection P17 is the voltage of transistor 49: V49 = Vbe + Vf transistor Q13
In the case of: V・3R39R+YR40・V+Vf However, Vr: Diode forward voltage drop O Vb: Transistor base-emitter voltage drop V49: Intersection 1 when transistor 49 turns on
7 voltage V, 3: voltage at intersection 17 when transistor 3 is turned on, R39, R4o: resistance value of resistors 39, 40.

Therefore, by selecting resistors 39 and 40 such that V49<V,3, transistor Q13 is turned off,
Transistor 49 can be turned on.

Next, when the channel selection key switch SWI is closed, the transistor Q13 is divided into two cases: "on" and "off".

When transistor Q13 is “on”, diode 5
0 is conductive, and the voltage at the intersection P17 is Vr + VCE (t). However, Vc8 (skin) is the collector-emitter saturation voltage of the transistor Q13, Z.
By setting Vf 0.6 V, Vc
8 (plow); since the voltage is about 0.1 to 0.2 V, the above formula holds) Transistor Q13 and transistor 49 are "off"
2 When transistor QI is "off", transistor Q1 is connected to power supply voltage B through preset volume VRT and resistor 39.
Forward bias is added to 3.

At this time, the voltage V,4 of terminal P14 is VM=R;
・B+R Mikarashima; 2. Here, VRI is the resistance value between both ends of the preset volume VRI. Therefore, the V of the condition that the diode 50 turns off the cassette,
40Vf>Vbe+Vf, however, when Vbe+Vf satisfies the clamp voltage at the intersection P17 when the transistor 439 is turned on, the transistor 49 becomes '1 on'.As described above, the transistor 49 is turned on. By using the diodes 50 and 51 in the base circuit of the transistor 49, three conditions are satisfied: 1. When the tuning key switch is off, the transistor 49 is turned on.

Vne+Vf<R raw Vine+Vr 4V nuku R missing> M2 When the channel selection key switch is on and the transistor switch connected to the key switch is "off" (i.e. TI~ in the time chart The transistor 49 is turned on during the unfinished channel selection period (T2).

V, 40Vf>Vbe+Vf Branch order; Turn off.

Each constant can be selected so as to satisfy Vf + VCE (group t)<>be+>f.

In this way, even if the channel selection key switch of the currently selected channel number is pressed again, the transistor 49 will be turned off, and information that the channel selection key switch has been pressed can be obtained, and program reservations can be made. You can reliably enter information into the section.

It should be noted that at the time of power-off reservation, a high level signal is output from the terminal P18 of the pulse generation circuit 45 of the program reservation section.

In addition, when making a power cut reservation, channel number "1" at the reference position is selected, and when the channel selection key switch SWI is pressed from TI to a in the time chart of FIG. 6, at the same time, the transistor 49 is turned off and output b
will be at a high level. This is differentiated as shown by c using the capacitor 55 and resistor 54, and this is NANDed with the output of terminal P18 (status signal indicating that the power is to be cut off).
When applied to gate 56, its output becomes d. The output of the inverter 47 is normally at a high level like e,
Both are combined by a NAND gate 48 to obtain an output f, which is differentiated by a capacitor 42 and a resistor 43 as f, and the RS-FF 44 is set to h by the negative pulse. Also, in the case of a channel change, the output of NAND gate 56 is normally at a high level, and inverter 47 and NAND gate 48 are the same as buffer amplifier 41 described in FIG. Start channel input from differential negative pulse.
- In this way, in either case, the RS-FF 44 is set with a negative pulse, and the reserved channel number is detected and input to the program reservation device. Further, even after the power-off reservation is made, the RS-FF 44 is set and a new channel number is input, so that the channel number is input into the memory of the program reservation device. In addition, the fifth
In the figure, the output of the transistor 49 and the status output of the power-off reservation of the program reservation device are added to the NAND gate 56;
This is to obtain the timing from the output of , and to prevent the channel from being captured again when the same channel is pressed twice.

As described above, according to the present invention, it is possible to obtain a useful device in which input is correctly detected and set when a reserved channel is input after power-off is scheduled.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the program reservation layer in one embodiment of the present invention, Figs. 2, 3, and 5 are circuit diagrams of its main parts, and Figs. 4 and 6 show its operation. It is a time chart for explanation. 2...Tuner, 3...Tuning selection circuit, 3
5... Integrated circuit for channel selection, 36... Control section, 37... Counter, 38... Decoder, 39, 40... Resistor, 41... Buffer Amplifier, 42... Capacitor, 43... Resistor, 44... RS-FF, 45... Pulse generation circuit, 46... Memory, 47・・・・・・
Inverter, 48...NAND gate, 4 9...
・...Transistor, 50, 51...Diode, 52,
63, 54...Resistor, 55...Capacitor, 56...NAND gate. Figure 1 Figure 2 Figure 4 Figure 3 "B Figure 5 Figure 6

Claims (1)

[Claims] 1 One of the plurality of preset volumes for setting the tuning voltage applied to the tuner is grounded by an electronic switch to generate the tuning voltage, and the electronic switch side of the preset volume is connected via a tuning switch. The other end of the divided resistor is grounded, a transistor is connected to the intersection of the divided resistors, and it is determined and selected whether or not to switch the electronic switch by cutting off the conduction of this transistor. The anode or cathode of two diodes are connected in common and connected to a power supply via a resistor, and the cathode or anode of one of the diodes is connected to the connection point between the tuning switch and the dividing resistor. Connect the cathode or anode of the other diode to the base of a detection transistor whose emitter is grounded and whose collector is connected to the power supply via a resistor. The detection transistor is set to be in a cutoff state only when the electronic switch connected to the operated switch is in a conductive state, and the selection channel to be reserved is input by the output of the detection transistor. A program reservation device characterized in that it detects when