JPS6111545B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a synchronous rectifier circuit, which can be applied to, for example, a filter circuit of a measuring instrument of a balance tester, and aims to improve the filter effect.

A conventional synchronous rectifier circuit has a configuration as shown in FIG. 1, and FIG. 2 is a timing chart thereof. The input signal e _i has a period t ₀ as shown in FIG.
It is a distorted wave that uses the sine wave as the fundamental wave and contains its high frequency components. On the other hand, using the synchronization signal pulse Sp synchronized with e _i , the timing control circuit 2 generates a signal S ₁ that is ON for t ₀ /2 hours and OFF for t ₀ /2 hours, and the switch SW ₁ is controlled ON and OFF. Ru. In Figure 1, 1 is an inverting amplifier with a gain of 1, and its output e ₁
is in the relationship e _i =-e ₁ .

Therefore, the output e ₀ of the switch SW ₁ is as shown in FIG. 2, and the average value of the values obtained by integrating e ₀ over one period is taken as E ₀ .

Now, assuming that the period of the input signal e _i is t ₀ , e _i can be expressed by the following equation by Fourier expansion.

However, Cn is the amplitude of each harmonic component with C ₁ as the fundamental wave, φ _o is the phase of each component, and t ₁ is time.
Note that C ₀ is a direct current component.

Therefore, since E ₀ is the average value of the integrated values of e _i for one period, becomes. Therefore, from equation (2), the synchronous rectifier circuit in Fig. 1 extracts the DC component C ₀ and even harmonics C ₂ , C ₄ , C ₆ from the input signal e _i .
By completely removing each term, and even for odd-numbered high frequencies, the 3rd harmonic is reduced to 1/3, the 5th harmonic is reduced to 1/5, etc., and the fundamental wave It can be seen that this has the effect of a filter circuit that selects only the component C ₁ cosφ ₁ .

By the way, it is desirable for the measuring instrument filter circuit of an unbalance tester to remove all harmonics other than the fundamental wave component. Therefore, when using a conventional synchronous rectifier circuit, the odd-numbered high frequencies that cannot be removed become an error factor and reduce accuracy. It was not possible to obtain high measurement results.

The present invention improves the drawbacks of the conventional synchronous rectifier circuit, and embodiments thereof will be described below with reference to FIGS. 3 to 7.

In FIG. 3, A ₁ and A ₂ are operational amplifiers, R ₁ to R ₃ are resistors, and resistors with the same name have the same resistance value. 3 is a timing control circuit which controls switches SW ₁ and SW ₂ according to its signals S ₁ and S ₂ .
is controlled ON-OFF. 4 surrounded by a dashed line
The part shows an inverting amplifier with a gain of 1. The part 5 surrounded by the broken line is a variable gain amplifier. To explain its operation, when SW ₂ is OFF,
The gain of the amplifier consisting of R ₄ , R ₃ and A ₂ is (−
R ₄ /R ₃ ), and when SW ₂ is turned on, the gain becomes (-2R ₄ /R ₃ ). The relationship between the input e _i and the output e ₂ is expressed by the formula: When (SW ₂ ) is OFF, e ₂ = -R ₄ /R ₃ e _i (3) When (SW ₂ ) is ON, e ₂ = - 2R ₄ /R ₃ e _i ......(4).

On the other hand, from the input signal e _i and the synchronization signal pulse Sp,
The timing control circuit 3 generates control signals S ₁ and S ₂ with the timing shown in FIG.
SW ₁ and SW ₂ are controlled ON-OFF. Then, the output e _0A of the circuit of the present invention for the input signal e _i is
The relationship is as shown in Figure 4. Integrate e _0A over one period, and let the average value be E _0A . (E _0A )
If we calculate in the same way as equation (2), we get When calculating by substituting (1) into equation (5), E _0A = (-3R ₄ /2R ₃ )・1/π(C ₁ cosφ ₁ +C ₅ /5cosφ ₅ +C ₇ /7cosφ ₇ +C ₁₁ /11cosφ ₁₁ + …
……)……(6) becomes.

Comparing equations (6) and (2), equation (6) is the third harmonic,
It can be seen that all harmonics of odd multiples of 3, such as the 9th harmonic and the 15th harmonic, are removed. As a result, harmonic components are reduced compared to conventional synchronous rectifier circuits. The frequency ratio between the fundamental wave and the harmonics that cause errors has also been improved from the conventional 1:3 or higher to 1:5 or higher. As a result, by inserting a low-pass filter at the front stage of the synchronous rectifier circuit of the present invention, as shown in 6 in FIG. 5, the residual harmonic components can be easily removed. FIG. 5 shows another embodiment of the present invention, where 7 is an amplifier with a gain of A times, and 8 is an amplifier with a gain of 2A.
The double amplifier 9 is the same simple gain inverting amplifier as 1 in FIG. 1, and 10 is the same timing control circuit as 3 in FIG. (A is a constant) FIG. 6 shows still another embodiment, and FIG. 7 is a timing chart thereof. 11 to 14 are amplifiers with gains of A times, 2 A times, (-A) times, and (-2 A) times, respectively, SW ₃ to _{SW 6} are switches, and 15 is a timing control circuit, which controls the timing of S ₃ to S ₄ . controlled by

It goes without saying that SW ₁ to SW ₆ in FIGS. 3, 5, and 6 may be not only contact switches but also electronic switches such as semiconductors.

As described above, according to the present invention, it is possible to remove the DC component, even harmonic components, third harmonics, and odd harmonics thereof from the input signal e _i .
There is an advantage that the frequency ratio between the fundamental wave component and the residual harmonic component can be 1:5 or more. As a result, as already mentioned, a simple low-pass filter and the circuit of the present invention can be combined to form a complete filter circuit.

[Brief explanation of the drawing]

Fig. 1 is a configuration diagram of a conventional synchronous rectifier circuit, Fig. 2 is a timing chart thereof, Fig. 3 is a circuit diagram showing an embodiment of the present invention, Fig. 4 is a timing chart thereof, Figs. The figure is a circuit diagram showing another embodiment, and FIG. 7 is a timing chart of the circuit of FIG. 6. SW ₁ ~ _{SW 6} ... Switch, 3, 10, 15...
Timing control circuit, 7, 8...Amplifier, 9...
Simple gain inverting amplifier, 11-14...amplifier.

Claims (1)

[Claims] 1. In a circuit that obtains a rectified output of a fundamental wave from an input signal containing high-order harmonics, a circuit receives an input signal and a synchronization signal synchronized with the period of the fundamental wave, and uses this synchronization signal as a reference, Divide one half period into three equal parts and make them first, second, and third parts in order, and the second part has twice the gain as the first and third parts. A synchronous rectification system characterized in that the other 1/2 cycle is an electric circuit having a polarity inverted with respect to the 1/2 cycle. 2 Receives a signal that is synchronized with the input signal, turns ON for the first 1/2 cycle in synchronization with this, and then turns ON for the next 1/2 cycle.
Switch 1 to turn off and turn off for the first 1/6 cycle
Then it turns on for 1/6 cycle, then turns on for 1/3 cycle.
Turns off, turns on again for 1/6 cycle, and then turns on again for 1/6 cycle.
Input signals are input to the switch 2 that turns OFF, the control circuit that repeatedly operates these switches as described above, and the amplifier circuit that can switch so that the gain when switch 2 is OFF and when it is ON is 1:2. , input the output of this amplifier circuit to an inverting amplifier with a gain of 1,
A synchronous rectification system according to claim 1, characterized in that each output of the amplifier circuit and the inverting amplifier is connected to a switch (1). 3 Switch 1 that receives a signal that synchronizes with the input signal, synchronizes it, and turns ON only during the first and third periods counted from the beginning of each period that divides one period into six equal parts.
and switch 2 that turns on only the second switch, switch 3 that turns on only the fourth and sixth switches, and switch 4 that turns only the fifth switch on, a control circuit that repeatedly operates these switches as described above, and an input signal with A as a constant. and then A times, 2A times, -A times, -2A respectively.
Consists of amplifiers 1, 2, 3, and 4 that double the amplification,
2. A synchronous rectification system according to claim 1, wherein the outputs of these amplifiers are connected to switches 1 to 4, respectively.